Lines Matching +full:force +full:- +full:internal +full:- +full:phy

1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/phy.h>
7 /* All Broadcom Ethernet switches have a pseudo-PHY at address 30 which is used
8 * to configure the switch internal registers via MDIO accesses.
84 #define MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */
94 #define MII_BCM54XX_EXP_SEL_WOL 0x0e00 /* Wake-on-LAN expansion select register */
111 #define MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */
131 * AUXILIARY CONTROL SHADOW ACCESS REGISTERS. (PHY REG 0x18)
205 /* 01010: Auto Power-Down */
224 /* 10011: SerDes 100-FX Control Register */
226 #define BCM54616S_100FX_MODE BIT(0) /* 100-FX SerDes Enable */
234 #define BCM54XX_SHD_MODE_1000BX BIT(0) /* Enable 1000-X registers */
237 * EXPANSION SHADOW ACCESS REGISTERS. (PHY REG 0x15, 0x16, and 0x17)
256 /* Top-MISC expansion registers */
268 #define BCM5482_SSD_1000BX_CTL 0x00 /* 1000BASE-X Control */
269 #define BCM5482_SSD_1000BX_CTL_PWRDOWN 0x0800 /* Power-down SSD */
272 #define BCM5482_SSD_SGMII_SLAVE_AD 0x0001 /* Slave auto-detection */
274 /* BroadR-Reach LRE Registers. */
279 #define MII_BCM54XX_LREANAA 0x04 /* LDS Auto-Negotiation Advertised Ability */
280 #define MII_BCM54XX_LREANAC 0x05 /* LDS Auto-Negotiation Advertised Control */
290 #define LRECR_LOOPBACK 0x4000 /* Internal Loopback */
300 #define LRECR_MASTER 0x0008 /* Force Master when LDS disabled */
301 #define LRECR_SLAVE 0x0000 /* Force Slave when LDS disabled */
312 #define LRESR_LDSCOMPLETE 0x0020 /* LDS Auto-negotiation complete */
314 #define LRESR_LDSABILITY 0x0008 /* LDS auto-negotiation capable */
317 #define LRESR_ERCAP 0x0001 /* Ext-reg capability */
319 /* LDS Auto-Negotiation Advertised Ability. */
373 /* Wake-on-LAN registers */
450 #define MII_BRCM_FET_SHDW_MC_FAME 0x4000 /* Force Auto MDIX enable */
489 #define BCM54XX_ECD_CTRL_CROSS_SHORT_DIS BIT(13) /* disable inter-pair