linux/bcma/bcma_driver_chipcommon.h

1 /* SPDX-License-Identifier: GPL-2.0 */
26 #define  BCMA_CC_CAP_UARTGPIO		0x00000020	/* UARTs on GPIO 15-12 */
34 #define  BCMA_CC_CAP_PLLT		0x00038000	/* PLL Type */
49 #define  BCMA_CC_CAP_64BIT		0x08000000	/* 64-bit Backplane */
103 #define  BCMA_CC_CHIPST_4706_PKG_OPTION		BIT(0) /* 0: full-featured package 1: low-cost package */
105 #define  BCMA_CC_CHIPST_4706_SFLASH_TYPE	BIT(2) /* 0: 8b-p/ST-s flash, 1: 16b-p/Atmal-s flash */
154 #define  BCMA_CC_FLASHCTL_ST_DP		0x00b9		/* Deep Power-down */
156 #define  BCMA_CC_FLASHCTL_ST_CSA	0x1000		/* Keep chip select asserted */
157 #define  BCMA_CC_FLASHCTL_ST_SSE	0x0220		/* Sub-sector Erase */
235 #define  BCMA_CC_SLOWCLKCTL_LPOPD	0x00000400	/* LPOPowerDown, 1: LPO is disabled, 0: LPO is enabled…
237 #define  BCMA_CC_SLOWCLKCTL_IPLL	0x00001000	/* IgnorePllOffReq, 1/0: power logic ignores/honors PLL…
282 /* Block 0x140 - 0x190 registers are chipset specific */
434 /* PLL usage in 4716/47162 */
437 /* PLL usage in 5356/5357 */
443 #define BCMA_CC_PMU6_4706_PROCPLL_OFF	4	/* The CPU PLL */
470 /* ALP clock on pre-PMU chips */
472 /* HT clock for systems with PMU-enabled chipcommon */
517 #define BCMA_CHIPCTL_4331_SPROM_GPIO13_15	BIT(3)	/* sprom/gpio13-15 mux */
518 #define BCMA_CHIPCTL_4331_EXTPA_EN		BIT(4)	/* 0 ext pa disable, 1 ext pa enabled */
526 #define BCMA_CHIPCTL_4331_EXTPA_EN2		BIT(12)	/* 0 ext pa disable, 1 ext pa enabled */
530 /* 43224 chip-specific ChipControl register bits */
577  * Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU)
605 	 * de-reference that structure.
665 	bcma_read32((cc)->core, offset)
667 	bcma_write32((cc)->core, offset, val)
678 	bcma_read32((cc)->pmu.core, offset)
680 	bcma_write32((cc)->pmu.core, offset, val)