Lines Matching +full:25 +full:g
13 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
16 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
21 * disp 0 ~ 4G larb0/1/2/3
22 * vcodec 4G ~ 8G larb19/20/21/22/23/24
23 * cam/mdp 8G ~ 12G the other larbs.
24 * N/A 12G ~ 16G
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
261 #define M4U_PORT_L19_VENC_REF_CHROMA MTK_M4U_ID(19, 25)
290 #define M4U_PORT_L20_VENC_REF_CHROMA MTK_M4U_ID(20, 25)
336 #define M4U_PORT_L25_CAM_MRAW0_LSCI_M1 MTK_M4U_ID(25, 0)
337 #define M4U_PORT_L25_CAM_MRAW0_CQI_M1 MTK_M4U_ID(25, 1)
338 #define M4U_PORT_L25_CAM_MRAW0_CQI_M2 MTK_M4U_ID(25, 2)
339 #define M4U_PORT_L25_CAM_MRAW0_IMGO_M1 MTK_M4U_ID(25, 3)
340 #define M4U_PORT_L25_CAM_MRAW0_IMGBO_M1 MTK_M4U_ID(25, 4)
341 #define M4U_PORT_L25_CAM_MRAW2_LSCI_M1 MTK_M4U_ID(25, 5)
342 #define M4U_PORT_L25_CAM_MRAW2_CQI_M1 MTK_M4U_ID(25, 6)
343 #define M4U_PORT_L25_CAM_MRAW2_CQI_M2 MTK_M4U_ID(25, 7)
344 #define M4U_PORT_L25_CAM_MRAW2_IMGO_M1 MTK_M4U_ID(25, 8)
345 #define M4U_PORT_L25_CAM_MRAW2_IMGBO_M1 MTK_M4U_ID(25, 9)
346 #define M4U_PORT_L25_CAM_MRAW0_AFO_M1 MTK_M4U_ID(25, 10)
347 #define M4U_PORT_L25_CAM_MRAW2_AFO_M1 MTK_M4U_ID(25, 11)
400 #define IOMMU_PORT_INFRA_SSUSB_P1_1_W MTK_IFAIOMMU_PERI_ID(25)