dt-bindings/memory/mt8192-larb-port.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
18  * modules    dma-address-region	larbs-ports
19  * disp         0 ~ 4G                   larb0/1
21  * cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
22  * CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
30 #define M4U_PORT_L0_OVL_RDMA0_HDR		MTK_M4U_ID(0, 1)
37 #define M4U_PORT_L1_OVL_2L_RDMA0_HDR		MTK_M4U_ID(1, 0)
38 #define M4U_PORT_L1_OVL_2L_RDMA2_HDR		MTK_M4U_ID(1, 1)
39 #define M4U_PORT_L1_OVL_2L_RDMA0		MTK_M4U_ID(1, 2)
40 #define M4U_PORT_L1_OVL_2L_RDMA2		MTK_M4U_ID(1, 3)
41 #define M4U_PORT_L1_DISP_MDP_RDMA4		MTK_M4U_ID(1, 4)
42 #define M4U_PORT_L1_DISP_RDMA4			MTK_M4U_ID(1, 5)
43 #define M4U_PORT_L1_DISP_UFBC_WDMA0		MTK_M4U_ID(1, 6)
44 #define M4U_PORT_L1_DISP_FAKE1			MTK_M4U_ID(1, 7)
48 #define M4U_PORT_L2_MDP_RDMA1			MTK_M4U_ID(2, 1)
57 #define M4U_PORT_L4_VDEC_UFO_EXT		MTK_M4U_ID(4, 1)
65 #define M4U_PORT_L4_VDEC_AVC_MV_EXT		MTK_M4U_ID(4, 9)
70 #define M4U_PORT_L5_VDEC_LAT0_VLD2_EXT		MTK_M4U_ID(5, 1)
82 #define M4U_PORT_L7_VENC_REC			MTK_M4U_ID(7, 1)
90 #define M4U_PORT_L7_JPGENC_Y_RDMA		MTK_M4U_ID(7, 9)
100 #define M4U_PORT_L9_IMG_IMGI_D1			MTK_M4U_ID(9, 0)
101 #define M4U_PORT_L9_IMG_IMGBI_D1		MTK_M4U_ID(9, 1)
102 #define M4U_PORT_L9_IMG_DMGI_D1			MTK_M4U_ID(9, 2)
103 #define M4U_PORT_L9_IMG_DEPI_D1			MTK_M4U_ID(9, 3)
104 #define M4U_PORT_L9_IMG_ICE_D1			MTK_M4U_ID(9, 4)
105 #define M4U_PORT_L9_IMG_SMTI_D1			MTK_M4U_ID(9, 5)
106 #define M4U_PORT_L9_IMG_SMTO_D2			MTK_M4U_ID(9, 6)
107 #define M4U_PORT_L9_IMG_SMTO_D1			MTK_M4U_ID(9, 7)
108 #define M4U_PORT_L9_IMG_CRZO_D1			MTK_M4U_ID(9, 8)
109 #define M4U_PORT_L9_IMG_IMG3O_D1		MTK_M4U_ID(9, 9)
110 #define M4U_PORT_L9_IMG_VIPI_D1			MTK_M4U_ID(9, 10)
111 #define M4U_PORT_L9_IMG_SMTI_D5			MTK_M4U_ID(9, 11)
112 #define M4U_PORT_L9_IMG_TIMGO_D1		MTK_M4U_ID(9, 12)
113 #define M4U_PORT_L9_IMG_UFBC_W0			MTK_M4U_ID(9, 13)
114 #define M4U_PORT_L9_IMG_UFBC_R0			MTK_M4U_ID(9, 14)
120 #define M4U_PORT_L11_IMG_IMGBI_D1		MTK_M4U_ID(11, 1)
128 #define M4U_PORT_L11_IMG_IMG3O_D1		MTK_M4U_ID(11, 9)
150 #define M4U_PORT_L13_CAM_MRAWO0			MTK_M4U_ID(13, 1)
158 #define M4U_PORT_L13_CAM_CCUI			MTK_M4U_ID(13, 9)
164 #define M4U_PORT_L14_CAM_RESERVE2		MTK_M4U_ID(14, 1)
174 #define M4U_PORT_L16_CAM_RRZO_R1_A		MTK_M4U_ID(16, 1)
182 #define M4U_PORT_L16_CAM_AFO_R1_A		MTK_M4U_ID(16, 9)
193 #define M4U_PORT_L17_CAM_RRZO_R1_B		MTK_M4U_ID(17, 1)
201 #define M4U_PORT_L17_CAM_AFO_R1_B		MTK_M4U_ID(17, 9)
212 #define M4U_PORT_L18_CAM_RRZO_R1_C		MTK_M4U_ID(18, 1)
220 #define M4U_PORT_L18_CAM_AFO_R1_C		MTK_M4U_ID(18, 9)
231 #define M4U_PORT_L19_IPE_DVS_WDMA		MTK_M4U_ID(19, 1)
237 #define M4U_PORT_L20_IPE_FDVT_RDB		MTK_M4U_ID(20, 1)