dt-bindings/memory/mediatek%2Cmt8188-memory-port.h

1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
9 #include <dt-bindings/memory/mtk-memory-port.h>
51  * This is the suggested mapping in this SoC:
53  * modules    dma-address-region	larbs-ports
61  * This SoC have two MM IOMMU HWs, this is the connected information:
62  * iommu-vdo: larb0/2/5/9/10/11A/11C/13/16B/17B/19/21
63  * iommu-vpp: larb1/3/4/6/7/11B/12/14/15/16A/17A/23/27
69 /* LARB 0 -- VDO-0 */
78 /* LARB 1 -- VD0-0 */
87 /* LARB 2 -- VDO-1 */
94 /* LARB 3 -- VDO-1 */
103 /* LARB 4 -- VPP-0 */
112 /* LARB 5 -- VPP-1 */
122 /* LARB 6 -- VPP-1 */
128 /* LARB 7 -- WPE */
133 /* LARB 9 -- IMG-M */
160 /* LARB 10 -- IMG-D */
182 /* LARB 11A -- IMG-D */
214 /* LARB 11B -- IMG-D */
246 /* LARB 11C -- IMG-D */
278 /* LARB 12 -- IPE */
296 /* LARB 13 -- CAM-1 */
322 /* LARB 14 -- CAM-1 */
347 /* LARB 15 -- IMG-D */
368 /* LARB 16A -- CAM */
387 /* LARB 16B -- CAM */
406 /* LARB 17A -- CAM */
415 /* LARB 17B -- CAM */
424 /* LARB 19 -- VENC */
453 /* LARB 21 -- VDEC-CORE0 */
466 /* LARB 23 -- VDEC-SOC */
477 /* LARB 27 -- CCU */
483 /* LARB 28 -- AXI-CCU */