Lines Matching +full:32 +full:- +full:61
1 /* SPDX-License-Identifier: GPL-2.0 */
36 #define CLK_MOUT_SCLK_MMC2_A 32
65 #define CLK_MOUT_SCLK_SPDIF 61
233 #define CLK_MOUT_SCLK_DECON_ECLK_B 32
257 #define CLK_DIV_ACLK_MIF_133 61
427 #define CLK_SCLK_SPI1 32
456 #define CLK_SCLK_IOCLK_SPI0 61
497 #define CLK_PCLK_OTP_CON_APBIF 32
540 #define CLK_PHYCLK_USBHOST20_PHY_HSIC1_PHY 32
558 #define CLK_SCLK_MMC2 61
674 #define CLK_DIV_SCLK_DSIM0_DISP 32
701 #define CLK_ACLK_XIU_DECON1X 61
794 #define CLK_PCLK_AUD_SLIMBUS 32
949 #define CLK_SCLK_HPM_ATLAS 32
1069 #define CLK_ACLK_SMMU_SCALERP 32
1098 #define CLK_PCLK_ASYNCAXI_DIS0 61
1150 #define CLK_DIV_ACLK_CAM0_BUS_400 32
1178 #define CLK_ACLK_ASYNCAPBM_3AA1 61
1287 #define CLK_ACLK_ASYNCAPBS_LITE_C 32
1316 #define CLK_ACLK_SMMU_LITE_C 61