drivers/watchdog/sc520_wdt.c

1 // SPDX-License-Identifier: GPL-2.0-or-later
9  *	any of this software. This material is provided "AS-IS" in
13  *           9/27 - 2001      [Initial release]
16  *	-	Fixed formatting
17  *	-	Removed debug printks
18  *	-	Fixed SMP built kernel deadlock
19  *	-	Switched to private locks not lock_kernel
20  *	-	Used ioremap/writew/readw
21  *	-	Added NOWAYOUT support
22  *	4/12 - 2002 Changes by Rob Radez <rob@osinvestor.com>
23  *	-	Change comments
24  *	-	Eliminate fop_llseek
25  *	-	Change CONFIG_WATCHDOG_NOWAYOUT semantics
26  *	-	Add KERN_* tags to printks
27  *	-	fix possible wdt_is_open race
28  *	-	Report proper capabilities in watchdog_info
29  *	-	Add WDIOC_{GETSTATUS, GETBOOTSTATUS, SETTIMEOUT,
31  *	09/8 - 2003 Changes by Wim Van Sebroeck <wim@iguana.be>
32  *	-	cleanup of trailing spaces
33  *	-	added extra printk's for startup problems
34  *	-	use module_param
35  *	-	made timeout (the emulated heartbeat) a module_param
36  *	-	made the keepalive ping an internal subroutine
37  *	3/27 - 2004 Changes by Sean Young <sean@mess.org>
38  *	-	set MMCR_BASE to 0xfffef000
39  *	-	CBAR does not need to be read
40  *	-	removed debugging printks
46  *  daemon always getting scheduled within that time frame.
70  * The AMD Elan SC520 timeout value is 492us times a power of 2 (0-7)
73  *   1: 503ms    3: 2.01s    5: 8.05s   7: 32.21s
76  * If we reset the watchdog every ~250ms we should be safe.
102  * AMD Elan SC520 - Watchdog Timer Registers
108 #define WDT_EXP_SEL_01	0x0001	/* [01] Time-out = 496 us (with 33 Mhz clk). */
109 #define WDT_EXP_SEL_02	0x0002	/* [02] Time-out = 508 ms (with 33 Mhz clk). */
110 #define WDT_EXP_SEL_03	0x0004	/* [03] Time-out = 1.02 s (with 33 Mhz clk). */
111 #define WDT_EXP_SEL_04	0x0008	/* [04] Time-out = 2.03 s (with 33 Mhz clk). */
112 #define WDT_EXP_SEL_05	0x0010	/* [05] Time-out = 4.07 s (with 33 Mhz clk). */
113 #define WDT_EXP_SEL_06	0x0020	/* [06] Time-out = 8.13 s (with 33 Mhz clk). */
114 #define WDT_EXP_SEL_07	0x0040	/* [07] Time-out = 16.27s (with 33 Mhz clk). */
115 #define WDT_EXP_SEL_08	0x0080	/* [08] Time-out = 32.54s (with 33 Mhz clk). */
145 		/* Re-set the timer interval */  in wdt_timer_ping()
159 	/* buy some time (ping) */  in wdt_config()
164 	/* unlock WDT = make WDT configuration register writable one time */  in wdt_config()
208 		return -EINVAL;  in wdt_set_heartbeat()
234 					return -EFAULT;  in fop_write()
251 		return -EBUSY;  in fop_open()
286 		return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;  in fop_ioctl()
292 		int new_options, retval = -EINVAL;  in fop_ioctl()
295 			return -EFAULT;  in fop_ioctl()
317 			return -EFAULT;  in fop_ioctl()
320 			return -EINVAL;  in fop_ioctl()
328 		return -ENOTTY;  in fop_ioctl()
381 	int rc = -EBUSY;  in sc520_wdt_init()
394 		rc = -ENOMEM;  in sc520_wdt_init()