w1/masters/amd_axi_w1.c

3  * amd_axi_w1 - AMD 1Wire programmable logic bus host driver
23 /* 1-wire AMD IP definition */
41 #define AXIW1_READY	BIT(4)
51 #define AXIW1_READY_IRQ_EN	BIT(4)
113 	/* Wait for READY signal to be 1 to ensure 1-wire IP is ready */  in amd_axi_w1_touch_bit()
161 	/* Wait for READY signal to be 1 to ensure 1-wire IP is ready */  in amd_axi_w1_read_byte()
202 	/* Wait for READY signal to be 1 to ensure 1-wire IP is ready */  in amd_axi_w1_write_byte()
240 	/* Reset 1-wire Axi IP */  in amd_axi_w1_reset_bus()
243 	/* Wait for READY signal to be 1 to ensure 1-wire IP is ready */  in amd_axi_w1_reset_bus()
272 /* Reset the 1-wire AXI IP. Put the IP in reset state and clear registers */
329 		dev_err(dev, "AMD 1-wire IP not detected in hardware\n");  in amd_axi_w1_probe()
379 	{ .compatible = "amd,axi-1wire-host" },
396 MODULE_DESCRIPTION("Driver for AMD AXI 1 Wire IP core");