Lines Matching defs:GFX_DPA_SETTING

144 struct GFX_DPA_SETTING {  struct
145 	int ClkRangeIndex;
146 	u8 DVP0;		/* CR96[3:0] */
147 	u8 DVP0DataDri_S1;	/* SR2A[5]   */
148 	u8 DVP0DataDri_S;	/* SR1B[1]   */
149 	u8 DVP0ClockDri_S1;	/* SR2A[4]   */
150 	u8 DVP0ClockDri_S;	/* SR1E[2]   */
151 	u8 DVP1;		/* CR9B[3:0] */
152 	u8 DVP1Driving;		/* SR65[3:0], Data and Clock driving */
153 	u8 DFPHigh;		/* CR97[3:0] */
154 	u8 DFPLow;		/* CR99[3:0] */