Lines Matching refs:ufx_reg_write
168 static int ufx_reg_write(struct ufx_data *dev, u32 index, u32 data) in ufx_reg_write() function
206 status = ufx_reg_write(dev, index, data); in ufx_reg_clear_and_set_bits()
228 status = ufx_reg_write(dev, 0x3008, 0x00000001); in ufx_lite_reset()
255 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_blank()
292 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_unblank()
329 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_disable()
366 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_enable()
387 int status = ufx_reg_write(dev, 0x700C, 0x8000000F); in ufx_config_sys_clk()
390 status = ufx_reg_write(dev, 0x7014, 0x0010024F); in ufx_config_sys_clk()
393 status = ufx_reg_write(dev, 0x7010, 0x00000000); in ufx_config_sys_clk()
411 status = ufx_reg_write(dev, 0x0004, 0x001F0F77); in ufx_config_ddr2()
414 status = ufx_reg_write(dev, 0x0008, 0xFFF00000); in ufx_config_ddr2()
417 status = ufx_reg_write(dev, 0x000C, 0x0FFF2222); in ufx_config_ddr2()
420 status = ufx_reg_write(dev, 0x0010, 0x00030814); in ufx_config_ddr2()
423 status = ufx_reg_write(dev, 0x0014, 0x00500019); in ufx_config_ddr2()
426 status = ufx_reg_write(dev, 0x0018, 0x020D0F15); in ufx_config_ddr2()
429 status = ufx_reg_write(dev, 0x001C, 0x02532305); in ufx_config_ddr2()
432 status = ufx_reg_write(dev, 0x0020, 0x0B030905); in ufx_config_ddr2()
435 status = ufx_reg_write(dev, 0x0024, 0x00000827); in ufx_config_ddr2()
438 status = ufx_reg_write(dev, 0x0028, 0x00000000); in ufx_config_ddr2()
441 status = ufx_reg_write(dev, 0x002C, 0x00000042); in ufx_config_ddr2()
444 status = ufx_reg_write(dev, 0x0030, 0x09520000); in ufx_config_ddr2()
447 status = ufx_reg_write(dev, 0x0034, 0x02223314); in ufx_config_ddr2()
450 status = ufx_reg_write(dev, 0x0038, 0x00430043); in ufx_config_ddr2()
453 status = ufx_reg_write(dev, 0x003C, 0xF00F000F); in ufx_config_ddr2()
456 status = ufx_reg_write(dev, 0x0040, 0xF380F00F); in ufx_config_ddr2()
459 status = ufx_reg_write(dev, 0x0044, 0xF00F0496); in ufx_config_ddr2()
462 status = ufx_reg_write(dev, 0x0048, 0x03080406); in ufx_config_ddr2()
465 status = ufx_reg_write(dev, 0x004C, 0x00001000); in ufx_config_ddr2()
468 status = ufx_reg_write(dev, 0x005C, 0x00000007); in ufx_config_ddr2()
471 status = ufx_reg_write(dev, 0x0100, 0x54F00012); in ufx_config_ddr2()
474 status = ufx_reg_write(dev, 0x0104, 0x00004012); in ufx_config_ddr2()
477 status = ufx_reg_write(dev, 0x0118, 0x40404040); in ufx_config_ddr2()
480 status = ufx_reg_write(dev, 0x0000, 0x00000001); in ufx_config_ddr2()
630 status = ufx_reg_write(dev, 0x7000, 0x8000000F); in ufx_config_pix_clk()
635 status = ufx_reg_write(dev, 0x7008, value); in ufx_config_pix_clk()
640 status = ufx_reg_write(dev, 0x7004, value); in ufx_config_pix_clk()
665 int status = ufx_reg_write(dev, 0x8028, 0); in ufx_set_vid_mode()
668 status = ufx_reg_write(dev, 0x8024, 0); in ufx_set_vid_mode()
681 status = ufx_reg_write(dev, 0x2000, 0x00000104); in ufx_set_vid_mode()
693 status = ufx_reg_write(dev, 0x2008, temp); in ufx_set_vid_mode()
697 status = ufx_reg_write(dev, 0x200C, temp); in ufx_set_vid_mode()
701 status = ufx_reg_write(dev, 0x2010, temp); in ufx_set_vid_mode()
713 status = ufx_reg_write(dev, 0x2014, temp); in ufx_set_vid_mode()
717 status = ufx_reg_write(dev, 0x2018, temp); in ufx_set_vid_mode()
721 status = ufx_reg_write(dev, 0x201C, temp); in ufx_set_vid_mode()
724 status = ufx_reg_write(dev, 0x2020, 0x00000000); in ufx_set_vid_mode()
727 status = ufx_reg_write(dev, 0x2024, 0x00000000); in ufx_set_vid_mode()
733 status = ufx_reg_write(dev, 0x2028, temp); in ufx_set_vid_mode()
737 status = ufx_reg_write(dev, 0x2040, 0); in ufx_set_vid_mode()
740 status = ufx_reg_write(dev, 0x2044, 0); in ufx_set_vid_mode()
743 status = ufx_reg_write(dev, 0x2048, 0); in ufx_set_vid_mode()
754 status = ufx_reg_write(dev, 0x2040, temp); in ufx_set_vid_mode()
766 status = ufx_reg_write(dev, 0x8028, 0x00000003); in ufx_set_vid_mode()
770 status = ufx_reg_write(dev, 0x8024, 0x00000007); in ufx_set_vid_mode()
1302 int status = ufx_reg_write(dev, 0x106C, 0x00); in ufx_i2c_init()
1307 status = ufx_reg_write(dev, 0x1018, 12); in ufx_i2c_init()
1311 status = ufx_reg_write(dev, 0x1014, 6); in ufx_i2c_init()
1327 status = ufx_reg_write(dev, 0x1000, tmp); in ufx_i2c_init()
1335 status = ufx_reg_write(dev, 0x106C, 0x01); in ufx_i2c_init()
1344 int status = ufx_reg_write(dev, 0x106C, 0x00); in ufx_i2c_configure()
1347 status = ufx_reg_write(dev, 0x3010, 0x00000000); in ufx_i2c_configure()
1354 status = ufx_reg_write(dev, 0x106C, 0x01); in ufx_i2c_configure()
1387 status = ufx_reg_write(dev, 0x1100, 0x40000000); in ufx_i2c_wait_busy()
1412 status = ufx_reg_write(dev, 0x1100, temp); in ufx_read_edid()
1416 status = ufx_reg_write(dev, 0x1100, temp); in ufx_read_edid()