3  * HDMI driver for OMAP5
14 #define DSS_SUBSYS_NAME "HDMI"
32 #include <sound/omap-hdmi-audio.h>
38 static struct omap_hdmi hdmi;  variable
46 	r = pm_runtime_resume_and_get(&hdmi.pdev->dev);  in hdmi_runtime_get()
59 	r = pm_runtime_put_sync(&hdmi.pdev->dev);  in hdmi_runtime_put()
88 		v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);  in hdmi_irq_handler()
91 		hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);  in hdmi_irq_handler()
98 		REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);  in hdmi_irq_handler()
113 	if (hdmi.vdda_reg != NULL)  in hdmi_init_regulator()
116 	reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");  in hdmi_init_regulator()
122 	hdmi.vdda_reg = reg;  in hdmi_init_regulator()
131 	r = regulator_enable(hdmi.vdda_reg);  in hdmi_power_on_core()
139 	/* Make selection of HDMI in DSS */  in hdmi_power_on_core()
142 	hdmi.core_enabled = true;  in hdmi_power_on_core()
147 	regulator_disable(hdmi.vdda_reg);  in hdmi_power_on_core()
154 	hdmi.core_enabled = false;  in hdmi_power_off_core()
157 	regulator_disable(hdmi.vdda_reg);  in hdmi_power_off_core()
164 	struct omap_overlay_manager *mgr = hdmi.output.manager;  in hdmi_power_on_full()
171 	p = &hdmi.cfg.timings;  in hdmi_power_on_full()
175 	hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);  in hdmi_power_on_full()
178 	hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);  in hdmi_power_on_full()
179 	hdmi_wp_set_irqstatus(&hdmi.wp,  in hdmi_power_on_full()
180 			hdmi_wp_get_irqstatus(&hdmi.wp));  in hdmi_power_on_full()
182 	r = dss_pll_enable(&hdmi.pll.pll);  in hdmi_power_on_full()
188 	r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);  in hdmi_power_on_full()
194 	r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,  in hdmi_power_on_full()
201 	r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);  in hdmi_power_on_full()
205 	hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);  in hdmi_power_on_full()
213 	r = hdmi_wp_video_start(&hdmi.wp);  in hdmi_power_on_full()
221 	hdmi_wp_set_irqenable(&hdmi.wp,  in hdmi_power_on_full()
227 	hdmi_wp_video_stop(&hdmi.wp);  in hdmi_power_on_full()
229 	hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);  in hdmi_power_on_full()
233 	dss_pll_disable(&hdmi.pll.pll);  in hdmi_power_on_full()
241 	struct omap_overlay_manager *mgr = hdmi.output.manager;  in hdmi_power_off_full()
243 	hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);  in hdmi_power_off_full()
247 	hdmi_wp_video_stop(&hdmi.wp);  in hdmi_power_off_full()
249 	hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);  in hdmi_power_off_full()
251 	dss_pll_disable(&hdmi.pll.pll);  in hdmi_power_off_full()
259 	struct omap_dss_device *out = &hdmi.output;  in hdmi_display_check_timing()
274 	mutex_lock(&hdmi.lock);  in hdmi_display_set_timing()
276 	hdmi.cfg.timings = *timings;  in hdmi_display_set_timing()
280 	mutex_unlock(&hdmi.lock);  in hdmi_display_set_timing()
286 	*timings = hdmi.cfg.timings;  in hdmi_display_get_timings()
291 	mutex_lock(&hdmi.lock);  in hdmi_dump_regs()
294 		mutex_unlock(&hdmi.lock);  in hdmi_dump_regs()
298 	hdmi_wp_dump(&hdmi.wp, s);  in hdmi_dump_regs()
299 	hdmi_pll_dump(&hdmi.pll, s);  in hdmi_dump_regs()
300 	hdmi_phy_dump(&hdmi.phy, s);  in hdmi_dump_regs()
301 	hdmi5_core_dump(&hdmi.core, s);  in hdmi_dump_regs()
304 	mutex_unlock(&hdmi.lock);  in hdmi_dump_regs()
312 	mutex_lock(&hdmi.lock);  in read_edid()
317 	idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);  in read_edid()
319 	REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);  in read_edid()
321 	r = hdmi5_read_edid(&hdmi.core,  buf, len);  in read_edid()
323 	REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);  in read_edid()
326 	mutex_unlock(&hdmi.lock);  in read_edid()
333 	REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);  in hdmi_start_audio_stream()
347 	struct omap_dss_device *out = &hdmi.output;  in hdmi_display_enable()
353 	mutex_lock(&hdmi.lock);  in hdmi_display_enable()
367 	if (hdmi.audio_configured) {  in hdmi_display_enable()
368 		r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,  in hdmi_display_enable()
369 				       hdmi.cfg.timings.pixelclock);  in hdmi_display_enable()
372 			hdmi.audio_abort_cb(&hdmi.pdev->dev);  in hdmi_display_enable()
373 			hdmi.audio_configured = false;  in hdmi_display_enable()
377 	spin_lock_irqsave(&hdmi.audio_playing_lock, flags);  in hdmi_display_enable()
378 	if (hdmi.audio_configured && hdmi.audio_playing)  in hdmi_display_enable()
379 		hdmi_start_audio_stream(&hdmi);  in hdmi_display_enable()
380 	hdmi.display_enabled = true;  in hdmi_display_enable()
381 	spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);  in hdmi_display_enable()
383 	mutex_unlock(&hdmi.lock);  in hdmi_display_enable()
387 	mutex_unlock(&hdmi.lock);  in hdmi_display_enable()
397 	mutex_lock(&hdmi.lock);  in hdmi_display_disable()
399 	spin_lock_irqsave(&hdmi.audio_playing_lock, flags);  in hdmi_display_disable()
400 	hdmi_stop_audio_stream(&hdmi);  in hdmi_display_disable()
401 	hdmi.display_enabled = false;  in hdmi_display_disable()
402 	spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);  in hdmi_display_disable()
406 	mutex_unlock(&hdmi.lock);  in hdmi_display_disable()
415 	mutex_lock(&hdmi.lock);  in hdmi_core_enable()
423 	mutex_unlock(&hdmi.lock);  in hdmi_core_enable()
427 	mutex_unlock(&hdmi.lock);  in hdmi_core_enable()
435 	mutex_lock(&hdmi.lock);  in hdmi_core_disable()
439 	mutex_unlock(&hdmi.lock);  in hdmi_core_disable()
491 	need_enable = hdmi.core_enabled == false;  in hdmi_read_edid()
510 	hdmi.cfg.infoframe = *avi;  in hdmi_set_infoframe()
517 	hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;  in hdmi_set_hdmi_mode()
539 	struct omap_dss_device *out = &hdmi.output;  in hdmi_init_output()
544 	out->name = "hdmi.0";  in hdmi_init_output()
546 	out->ops.hdmi = &hdmi_ops;  in hdmi_init_output()
554 	struct omap_dss_device *out = &hdmi.output;  in hdmi_uninit_output()
569 	r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);  in hdmi_probe_of()
688 		.audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),  in hdmi_audio_register()
692 	hdmi.audio_pdev = platform_device_register_data(  in hdmi_audio_register()
693 		dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,  in hdmi_audio_register()
696 	if (IS_ERR(hdmi.audio_pdev))  in hdmi_audio_register()
697 		return PTR_ERR(hdmi.audio_pdev);  in hdmi_audio_register()
700 	hdmi.wp_idlemode =  in hdmi_audio_register()
701 		REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);  in hdmi_audio_register()
707 /* HDMI HW IP initialisation */
714 	hdmi.pdev = pdev;  in hdmi5_bind()
715 	platform_set_drvdata(pdev, &hdmi);  in hdmi5_bind()
717 	mutex_init(&hdmi.lock);  in hdmi5_bind()
718 	spin_lock_init(&hdmi.audio_playing_lock);  in hdmi5_bind()
726 	r = hdmi_wp_init(pdev, &hdmi.wp);  in hdmi5_bind()
730 	r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);  in hdmi5_bind()
734 	r = hdmi_phy_init(pdev, &hdmi.phy);  in hdmi5_bind()
738 	r = hdmi5_core_init(pdev, &hdmi.core);  in hdmi5_bind()
751 			IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);  in hdmi5_bind()
753 		DSSERR("HDMI IRQ request failed\n");  in hdmi5_bind()
763 		DSSERR("Registering HDMI audio failed %d\n", r);  in hdmi5_bind()
769 	dss_debugfs_create_file("hdmi", hdmi_dump_regs);  in hdmi5_bind()
773 	hdmi_pll_uninit(&hdmi.pll);  in hdmi5_bind()
781 	if (hdmi.audio_pdev)  in hdmi5_unbind()
782 		platform_device_unregister(hdmi.audio_pdev);  in hdmi5_unbind()
786 	hdmi_pll_uninit(&hdmi.pll);  in hdmi5_unbind()
830 	{ .compatible = "ti,omap5-hdmi", },
831 	{ .compatible = "ti,dra7-hdmi", },