Lines Matching +full:clkout +full:- +full:fmt
1 // SPDX-License-Identifier: GPL-2.0-only
408 return to_platform_device(dssdev->dev); in dsi_get_dsidev_from_dssdev()
429 return out ? to_platform_device(out->dev) : NULL; in dsi_get_dsidev_from_id()
439 case DSI_PROTO: base = dsi->proto_base; break; in dsi_write_reg()
440 case DSI_PHY: base = dsi->phy_base; break; in dsi_write_reg()
441 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
455 case DSI_PROTO: base = dsi->proto_base; break; in dsi_read_reg()
456 case DSI_PHY: base = dsi->phy_base; break; in dsi_read_reg()
457 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg()
469 down(&dsi->bus_lock); in dsi_bus_lock()
477 up(&dsi->bus_lock); in dsi_bus_unlock()
484 return dsi->bus_lock.count == 0; in dsi_bus_is_locked()
501 while (t-- > 0) { in wait_for_bit_change()
520 u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) in dsi_get_pixel_size() argument
522 switch (fmt) { in dsi_get_pixel_size()
540 dsi->perf_setup_time = ktime_get(); in dsi_perf_mark_setup()
546 dsi->perf_start_time = ktime_get(); in dsi_perf_mark_start()
561 setup_time = ktime_sub(dsi->perf_start_time, dsi->perf_setup_time); in dsi_perf_show()
566 trans_time = ktime_sub(t, dsi->perf_start_time); in dsi_perf_show()
573 total_bytes = dsi->update_bytes; in dsi_perf_show()
698 spin_lock(&dsi->irq_stats_lock); in dsi_collect_irq_stats()
700 dsi->irq_stats.irq_count++; in dsi_collect_irq_stats()
701 dss_collect_irq_stats(irqstatus, dsi->irq_stats.dsi_irqs); in dsi_collect_irq_stats()
704 dss_collect_irq_stats(vcstatus[i], dsi->irq_stats.vc_irqs[i]); in dsi_collect_irq_stats()
706 dss_collect_irq_stats(ciostatus, dsi->irq_stats.cio_irqs); in dsi_collect_irq_stats()
708 spin_unlock(&dsi->irq_stats_lock); in dsi_collect_irq_stats()
725 spin_lock(&dsi->errors_lock); in dsi_handle_irq_errors()
726 dsi->errors |= irqstatus & DSI_IRQ_ERROR_MASK; in dsi_handle_irq_errors()
727 spin_unlock(&dsi->errors_lock); in dsi_handle_irq_errors()
758 if (isr_data->isr && isr_data->mask & irqstatus) in dsi_call_isrs()
759 isr_data->isr(isr_data->arg, irqstatus); in dsi_call_isrs()
768 dsi_call_isrs(isr_tables->isr_table, in dsi_handle_isrs()
769 ARRAY_SIZE(isr_tables->isr_table), in dsi_handle_isrs()
775 dsi_call_isrs(isr_tables->isr_table_vc[i], in dsi_handle_isrs()
776 ARRAY_SIZE(isr_tables->isr_table_vc[i]), in dsi_handle_isrs()
781 dsi_call_isrs(isr_tables->isr_table_cio, in dsi_handle_isrs()
782 ARRAY_SIZE(isr_tables->isr_table_cio), in dsi_handle_isrs()
796 if (!dsi->is_enabled) in omap_dsi_irq_handler()
799 spin_lock(&dsi->irq_lock); in omap_dsi_irq_handler()
805 spin_unlock(&dsi->irq_lock); in omap_dsi_irq_handler()
838 del_timer(&dsi->te_timer); in omap_dsi_irq_handler()
843 memcpy(&dsi->isr_tables_copy, &dsi->isr_tables, in omap_dsi_irq_handler()
844 sizeof(dsi->isr_tables)); in omap_dsi_irq_handler()
846 spin_unlock(&dsi->irq_lock); in omap_dsi_irq_handler()
848 dsi_handle_isrs(&dsi->isr_tables_copy, irqstatus, vcstatus, ciostatus); in omap_dsi_irq_handler()
857 /* dsi->irq_lock has to be locked by the caller */
874 if (isr_data->isr == NULL) in _omap_dsi_configure_irqs()
877 mask |= isr_data->mask; in _omap_dsi_configure_irqs()
890 /* dsi->irq_lock has to be locked by the caller */
898 _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table, in _omap_dsi_set_irqs()
899 ARRAY_SIZE(dsi->isr_tables.isr_table), mask, in _omap_dsi_set_irqs()
903 /* dsi->irq_lock has to be locked by the caller */
908 _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_vc[vc], in _omap_dsi_set_irqs_vc()
909 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc]), in _omap_dsi_set_irqs_vc()
914 /* dsi->irq_lock has to be locked by the caller */
919 _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_cio, in _omap_dsi_set_irqs_cio()
920 ARRAY_SIZE(dsi->isr_tables.isr_table_cio), in _omap_dsi_set_irqs_cio()
931 spin_lock_irqsave(&dsi->irq_lock, flags); in _dsi_initialize_irq()
933 memset(&dsi->isr_tables, 0, sizeof(dsi->isr_tables)); in _dsi_initialize_irq()
940 spin_unlock_irqrestore(&dsi->irq_lock, flags); in _dsi_initialize_irq()
953 free_idx = -1; in _dsi_register_isr()
957 if (isr_data->isr == isr && isr_data->arg == arg && in _dsi_register_isr()
958 isr_data->mask == mask) { in _dsi_register_isr()
959 return -EINVAL; in _dsi_register_isr()
962 if (isr_data->isr == NULL && free_idx == -1) in _dsi_register_isr()
966 if (free_idx == -1) in _dsi_register_isr()
967 return -EBUSY; in _dsi_register_isr()
970 isr_data->isr = isr; in _dsi_register_isr()
971 isr_data->arg = arg; in _dsi_register_isr()
972 isr_data->mask = mask; in _dsi_register_isr()
985 if (isr_data->isr != isr || isr_data->arg != arg || in _dsi_unregister_isr()
986 isr_data->mask != mask) in _dsi_unregister_isr()
989 isr_data->isr = NULL; in _dsi_unregister_isr()
990 isr_data->arg = NULL; in _dsi_unregister_isr()
991 isr_data->mask = 0; in _dsi_unregister_isr()
996 return -EINVAL; in _dsi_unregister_isr()
1006 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr()
1008 r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table, in dsi_register_isr()
1009 ARRAY_SIZE(dsi->isr_tables.isr_table)); in dsi_register_isr()
1014 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr()
1026 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr()
1028 r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table, in dsi_unregister_isr()
1029 ARRAY_SIZE(dsi->isr_tables.isr_table)); in dsi_unregister_isr()
1034 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr()
1046 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr_vc()
1049 dsi->isr_tables.isr_table_vc[channel], in dsi_register_isr_vc()
1050 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); in dsi_register_isr_vc()
1055 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr_vc()
1067 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr_vc()
1070 dsi->isr_tables.isr_table_vc[channel], in dsi_unregister_isr_vc()
1071 ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); in dsi_unregister_isr_vc()
1076 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr_vc()
1088 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_register_isr_cio()
1090 r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, in dsi_register_isr_cio()
1091 ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); in dsi_register_isr_cio()
1096 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_register_isr_cio()
1108 spin_lock_irqsave(&dsi->irq_lock, flags); in dsi_unregister_isr_cio()
1110 r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, in dsi_unregister_isr_cio()
1111 ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); in dsi_unregister_isr_cio()
1116 spin_unlock_irqrestore(&dsi->irq_lock, flags); in dsi_unregister_isr_cio()
1126 spin_lock_irqsave(&dsi->errors_lock, flags); in dsi_get_errors()
1127 e = dsi->errors; in dsi_get_errors()
1128 dsi->errors = 0; in dsi_get_errors()
1129 spin_unlock_irqrestore(&dsi->errors_lock, flags); in dsi_get_errors()
1140 r = pm_runtime_resume_and_get(&dsi->pdev->dev); in dsi_runtime_get()
1153 r = pm_runtime_put_sync(&dsi->pdev->dev); in dsi_runtime_put()
1154 WARN_ON(r < 0 && r != -ENOSYS); in dsi_runtime_put()
1162 if (dsi->vdds_dsi_reg != NULL) in dsi_regulator_init()
1165 vdds_dsi = devm_regulator_get(&dsi->pdev->dev, "vdd"); in dsi_regulator_init()
1168 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER) in dsi_regulator_init()
1173 dsi->vdds_dsi_reg = vdds_dsi; in dsi_regulator_init()
1222 return -EIO; in dsi_if_enable()
1232 return dsi->pll.cinfo.clkout[HSDIV_DISPC]; in dsi_get_pll_hsdiv_dispc_rate()
1239 return dsi->pll.cinfo.clkout[HSDIV_DSI]; in dsi_get_pll_hsdiv_dsi_rate()
1246 return dsi->pll.cinfo.clkdco / 16; in dsi_get_txbyteclkhs()
1254 if (dss_get_dsi_clk_source(dsi->module_id) == OMAP_DSS_CLK_SRC_FCK) { in dsi_fclk_rate()
1256 r = clk_get_rate(dsi->dss_clk); in dsi_fclk_rate()
1276 return -EINVAL; in dsi_lp_clock_calc()
1278 lp_cinfo->lp_clk_div = lp_clk_div; in dsi_lp_clock_calc()
1279 lp_cinfo->lp_clk = lp_clk; in dsi_lp_clock_calc()
1293 lp_clk_div = dsi->user_lp_cinfo.lp_clk_div; in dsi_set_lp_clk_divisor()
1296 return -EINVAL; in dsi_set_lp_clk_divisor()
1303 dsi->current_lp_cinfo.lp_clk = lp_clk; in dsi_set_lp_clk_divisor()
1304 dsi->current_lp_cinfo.lp_clk_div = lp_clk_div; in dsi_set_lp_clk_divisor()
1319 if (dsi->scp_clk_refcount++ == 0) in dsi_enable_scp_clk()
1327 WARN_ON(dsi->scp_clk_refcount == 0); in dsi_disable_scp_clk()
1328 if (--dsi->scp_clk_refcount == 0) in dsi_disable_scp_clk()
1344 /* DSI-PLL power command 0x3 is not working */ in dsi_pll_power()
1357 return -ENODEV; in dsi_pll_power()
1372 cinfo->mX[HSDIV_DSI] = DIV_ROUND_UP(cinfo->clkdco, max_dsi_fck); in dsi_pll_calc_dsi_fck()
1373 cinfo->clkout[HSDIV_DSI] = cinfo->clkdco / cinfo->mX[HSDIV_DSI]; in dsi_pll_calc_dsi_fck()
1379 struct platform_device *dsidev = dsi->pdev; in dsi_pll_enable()
1397 if (!dsi->vdds_dsi_enabled) { in dsi_pll_enable()
1398 r = regulator_enable(dsi->vdds_dsi_reg); in dsi_pll_enable()
1401 dsi->vdds_dsi_enabled = true; in dsi_pll_enable()
1409 r = -ENODEV; in dsi_pll_enable()
1427 if (dsi->vdds_dsi_enabled) { in dsi_pll_enable()
1428 regulator_disable(dsi->vdds_dsi_reg); in dsi_pll_enable()
1429 dsi->vdds_dsi_enabled = false; in dsi_pll_enable()
1443 WARN_ON(!dsi->vdds_dsi_enabled); in dsi_pll_uninit()
1444 regulator_disable(dsi->vdds_dsi_reg); in dsi_pll_uninit()
1445 dsi->vdds_dsi_enabled = false; in dsi_pll_uninit()
1457 struct platform_device *dsidev = dsi->pdev; in dsi_pll_disable()
1466 struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo; in dsi_dump_dsidev_clocks()
1468 int dsi_module = dsi->module_id; in dsi_dump_dsidev_clocks()
1469 struct dss_pll *pll = &dsi->pll; in dsi_dump_dsidev_clocks()
1477 seq_printf(s, "- DSI%d PLL -\n", dsi_module + 1); in dsi_dump_dsidev_clocks()
1479 seq_printf(s, "dsi pll clkin\t%lu\n", clk_get_rate(pll->clkin)); in dsi_dump_dsidev_clocks()
1481 seq_printf(s, "Fint\t\t%-16lun %u\n", cinfo->fint, cinfo->n); in dsi_dump_dsidev_clocks()
1483 seq_printf(s, "CLKIN4DDR\t%-16lum %u\n", in dsi_dump_dsidev_clocks()
1484 cinfo->clkdco, cinfo->m); in dsi_dump_dsidev_clocks()
1486 seq_printf(s, "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n", in dsi_dump_dsidev_clocks()
1490 cinfo->clkout[HSDIV_DISPC], in dsi_dump_dsidev_clocks()
1491 cinfo->mX[HSDIV_DISPC], in dsi_dump_dsidev_clocks()
1495 seq_printf(s, "DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n", in dsi_dump_dsidev_clocks()
1499 cinfo->clkout[HSDIV_DSI], in dsi_dump_dsidev_clocks()
1500 cinfo->mX[HSDIV_DSI], in dsi_dump_dsidev_clocks()
1504 seq_printf(s, "- DSI%d -\n", dsi_module + 1); in dsi_dump_dsidev_clocks()
1513 cinfo->clkdco / 4); in dsi_dump_dsidev_clocks()
1517 seq_printf(s, "LP_CLK\t\t%lu\n", dsi->current_lp_cinfo.lp_clk); in dsi_dump_dsidev_clocks()
1548 spin_lock_irqsave(&dsi->irq_stats_lock, flags); in dsi_dump_dsidev_irqs()
1550 *stats = dsi->irq_stats; in dsi_dump_dsidev_irqs()
1551 memset(&dsi->irq_stats, 0, sizeof(dsi->irq_stats)); in dsi_dump_dsidev_irqs()
1552 dsi->irq_stats.last_reset = jiffies; in dsi_dump_dsidev_irqs()
1554 spin_unlock_irqrestore(&dsi->irq_stats_lock, flags); in dsi_dump_dsidev_irqs()
1557 jiffies_to_msecs(jiffies - stats->last_reset)); in dsi_dump_dsidev_irqs()
1559 seq_printf(s, "irqs %d\n", stats->irq_count); in dsi_dump_dsidev_irqs()
1561 seq_printf(s, "%-20s %10d\n", #x, stats->dsi_irqs[ffs(DSI_IRQ_##x)-1]) in dsi_dump_dsidev_irqs()
1563 seq_printf(s, "-- DSI%d interrupts --\n", dsi->module_id + 1); in dsi_dump_dsidev_irqs()
1584 seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \ in dsi_dump_dsidev_irqs()
1585 stats->vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsidev_irqs()
1586 stats->vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsidev_irqs()
1587 stats->vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \ in dsi_dump_dsidev_irqs()
1588 stats->vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]); in dsi_dump_dsidev_irqs()
1590 seq_printf(s, "-- VC interrupts --\n"); in dsi_dump_dsidev_irqs()
1603 seq_printf(s, "%-20s %10d\n", #x, \ in dsi_dump_dsidev_irqs()
1604 stats->cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]); in dsi_dump_dsidev_irqs()
1606 seq_printf(s, "-- CIO interrupts --\n"); in dsi_dump_dsidev_irqs()
1650 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsidev, r)) in dsi_dump_dsidev_regs()
1765 return -ENODEV; in dsi_cio_power()
1823 for (i = 0; i < dsi->num_lanes_used; ++i) { in dsi_set_lane_config()
1828 for (t = 0; t < dsi->num_lanes_supported; ++t) in dsi_set_lane_config()
1829 if (dsi->lanes[t].function == functions[i]) in dsi_set_lane_config()
1832 if (t == dsi->num_lanes_supported) in dsi_set_lane_config()
1833 return -EINVAL; in dsi_set_lane_config()
1836 polarity = dsi->lanes[t].polarity; in dsi_set_lane_config()
1843 for (; i < dsi->num_lanes_supported; ++i) { in dsi_set_lane_config()
1860 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ns2ddr()
1868 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ddr2ns()
1904 /* min tclk-prepare + tclk-zero = 300ns */ in dsi_cio_timings()
1956 u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26; in dsi_cio_enable_lane_override()
1960 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_enable_lane_override()
1961 unsigned p = dsi->lanes[i].polarity; in dsi_cio_enable_lane_override()
2013 for (i = 0; i < dsi->num_lanes_supported; ++i) in dsi_cio_wait_tx_clk_esc_reset()
2014 in_use[i] = dsi->lanes[i].function != DSI_LANE_UNUSED; in dsi_cio_wait_tx_clk_esc_reset()
2024 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_wait_tx_clk_esc_reset()
2029 if (ok == dsi->num_lanes_supported) in dsi_cio_wait_tx_clk_esc_reset()
2032 if (--t == 0) { in dsi_cio_wait_tx_clk_esc_reset()
2033 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_wait_tx_clk_esc_reset()
2040 return -EIO; in dsi_cio_wait_tx_clk_esc_reset()
2054 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_get_lane_mask()
2055 if (dsi->lanes[i].function != DSI_LANE_UNUSED) in dsi_get_lane_mask()
2070 r = dss_dsi_enable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); in dsi_cio_init()
2083 r = -EIO; in dsi_cio_init()
2099 if (dsi->ulps_enabled) { in dsi_cio_init()
2105 /* ULPS is exited by Mark-1 state for 1ms, followed by in dsi_cio_init()
2116 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_cio_init()
2117 if (dsi->lanes[i].function == DSI_LANE_UNUSED) in dsi_cio_init()
2131 r = -ENODEV; in dsi_cio_init()
2143 if (dsi->ulps_enabled) { in dsi_cio_init()
2144 /* Keep Mark-1 state for 1ms (as per DSI spec) */ in dsi_cio_init()
2149 /* Disable the override. The lanes should be set to Mark-11 in dsi_cio_init()
2159 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_cio_init()
2162 dsi->vm_timings.ddr_clk_always_on, 13, 13); in dsi_cio_init()
2165 dsi->ulps_enabled = false; in dsi_cio_init()
2176 if (dsi->ulps_enabled) in dsi_cio_init()
2180 dss_dsi_disable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); in dsi_cio_init()
2193 dss_dsi_disable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); in dsi_cio_uninit()
2205 dsi->vc[0].tx_fifo_size = size1; in dsi_config_tx_fifo()
2206 dsi->vc[1].tx_fifo_size = size2; in dsi_config_tx_fifo()
2207 dsi->vc[2].tx_fifo_size = size3; in dsi_config_tx_fifo()
2208 dsi->vc[3].tx_fifo_size = size4; in dsi_config_tx_fifo()
2212 int size = dsi->vc[i].tx_fifo_size; in dsi_config_tx_fifo()
2238 dsi->vc[0].rx_fifo_size = size1; in dsi_config_rx_fifo()
2239 dsi->vc[1].rx_fifo_size = size2; in dsi_config_rx_fifo()
2240 dsi->vc[2].rx_fifo_size = size3; in dsi_config_rx_fifo()
2241 dsi->vc[3].rx_fifo_size = size4; in dsi_config_rx_fifo()
2245 int size = dsi->vc[i].rx_fifo_size; in dsi_config_rx_fifo()
2272 return -EIO; in dsi_force_tx_stop_mode_io()
2287 struct dsi_data *dsi = dsi_get_dsidrv_data(vp_data->dsidev); in dsi_packet_sent_handler_vp()
2288 const int channel = dsi->update_channel; in dsi_packet_sent_handler_vp()
2289 u8 bit = dsi->te_enabled ? 30 : 31; in dsi_packet_sent_handler_vp()
2291 if (REG_GET(vp_data->dsidev, DSI_VC_TE(channel), bit, bit) == 0) in dsi_packet_sent_handler_vp()
2292 complete(vp_data->completion); in dsi_packet_sent_handler_vp()
2306 bit = dsi->te_enabled ? 30 : 31; in dsi_sync_vc_vp()
2318 r = -EIO; in dsi_sync_vc_vp()
2338 struct dsi_data *dsi = dsi_get_dsidrv_data(l4_data->dsidev); in dsi_packet_sent_handler_l4()
2339 const int channel = dsi->update_channel; in dsi_packet_sent_handler_l4()
2341 if (REG_GET(l4_data->dsidev, DSI_VC_CTRL(channel), 5, 5) == 0) in dsi_packet_sent_handler_l4()
2342 complete(l4_data->completion); in dsi_packet_sent_handler_l4()
2364 r = -EIO; in dsi_sync_vc_l4()
2389 switch (dsi->vc[channel].source) { in dsi_sync_vc()
2396 return -EINVAL; in dsi_sync_vc()
2413 return -EIO; in dsi_vc_enable()
2447 dsi->vc[channel].source = DSI_VC_SOURCE_L4; in dsi_vc_initial_config()
2455 if (dsi->vc[channel].source == source) in dsi_vc_config_source()
2467 return -EIO; in dsi_vc_config_source()
2481 dsi->vc[channel].source = source; in dsi_vc_config_source()
2507 if (dsi->vm_timings.ddr_clk_always_on && enable) in dsi_vc_enable_hs()
2544 DSSERR("\t\tECC Error, single-bit (corrected)\n"); in dsi_show_rx_ack_with_err()
2546 DSSERR("\t\tECC Error, multi-bit (not corrected)\n"); in dsi_show_rx_ack_with_err()
2595 if (dsi->debug_write || dsi->debug_read) in dsi_vc_send_bta()
2638 r = -EIO; in dsi_vc_send_bta_sync()
2645 r = -EIO; in dsi_vc_send_bta_sync()
2667 data_id = data_type | dsi->vc[channel].vc_id << 6; in dsi_vc_write_long_header()
2698 if (dsi->debug_write) in dsi_vc_send_long()
2702 if (dsi->vc[channel].tx_fifo_size * 32 * 4 < len + 4) { in dsi_vc_send_long()
2704 return -EINVAL; in dsi_vc_send_long()
2713 if (dsi->debug_write) in dsi_vc_send_long()
2728 if (dsi->debug_write) in dsi_vc_send_long()
2761 if (dsi->debug_write) in dsi_vc_send_short()
2770 return -EINVAL; in dsi_vc_send_short()
2773 data_id = data_type | dsi->vc[channel].vc_id << 6; in dsi_vc_send_short()
2856 r = -EIO; in dsi_vc_write_common()
2887 if (dsi->debug_read) in dsi_vc_dcs_send_read_request()
2909 if (dsi->debug_read) in dsi_vc_generic_send_read_request()
2924 return -EINVAL; in dsi_vc_generic_send_read_request()
2948 r = -EIO; in dsi_vc_read_rx_fifo()
2953 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2959 r = -EIO; in dsi_vc_read_rx_fifo()
2966 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2972 r = -EIO; in dsi_vc_read_rx_fifo()
2983 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
2989 r = -EIO; in dsi_vc_read_rx_fifo()
3002 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
3008 r = -EIO; in dsi_vc_read_rx_fifo()
3017 if (dsi->debug_read) in dsi_vc_read_rx_fifo()
3035 r = -EIO; in dsi_vc_read_rx_fifo()
3066 r = -EIO; in dsi_vc_dcs_read()
3096 r = -EIO; in dsi_vc_generic_read()
3123 WARN_ON(dsi->ulps_enabled); in dsi_enter_ulps()
3125 if (dsi->ulps_enabled) in dsi_enter_ulps()
3149 return -EIO; in dsi_enter_ulps()
3154 return -EIO; in dsi_enter_ulps()
3164 for (i = 0; i < dsi->num_lanes_supported; ++i) { in dsi_enter_ulps()
3165 if (dsi->lanes[i].function == DSI_LANE_UNUSED) in dsi_enter_ulps()
3179 r = -EIO; in dsi_enter_ulps()
3196 dsi->ulps_enabled = true; in dsi_enter_ulps()
3319 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_config_vp_num_line_buffers()
3320 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_config_vp_num_line_buffers()
3321 struct omap_video_timings *timings = &dsi->timings; in dsi_config_vp_num_line_buffers()
3326 if (dsi->line_buffer_size <= timings->x_res * bpp / 8) in dsi_config_vp_num_line_buffers()
3345 if (dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE) in dsi_config_vp_sync_events()
3364 int blanking_mode = dsi->vm_timings.blanking_mode; in dsi_config_blanking_modes()
3365 int hfp_blanking_mode = dsi->vm_timings.hfp_blanking_mode; in dsi_config_blanking_modes()
3366 int hbp_blanking_mode = dsi->vm_timings.hbp_blanking_mode; in dsi_config_blanking_modes()
3367 int hsa_blanking_mode = dsi->vm_timings.hsa_blanking_mode; in dsi_config_blanking_modes()
3411 return blank > transition ? blank - transition : 0; in dsi_compute_interleave_hs()
3434 tlp_avail = thsbyte_clk * (blank - trans_lp); in dsi_compute_interleave_lp()
3438 lp_inter = ((tlp_avail - 8 * thsbyte_clk - 5 * tdsi_fclk) / ttxclkesc - in dsi_compute_interleave_lp()
3453 struct omap_video_timings *timings = &dsi->timings; in dsi_config_cmd_mode_interleaving()
3454 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_config_cmd_mode_interleaving()
3455 int ndl = dsi->num_lanes_used - 1; in dsi_config_cmd_mode_interleaving()
3456 int dsi_fclk_hsdiv = dsi->user_dsi_cinfo.mX[HSDIV_DSI] + 1; in dsi_config_cmd_mode_interleaving()
3494 width_bytes = DIV_ROUND_UP(timings->x_res * bpp, 8); in dsi_config_cmd_mode_interleaving()
3583 switch (dsi_get_pixel_size(dsi->pix_fmt)) { in dsi_proto_config()
3595 return -EINVAL; in dsi_proto_config()
3617 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_proto_config()
3641 int ndl = dsi->num_lanes_used - 1; in dsi_proto_timings()
3647 ths_zero = ths_prepare_ths_zero - ths_prepare; in dsi_proto_timings()
3694 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_proto_timings()
3696 int hsa = dsi->vm_timings.hsa; in dsi_proto_timings()
3697 int hfp = dsi->vm_timings.hfp; in dsi_proto_timings()
3698 int hbp = dsi->vm_timings.hbp; in dsi_proto_timings()
3699 int vsa = dsi->vm_timings.vsa; in dsi_proto_timings()
3700 int vfp = dsi->vm_timings.vfp; in dsi_proto_timings()
3701 int vbp = dsi->vm_timings.vbp; in dsi_proto_timings()
3702 int window_sync = dsi->vm_timings.window_sync; in dsi_proto_timings()
3704 struct omap_video_timings *timings = &dsi->timings; in dsi_proto_timings()
3705 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_proto_timings()
3708 hsync_end = dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE; in dsi_proto_timings()
3712 width_bytes = DIV_ROUND_UP(timings->x_res * bpp, 8); in dsi_proto_timings()
3721 vsa, timings->y_res); in dsi_proto_timings()
3737 r = FLD_MOD(r, timings->y_res, 14, 0); /* VACT */ in dsi_proto_timings()
3762 num_pins = pin_cfg->num_pins; in dsi_configure_pins()
3763 pins = pin_cfg->pins; in dsi_configure_pins()
3765 if (num_pins < 4 || num_pins > dsi->num_lanes_supported * 2 in dsi_configure_pins()
3767 return -EINVAL; in dsi_configure_pins()
3781 if (dx < 0 || dx >= dsi->num_lanes_supported * 2) in dsi_configure_pins()
3782 return -EINVAL; in dsi_configure_pins()
3784 if (dy < 0 || dy >= dsi->num_lanes_supported * 2) in dsi_configure_pins()
3785 return -EINVAL; in dsi_configure_pins()
3788 if (dy != dx - 1) in dsi_configure_pins()
3789 return -EINVAL; in dsi_configure_pins()
3793 return -EINVAL; in dsi_configure_pins()
3804 memcpy(dsi->lanes, lanes, sizeof(dsi->lanes)); in dsi_configure_pins()
3805 dsi->num_lanes_used = num_lanes; in dsi_configure_pins()
3814 struct omap_overlay_manager *mgr = dsi->output.manager; in dsi_enable_video_output()
3815 int bpp = dsi_get_pixel_size(dsi->pix_fmt); in dsi_enable_video_output()
3816 struct omap_dss_device *out = &dsi->output; in dsi_enable_video_output()
3821 if (out->manager == NULL) { in dsi_enable_video_output()
3823 return -ENODEV; in dsi_enable_video_output()
3830 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_enable_video_output()
3831 switch (dsi->pix_fmt) { in dsi_enable_video_output()
3845 r = -EINVAL; in dsi_enable_video_output()
3855 word_count = DIV_ROUND_UP(dsi->timings.x_res * bpp, 8); in dsi_enable_video_output()
3871 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_enable_video_output()
3885 struct omap_overlay_manager *mgr = dsi->output.manager; in dsi_disable_video_output()
3887 if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { in dsi_disable_video_output()
3906 struct omap_overlay_manager *mgr = dsi->output.manager; in dsi_update_screen_dispc()
3915 const unsigned channel = dsi->update_channel; in dsi_update_screen_dispc()
3916 const unsigned line_buf_size = dsi->line_buffer_size; in dsi_update_screen_dispc()
3917 u16 w = dsi->timings.x_res; in dsi_update_screen_dispc()
3918 u16 h = dsi->timings.y_res; in dsi_update_screen_dispc()
3924 bytespp = dsi_get_pixel_size(dsi->pix_fmt) / 8; in dsi_update_screen_dispc()
3948 if (dsi->te_enabled) in dsi_update_screen_dispc()
3954 /* We put SIDLEMODE to no-idle for the duration of the transfer, in dsi_update_screen_dispc()
3964 r = schedule_delayed_work(&dsi->framedone_timeout_work, in dsi_update_screen_dispc()
3968 dss_mgr_set_timings(mgr, &dsi->timings); in dsi_update_screen_dispc()
3972 if (dsi->te_enabled) { in dsi_update_screen_dispc()
3980 mod_timer(&dsi->te_timer, jiffies + msecs_to_jiffies(250)); in dsi_update_screen_dispc()
3996 /* SIDLEMODE back to smart-idle */ in dsi_handle_framedone()
3999 if (dsi->te_enabled) { in dsi_handle_framedone()
4004 dsi->framedone_callback(error, dsi->framedone_data); in dsi_handle_framedone()
4023 dsi_handle_framedone(dsi->pdev, -ETIMEDOUT); in dsi_framedone_timeout_work_callback()
4036 cancel_delayed_work(&dsi->framedone_timeout_work); in dsi_framedone_irq_callback()
4049 dsi->update_channel = channel; in dsi_update()
4051 dsi->framedone_callback = callback; in dsi_update()
4052 dsi->framedone_data = data; in dsi_update()
4055 dsi->update_bytes = dsi->timings.x_res * dsi->timings.y_res * in dsi_update()
4056 dsi_get_pixel_size(dsi->pix_fmt) / 8; in dsi_update()
4074 dispc_cinfo.lck_div = dsi->user_dispc_cinfo.lck_div; in dsi_configure_dispc_clocks()
4075 dispc_cinfo.pck_div = dsi->user_dispc_cinfo.pck_div; in dsi_configure_dispc_clocks()
4083 dsi->mgr_config.clock_info = dispc_cinfo; in dsi_configure_dispc_clocks()
4094 dss_select_lcd_clk_source(mgr->id, dsi->module_id == 0 ? in dsi_display_init_dispc()
4098 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { in dsi_display_init_dispc()
4106 dsi->mgr_config.stallmode = true; in dsi_display_init_dispc()
4107 dsi->mgr_config.fifohandcheck = true; in dsi_display_init_dispc()
4109 dsi->mgr_config.stallmode = false; in dsi_display_init_dispc()
4110 dsi->mgr_config.fifohandcheck = false; in dsi_display_init_dispc()
4117 dsi->timings.interlace = false; in dsi_display_init_dispc()
4118 dsi->timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH; in dsi_display_init_dispc()
4119 dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH; in dsi_display_init_dispc()
4120 dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in dsi_display_init_dispc()
4121 dsi->timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH; in dsi_display_init_dispc()
4122 dsi->timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE; in dsi_display_init_dispc()
4124 dss_mgr_set_timings(mgr, &dsi->timings); in dsi_display_init_dispc()
4130 dsi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS; in dsi_display_init_dispc()
4131 dsi->mgr_config.video_port_width = in dsi_display_init_dispc()
4132 dsi_get_pixel_size(dsi->pix_fmt); in dsi_display_init_dispc()
4133 dsi->mgr_config.lcden_sig_polarity = 0; in dsi_display_init_dispc()
4135 dss_mgr_set_lcd_config(mgr, &dsi->mgr_config); in dsi_display_init_dispc()
4139 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) in dsi_display_init_dispc()
4143 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_init_dispc()
4152 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) in dsi_display_uninit_dispc()
4156 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_uninit_dispc()
4165 cinfo = dsi->user_dsi_cinfo; in dsi_configure_dsi_clocks()
4167 r = dss_pll_set_config(&dsi->pll, &cinfo); in dsi_configure_dsi_clocks()
4181 r = dss_pll_enable(&dsi->pll); in dsi_display_init_dsi()
4189 dss_select_dsi_clk_source(dsi->module_id, dsi->module_id == 0 ? in dsi_display_init_dsi()
4223 dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_init_dsi()
4225 dss_pll_disable(&dsi->pll); in dsi_display_init_dsi()
4235 if (enter_ulps && !dsi->ulps_enabled) in dsi_display_uninit_dsi()
4245 dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); in dsi_display_uninit_dsi()
4260 mutex_lock(&dsi->lock); in dsi_display_enable()
4272 mutex_unlock(&dsi->lock); in dsi_display_enable()
4279 mutex_unlock(&dsi->lock); in dsi_display_enable()
4294 mutex_lock(&dsi->lock); in dsi_display_disable()
4305 mutex_unlock(&dsi->lock); in dsi_display_disable()
4313 dsi->te_enabled = enable; in dsi_enable_te()
4321 unsigned long byteclk = t->hsclk / 4; in print_dsi_vm()
4324 wc = DIV_ROUND_UP(t->hact * t->bitspp, 8); in print_dsi_vm()
4325 pps = DIV_ROUND_UP(wc + 6, t->ndl); /* pixel packet size */ in print_dsi_vm()
4326 bl = t->hss + t->hsa + t->hse + t->hbp + t->hfp; in print_dsi_vm()
4335 t->hss, t->hsa, t->hse, t->hbp, pps, t->hfp, in print_dsi_vm()
4337 TO_DSI_T(t->hss), in print_dsi_vm()
4338 TO_DSI_T(t->hsa), in print_dsi_vm()
4339 TO_DSI_T(t->hse), in print_dsi_vm()
4340 TO_DSI_T(t->hbp), in print_dsi_vm()
4342 TO_DSI_T(t->hfp), in print_dsi_vm()
4353 unsigned long pck = t->pixelclock; in print_dispc_vm()
4356 hact = t->x_res; in print_dispc_vm()
4357 bl = t->hsw + t->hbp + t->hfp; in print_dispc_vm()
4366 t->hsw, t->hbp, hact, t->hfp, in print_dispc_vm()
4368 TO_DISPC_T(t->hsw), in print_dispc_vm()
4369 TO_DISPC_T(t->hbp), in print_dispc_vm()
4371 TO_DISPC_T(t->hfp), in print_dispc_vm()
4383 unsigned long byteclk = t->hsclk / 4; in print_dsi_dispc_vm()
4388 dsi_tput = (u64)byteclk * t->ndl * 8; in print_dsi_dispc_vm()
4389 pck = (u32)div64_u64(dsi_tput, t->bitspp); in print_dsi_dispc_vm()
4390 dsi_hact = DIV_ROUND_UP(DIV_ROUND_UP(t->hact * t->bitspp, 8) + 6, t->ndl); in print_dsi_dispc_vm()
4391 dsi_htot = t->hss + t->hsa + t->hse + t->hbp + dsi_hact + t->hfp; in print_dsi_dispc_vm()
4394 vm.hsw = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk); in print_dsi_dispc_vm()
4395 vm.hbp = div64_u64((u64)t->hbp * pck, byteclk); in print_dsi_dispc_vm()
4396 vm.hfp = div64_u64((u64)t->hfp * pck, byteclk); in print_dsi_dispc_vm()
4397 vm.x_res = t->hact; in print_dsi_dispc_vm()
4407 struct omap_video_timings *t = &ctx->dispc_vm; in dsi_cm_calc_dispc_cb()
4409 ctx->dispc_cinfo.lck_div = lckd; in dsi_cm_calc_dispc_cb()
4410 ctx->dispc_cinfo.pck_div = pckd; in dsi_cm_calc_dispc_cb()
4411 ctx->dispc_cinfo.lck = lck; in dsi_cm_calc_dispc_cb()
4412 ctx->dispc_cinfo.pck = pck; in dsi_cm_calc_dispc_cb()
4414 *t = *ctx->config->timings; in dsi_cm_calc_dispc_cb()
4415 t->pixelclock = pck; in dsi_cm_calc_dispc_cb()
4416 t->x_res = ctx->config->timings->x_res; in dsi_cm_calc_dispc_cb()
4417 t->y_res = ctx->config->timings->y_res; in dsi_cm_calc_dispc_cb()
4418 t->hsw = t->hfp = t->hbp = t->vsw = 1; in dsi_cm_calc_dispc_cb()
4419 t->vfp = t->vbp = 0; in dsi_cm_calc_dispc_cb()
4429 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc; in dsi_cm_calc_hsdiv_cb()
4430 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc; in dsi_cm_calc_hsdiv_cb()
4432 return dispc_div_calc(dispc, ctx->req_pck_min, ctx->req_pck_max, in dsi_cm_calc_hsdiv_cb()
4441 ctx->dsi_cinfo.n = n; in dsi_cm_calc_pll_cb()
4442 ctx->dsi_cinfo.m = m; in dsi_cm_calc_pll_cb()
4443 ctx->dsi_cinfo.fint = fint; in dsi_cm_calc_pll_cb()
4444 ctx->dsi_cinfo.clkdco = clkdco; in dsi_cm_calc_pll_cb()
4446 return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min, in dsi_cm_calc_pll_cb()
4460 clkin = clk_get_rate(dsi->pll.clkin); in dsi_cm_calc()
4461 bitspp = dsi_get_pixel_size(cfg->pixel_format); in dsi_cm_calc()
4462 ndl = dsi->num_lanes_used - 1; in dsi_cm_calc()
4470 pck = cfg->timings->pixelclock; in dsi_cm_calc()
4475 ctx->dsidev = dsi->pdev; in dsi_cm_calc()
4476 ctx->pll = &dsi->pll; in dsi_cm_calc()
4477 ctx->config = cfg; in dsi_cm_calc()
4478 ctx->req_pck_min = pck; in dsi_cm_calc()
4479 ctx->req_pck_nom = pck; in dsi_cm_calc()
4480 ctx->req_pck_max = pck * 3 / 2; in dsi_cm_calc()
4482 pll_min = max(cfg->hs_clk_min * 4, txbyteclk * 4 * 4); in dsi_cm_calc()
4483 pll_max = cfg->hs_clk_max * 4; in dsi_cm_calc()
4485 return dss_pll_calc(ctx->pll, clkin, in dsi_cm_calc()
4492 struct dsi_data *dsi = dsi_get_dsidrv_data(ctx->dsidev); in dsi_vm_calc_blanking()
4493 const struct omap_dss_dsi_config *cfg = ctx->config; in dsi_vm_calc_blanking()
4494 int bitspp = dsi_get_pixel_size(cfg->pixel_format); in dsi_vm_calc_blanking()
4495 int ndl = dsi->num_lanes_used - 1; in dsi_vm_calc_blanking()
4496 unsigned long hsclk = ctx->dsi_cinfo.clkdco / 4; in dsi_vm_calc_blanking()
4512 req_vm = cfg->timings; in dsi_vm_calc_blanking()
4513 req_pck_min = ctx->req_pck_min; in dsi_vm_calc_blanking()
4514 req_pck_max = ctx->req_pck_max; in dsi_vm_calc_blanking()
4515 req_pck_nom = ctx->req_pck_nom; in dsi_vm_calc_blanking()
4517 dispc_pck = ctx->dispc_cinfo.pck; in dsi_vm_calc_blanking()
4520 xres = req_vm->x_res; in dsi_vm_calc_blanking()
4522 panel_hbl = req_vm->hfp + req_vm->hbp + req_vm->hsw; in dsi_vm_calc_blanking()
4531 if (dsi->line_buffer_size < xres * bitspp / 8) { in dsi_vm_calc_blanking()
4543 /* When non-burst mode, DSI tput must be below max requirement. */ in dsi_vm_calc_blanking()
4544 if (cfg->trans_mode != OMAP_DSS_DSI_BURST_MODE) { in dsi_vm_calc_blanking()
4551 if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
4552 if (ndl == 3 && req_vm->hsw == 0) in dsi_vm_calc_blanking()
4568 dsi_hbl = dsi_htot - dsi_hact; in dsi_vm_calc_blanking()
4577 dispc_hbl = dispc_htot - xres; in dsi_vm_calc_blanking()
4581 dsi_vm = &ctx->dsi_vm; in dsi_vm_calc_blanking()
4584 dsi_vm->hsclk = hsclk; in dsi_vm_calc_blanking()
4586 dsi_vm->ndl = ndl; in dsi_vm_calc_blanking()
4587 dsi_vm->bitspp = bitspp; in dsi_vm_calc_blanking()
4589 if (cfg->trans_mode != OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
4591 } else if (ndl == 3 && req_vm->hsw == 0) { in dsi_vm_calc_blanking()
4594 hsa = div64_u64((u64)req_vm->hsw * byteclk, req_pck_nom); in dsi_vm_calc_blanking()
4595 hsa = max(hsa - hse, 1); in dsi_vm_calc_blanking()
4598 hbp = div64_u64((u64)req_vm->hbp * byteclk, req_pck_nom); in dsi_vm_calc_blanking()
4601 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
4606 t = 1 - hfp; in dsi_vm_calc_blanking()
4607 hbp = max(hbp - t, 1); in dsi_vm_calc_blanking()
4608 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
4612 t = 1 - hfp; in dsi_vm_calc_blanking()
4613 hsa = max(hsa - t, 1); in dsi_vm_calc_blanking()
4614 hfp = dsi_hbl - (hss + hsa + hse + hbp); in dsi_vm_calc_blanking()
4621 dsi_vm->hss = hss; in dsi_vm_calc_blanking()
4622 dsi_vm->hsa = hsa; in dsi_vm_calc_blanking()
4623 dsi_vm->hse = hse; in dsi_vm_calc_blanking()
4624 dsi_vm->hbp = hbp; in dsi_vm_calc_blanking()
4625 dsi_vm->hact = xres; in dsi_vm_calc_blanking()
4626 dsi_vm->hfp = hfp; in dsi_vm_calc_blanking()
4628 dsi_vm->vsa = req_vm->vsw; in dsi_vm_calc_blanking()
4629 dsi_vm->vbp = req_vm->vbp; in dsi_vm_calc_blanking()
4630 dsi_vm->vact = req_vm->y_res; in dsi_vm_calc_blanking()
4631 dsi_vm->vfp = req_vm->vfp; in dsi_vm_calc_blanking()
4633 dsi_vm->trans_mode = cfg->trans_mode; in dsi_vm_calc_blanking()
4635 dsi_vm->blanking_mode = 0; in dsi_vm_calc_blanking()
4636 dsi_vm->hsa_blanking_mode = 1; in dsi_vm_calc_blanking()
4637 dsi_vm->hfp_blanking_mode = 1; in dsi_vm_calc_blanking()
4638 dsi_vm->hbp_blanking_mode = 1; in dsi_vm_calc_blanking()
4640 dsi_vm->ddr_clk_always_on = cfg->ddr_clk_always_on; in dsi_vm_calc_blanking()
4641 dsi_vm->window_sync = 4; in dsi_vm_calc_blanking()
4645 dispc_vm = &ctx->dispc_vm; in dsi_vm_calc_blanking()
4647 dispc_vm->pixelclock = dispc_pck; in dsi_vm_calc_blanking()
4649 if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { in dsi_vm_calc_blanking()
4650 hsa = div64_u64((u64)req_vm->hsw * dispc_pck, in dsi_vm_calc_blanking()
4657 hbp = div64_u64((u64)req_vm->hbp * dispc_pck, req_pck_nom); in dsi_vm_calc_blanking()
4660 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
4665 t = 1 - hfp; in dsi_vm_calc_blanking()
4666 hbp = max(hbp - t, 1); in dsi_vm_calc_blanking()
4667 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
4671 t = 1 - hfp; in dsi_vm_calc_blanking()
4672 hsa = max(hsa - t, 1); in dsi_vm_calc_blanking()
4673 hfp = dispc_hbl - hsa - hbp; in dsi_vm_calc_blanking()
4680 dispc_vm->hfp = hfp; in dsi_vm_calc_blanking()
4681 dispc_vm->hsw = hsa; in dsi_vm_calc_blanking()
4682 dispc_vm->hbp = hbp; in dsi_vm_calc_blanking()
4693 ctx->dispc_cinfo.lck_div = lckd; in dsi_vm_calc_dispc_cb()
4694 ctx->dispc_cinfo.pck_div = pckd; in dsi_vm_calc_dispc_cb()
4695 ctx->dispc_cinfo.lck = lck; in dsi_vm_calc_dispc_cb()
4696 ctx->dispc_cinfo.pck = pck; in dsi_vm_calc_dispc_cb()
4702 print_dispc_vm("dispc", &ctx->dispc_vm); in dsi_vm_calc_dispc_cb()
4703 print_dsi_vm("dsi ", &ctx->dsi_vm); in dsi_vm_calc_dispc_cb()
4704 print_dispc_vm("req ", ctx->config->timings); in dsi_vm_calc_dispc_cb()
4705 print_dsi_dispc_vm("act ", &ctx->dsi_vm); in dsi_vm_calc_dispc_cb()
4717 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc; in dsi_vm_calc_hsdiv_cb()
4718 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc; in dsi_vm_calc_hsdiv_cb()
4725 if (ctx->config->trans_mode == OMAP_DSS_DSI_BURST_MODE) in dsi_vm_calc_hsdiv_cb()
4726 pck_max = ctx->req_pck_max + 10000000; in dsi_vm_calc_hsdiv_cb()
4728 pck_max = ctx->req_pck_max; in dsi_vm_calc_hsdiv_cb()
4730 return dispc_div_calc(dispc, ctx->req_pck_min, pck_max, in dsi_vm_calc_hsdiv_cb()
4739 ctx->dsi_cinfo.n = n; in dsi_vm_calc_pll_cb()
4740 ctx->dsi_cinfo.m = m; in dsi_vm_calc_pll_cb()
4741 ctx->dsi_cinfo.fint = fint; in dsi_vm_calc_pll_cb()
4742 ctx->dsi_cinfo.clkdco = clkdco; in dsi_vm_calc_pll_cb()
4744 return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min, in dsi_vm_calc_pll_cb()
4753 const struct omap_video_timings *t = cfg->timings; in dsi_vm_calc()
4757 int ndl = dsi->num_lanes_used - 1; in dsi_vm_calc()
4758 int bitspp = dsi_get_pixel_size(cfg->pixel_format); in dsi_vm_calc()
4761 clkin = clk_get_rate(dsi->pll.clkin); in dsi_vm_calc()
4764 ctx->dsidev = dsi->pdev; in dsi_vm_calc()
4765 ctx->pll = &dsi->pll; in dsi_vm_calc()
4766 ctx->config = cfg; in dsi_vm_calc()
4769 ctx->req_pck_min = t->pixelclock - 1000; in dsi_vm_calc()
4770 ctx->req_pck_nom = t->pixelclock; in dsi_vm_calc()
4771 ctx->req_pck_max = t->pixelclock + 1000; in dsi_vm_calc()
4773 byteclk_min = div64_u64((u64)ctx->req_pck_min * bitspp, ndl * 8); in dsi_vm_calc()
4774 pll_min = max(cfg->hs_clk_min * 4, byteclk_min * 4 * 4); in dsi_vm_calc()
4776 if (cfg->trans_mode == OMAP_DSS_DSI_BURST_MODE) { in dsi_vm_calc()
4777 pll_max = cfg->hs_clk_max * 4; in dsi_vm_calc()
4780 byteclk_max = div64_u64((u64)ctx->req_pck_max * bitspp, in dsi_vm_calc()
4786 return dss_pll_calc(ctx->pll, clkin, in dsi_vm_calc()
4800 mutex_lock(&dsi->lock); in dsi_set_config()
4802 dsi->pix_fmt = config->pixel_format; in dsi_set_config()
4803 dsi->mode = config->mode; in dsi_set_config()
4805 if (config->mode == OMAP_DSS_DSI_VIDEO_MODE) in dsi_set_config()
4812 r = -EINVAL; in dsi_set_config()
4818 r = dsi_lp_clock_calc(ctx.dsi_cinfo.clkout[HSDIV_DSI], in dsi_set_config()
4819 config->lp_clk_min, config->lp_clk_max, &dsi->user_lp_cinfo); in dsi_set_config()
4825 dsi->user_dsi_cinfo = ctx.dsi_cinfo; in dsi_set_config()
4826 dsi->user_dispc_cinfo = ctx.dispc_cinfo; in dsi_set_config()
4828 dsi->timings = ctx.dispc_vm; in dsi_set_config()
4829 dsi->vm_timings = ctx.dsi_vm; in dsi_set_config()
4831 mutex_unlock(&dsi->lock); in dsi_set_config()
4835 mutex_unlock(&dsi->lock); in dsi_set_config()
4896 for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { in dsi_request_vc()
4897 if (!dsi->vc[i].dssdev) { in dsi_request_vc()
4898 dsi->vc[i].dssdev = dssdev; in dsi_request_vc()
4904 DSSERR("cannot get VC for display %s", dssdev->name); in dsi_request_vc()
4905 return -ENOSPC; in dsi_request_vc()
4915 return -EINVAL; in dsi_set_vc_id()
4920 return -EINVAL; in dsi_set_vc_id()
4923 if (dsi->vc[channel].dssdev != dssdev) { in dsi_set_vc_id()
4925 dssdev->name); in dsi_set_vc_id()
4926 return -EINVAL; in dsi_set_vc_id()
4929 dsi->vc[channel].vc_id = vc_id; in dsi_set_vc_id()
4940 dsi->vc[channel].dssdev == dssdev) { in dsi_release_vc()
4941 dsi->vc[channel].dssdev = NULL; in dsi_release_vc()
4942 dsi->vc[channel].vc_id = 0; in dsi_release_vc()
4952 clk = devm_clk_get(&dsidev->dev, "fck"); in dsi_get_clocks()
4958 dsi->dss_clk = clk; in dsi_get_clocks()
4974 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel); in dsi_connect()
4976 return -ENODEV; in dsi_connect()
4985 dssdev->name); in dsi_connect()
4996 WARN_ON(dst != dssdev->dst); in dsi_disconnect()
4998 if (dst != dssdev->dst) in dsi_disconnect()
5003 if (dssdev->manager) in dsi_disconnect()
5004 dss_mgr_disconnect(dssdev->manager, dssdev); in dsi_disconnect()
5049 struct omap_dss_device *out = &dsi->output; in dsi_init_output()
5051 out->dev = &dsidev->dev; in dsi_init_output()
5052 out->id = dsi->module_id == 0 ? in dsi_init_output()
5055 out->output_type = OMAP_DISPLAY_TYPE_DSI; in dsi_init_output()
5056 out->name = dsi->module_id == 0 ? "dsi.0" : "dsi.1"; in dsi_init_output()
5057 out->dispc_channel = dsi_get_channel(dsi->module_id); in dsi_init_output()
5058 out->ops.dsi = &dsi_ops; in dsi_init_output()
5059 out->owner = THIS_MODULE; in dsi_init_output()
5067 struct omap_dss_device *out = &dsi->output; in dsi_uninit_output()
5074 struct device_node *node = pdev->dev.of_node; in dsi_probe_of()
5083 ep = of_graph_get_endpoint_by_regs(node, 0, -1); in dsi_probe_of()
5089 dev_err(&pdev->dev, "failed to find lane data\n"); in dsi_probe_of()
5090 r = -EINVAL; in dsi_probe_of()
5097 num_pins > dsi->num_lanes_supported * 2) { in dsi_probe_of()
5098 dev_err(&pdev->dev, "bad number of lanes\n"); in dsi_probe_of()
5099 r = -EINVAL; in dsi_probe_of()
5105 dev_err(&pdev->dev, "failed to read lane data\n"); in dsi_probe_of()
5113 r = dsi_configure_pins(&dsi->output, &pin_cfg); in dsi_probe_of()
5115 dev_err(&pdev->dev, "failed to configure pins"); in dsi_probe_of()
5135 .n_max = (1 << 7) - 1,
5136 .m_max = (1 << 11) - 1,
5137 .mX_max = (1 << 4) - 1,
5160 .n_max = (1 << 8) - 1,
5161 .m_max = (1 << 12) - 1,
5162 .mX_max = (1 << 5) - 1,
5185 .n_max = (1 << 8) - 1,
5186 .m_max = (1 << 12) - 1,
5187 .mX_max = (1 << 5) - 1,
5212 struct dss_pll *pll = &dsi->pll; in dsi_init_pll_data()
5216 clk = devm_clk_get(&dsidev->dev, "sys_clk"); in dsi_init_pll_data()
5222 pll->name = dsi->module_id == 0 ? "dsi0" : "dsi1"; in dsi_init_pll_data()
5223 pll->id = dsi->module_id == 0 ? DSS_PLL_DSI1 : DSS_PLL_DSI2; in dsi_init_pll_data()
5224 pll->clkin = clk; in dsi_init_pll_data()
5225 pll->base = dsi->pll_base; in dsi_init_pll_data()
5232 pll->hw = &dss_omap3_dsi_pll_hw; in dsi_init_pll_data()
5238 pll->hw = &dss_omap4_dsi_pll_hw; in dsi_init_pll_data()
5242 pll->hw = &dss_omap5_dsi_pll_hw; in dsi_init_pll_data()
5246 return -ENODEV; in dsi_init_pll_data()
5249 pll->ops = &dsi_pll_ops; in dsi_init_pll_data()
5269 dsi = devm_kzalloc(&dsidev->dev, sizeof(*dsi), GFP_KERNEL); in dsi_bind()
5271 return -ENOMEM; in dsi_bind()
5273 dsi->pdev = dsidev; in dsi_bind()
5276 spin_lock_init(&dsi->irq_lock); in dsi_bind()
5277 spin_lock_init(&dsi->errors_lock); in dsi_bind()
5278 dsi->errors = 0; in dsi_bind()
5281 spin_lock_init(&dsi->irq_stats_lock); in dsi_bind()
5282 dsi->irq_stats.last_reset = jiffies; in dsi_bind()
5285 mutex_init(&dsi->lock); in dsi_bind()
5286 sema_init(&dsi->bus_lock, 1); in dsi_bind()
5288 INIT_DEFERRABLE_WORK(&dsi->framedone_timeout_work, in dsi_bind()
5292 timer_setup(&dsi->te_timer, dsi_te_timeout, 0); in dsi_bind()
5300 return -EINVAL; in dsi_bind()
5303 temp_res.start = res->start; in dsi_bind()
5304 temp_res.end = temp_res.start + DSI_PROTO_SZ - 1; in dsi_bind()
5310 dsi->proto_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5312 if (!dsi->proto_base) { in dsi_bind()
5314 return -ENOMEM; in dsi_bind()
5322 return -EINVAL; in dsi_bind()
5325 temp_res.start = res->start + DSI_PHY_OFFSET; in dsi_bind()
5326 temp_res.end = temp_res.start + DSI_PHY_SZ - 1; in dsi_bind()
5330 dsi->phy_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5332 if (!dsi->phy_base) { in dsi_bind()
5334 return -ENOMEM; in dsi_bind()
5342 return -EINVAL; in dsi_bind()
5345 temp_res.start = res->start + DSI_PLL_OFFSET; in dsi_bind()
5346 temp_res.end = temp_res.start + DSI_PLL_SZ - 1; in dsi_bind()
5350 dsi->pll_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5352 if (!dsi->pll_base) { in dsi_bind()
5354 return -ENOMEM; in dsi_bind()
5357 dsi->irq = platform_get_irq(dsi->pdev, 0); in dsi_bind()
5358 if (dsi->irq < 0) { in dsi_bind()
5360 return -ENODEV; in dsi_bind()
5363 r = devm_request_irq(&dsidev->dev, dsi->irq, omap_dsi_irq_handler, in dsi_bind()
5364 IRQF_SHARED, dev_name(&dsidev->dev), dsi->pdev); in dsi_bind()
5370 if (dsidev->dev.of_node) { in dsi_bind()
5374 match = of_match_node(dsi_of_match, dsidev->dev.of_node); in dsi_bind()
5377 return -ENODEV; in dsi_bind()
5380 d = match->data; in dsi_bind()
5382 while (d->address != 0 && d->address != dsi_mem->start) in dsi_bind()
5385 if (d->address == 0) { in dsi_bind()
5387 return -ENODEV; in dsi_bind()
5390 dsi->module_id = d->id; in dsi_bind()
5392 dsi->module_id = dsidev->id; in dsi_bind()
5396 for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { in dsi_bind()
5397 dsi->vc[i].source = DSI_VC_SOURCE_L4; in dsi_bind()
5398 dsi->vc[i].dssdev = NULL; in dsi_bind()
5399 dsi->vc[i].vc_id = 0; in dsi_bind()
5408 pm_runtime_enable(&dsidev->dev); in dsi_bind()
5415 dev_dbg(&dsidev->dev, "OMAP DSI rev %d.%d\n", in dsi_bind()
5422 dsi->num_lanes_supported = 1 + REG_GET(dsidev, DSI_GNQ, 11, 9); in dsi_bind()
5424 dsi->num_lanes_supported = 3; in dsi_bind()
5426 dsi->line_buffer_size = dsi_get_line_buf_size(dsidev); in dsi_bind()
5430 if (dsidev->dev.of_node) { in dsi_bind()
5437 r = of_platform_populate(dsidev->dev.of_node, NULL, NULL, in dsi_bind()
5438 &dsidev->dev); in dsi_bind()
5445 if (dsi->module_id == 0) in dsi_bind()
5447 else if (dsi->module_id == 1) in dsi_bind()
5451 if (dsi->module_id == 0) in dsi_bind()
5453 else if (dsi->module_id == 1) in dsi_bind()
5464 pm_runtime_disable(&dsidev->dev); in dsi_bind()
5473 of_platform_depopulate(&dsidev->dev); in dsi_unbind()
5475 WARN_ON(dsi->scp_clk_refcount > 0); in dsi_unbind()
5477 dss_pll_unregister(&dsi->pll); in dsi_unbind()
5481 pm_runtime_disable(&dsidev->dev); in dsi_unbind()
5483 if (dsi->vdds_dsi_reg != NULL && dsi->vdds_dsi_enabled) { in dsi_unbind()
5484 regulator_disable(dsi->vdds_dsi_reg); in dsi_unbind()
5485 dsi->vdds_dsi_enabled = false; in dsi_unbind()
5496 return component_add(&pdev->dev, &dsi_component_ops); in dsi_probe()
5501 component_del(&pdev->dev, &dsi_component_ops); in dsi_remove()
5509 dsi->is_enabled = false; in dsi_runtime_suspend()
5513 synchronize_irq(dsi->irq); in dsi_runtime_suspend()
5530 dsi->is_enabled = true; in dsi_runtime_resume()
5560 { .compatible = "ti,omap3-dsi", .data = dsi_of_data_omap3, },
5561 { .compatible = "ti,omap4-dsi", .data = dsi_of_data_omap4, },
5562 { .compatible = "ti,omap5-dsi", .data = dsi_of_data_omap5, },