3174 static void dispc_mgr_set_lcd_divisor(enum omap_channel channel, u16 lck_div,  in dispc_mgr_set_lcd_divisor()  argument
3177 	BUG_ON(lck_div < 1);  in dispc_mgr_set_lcd_divisor()
3181 			FLD_VAL(lck_div, 23, 16) | FLD_VAL(pck_div, 7, 0));  in dispc_mgr_set_lcd_divisor()
3185 		dispc.core_clk_rate = dispc_fclk_rate() / lck_div;  in dispc_mgr_set_lcd_divisor()
3188 static void dispc_mgr_get_lcd_divisor(enum omap_channel channel, int *lck_div,  in dispc_mgr_get_lcd_divisor()  argument
3193 	*lck_div = FLD_GET(l, 23, 16);  in dispc_mgr_get_lcd_divisor()
3579 	if (cinfo->lck_div > 255 || cinfo->lck_div == 0)  in dispc_calc_clock_rates()
3584 	cinfo->lck = dispc_fclk_rate / cinfo->lck_div;  in dispc_calc_clock_rates()
3653 	DSSDBG("lck = %lu (%u)\n", cinfo->lck, cinfo->lck_div);  in dispc_mgr_set_clock_div()
3656 	dispc_mgr_set_lcd_divisor(channel, cinfo->lck_div, cinfo->pck_div);  in dispc_mgr_set_clock_div()
3666 	cinfo->lck_div = REG_GET(DISPC_DIVISORo(channel), 23, 16);  in dispc_mgr_get_clock_div()
3669 	cinfo->lck = fck / cinfo->lck_div;  in dispc_mgr_get_clock_div()