Lines Matching +full:0 +full:x10000400
131 unsigned int bestdiff = ~0; in matroxfb_PLL_calcclock()
132 unsigned int bestvco = 0; in matroxfb_PLL_calcclock()
159 for (; p-- > 0; fwant >>= 1, bestdiff >>= 1) { in matroxfb_PLL_calcclock()
201 hw->SEQ[0] = 0x00; in matroxfb_vgaHWinit()
202 hw->SEQ[1] = 0x01; /* or 0x09 */ in matroxfb_vgaHWinit()
203 hw->SEQ[2] = 0x0F; /* bitplanes */ in matroxfb_vgaHWinit()
204 hw->SEQ[3] = 0x00; in matroxfb_vgaHWinit()
205 hw->SEQ[4] = 0x0E; in matroxfb_vgaHWinit()
206 …/* CRTC 0..7, 9, 16..19, 21, 22 are reprogrammed by Matrox Millennium code... Hope that by MGA1064… in matroxfb_vgaHWinit()
220 /* GCTL is ignored when not using 0xA0000 aperture */ in matroxfb_vgaHWinit()
221 hw->GCTL[0] = 0x00; in matroxfb_vgaHWinit()
222 hw->GCTL[1] = 0x00; in matroxfb_vgaHWinit()
223 hw->GCTL[2] = 0x00; in matroxfb_vgaHWinit()
224 hw->GCTL[3] = 0x00; in matroxfb_vgaHWinit()
225 hw->GCTL[4] = 0x00; in matroxfb_vgaHWinit()
226 hw->GCTL[5] = 0x40; in matroxfb_vgaHWinit()
227 hw->GCTL[6] = 0x05; in matroxfb_vgaHWinit()
228 hw->GCTL[7] = 0x0F; in matroxfb_vgaHWinit()
229 hw->GCTL[8] = 0xFF; in matroxfb_vgaHWinit()
232 for (i = 0; i < 16; i++) in matroxfb_vgaHWinit()
234 hw->ATTR[16] = 0x41; in matroxfb_vgaHWinit()
235 hw->ATTR[17] = 0xFF; in matroxfb_vgaHWinit()
236 hw->ATTR[18] = 0x0F; in matroxfb_vgaHWinit()
237 hw->ATTR[19] = 0x00; in matroxfb_vgaHWinit()
238 hw->ATTR[20] = 0x00; in matroxfb_vgaHWinit()
245 /* do it for 4bpp (because of (4bpp >> 1(interleaved))/4 == 0) */ in matroxfb_vgaHWinit()
274 if (((ht & 0x07) == 0x06) || ((ht & 0x0F) == 0x04)) in matroxfb_vgaHWinit()
279 hw->CRTCEXT[0] = 0; in matroxfb_vgaHWinit()
280 hw->CRTCEXT[5] = 0; in matroxfb_vgaHWinit()
282 hw->CRTCEXT[0] = 0x80; in matroxfb_vgaHWinit()
288 hw->CRTCEXT[0] |= (wd & 0x300) >> 4; in matroxfb_vgaHWinit()
289 hw->CRTCEXT[1] = (((ht - 4) & 0x100) >> 8) | in matroxfb_vgaHWinit()
290 ((hd & 0x100) >> 7) | /* blanking */ in matroxfb_vgaHWinit()
291 ((hs & 0x100) >> 6) | /* sync start */ in matroxfb_vgaHWinit()
292 (hbe & 0x040); /* end hor. blanking */ in matroxfb_vgaHWinit()
295 hw->CRTCEXT[1] |= 0x88; /* enable horizontal and vertical vidrst */ in matroxfb_vgaHWinit()
296 hw->CRTCEXT[2] = ((vt & 0xC00) >> 10) | in matroxfb_vgaHWinit()
297 ((vd & 0x400) >> 8) | /* disp end */ in matroxfb_vgaHWinit()
298 ((vd & 0xC00) >> 7) | /* vblanking start */ in matroxfb_vgaHWinit()
299 ((vs & 0xC00) >> 5) | in matroxfb_vgaHWinit()
300 ((lc & 0x400) >> 3); in matroxfb_vgaHWinit()
301 hw->CRTCEXT[3] = (divider - 1) | 0x80; in matroxfb_vgaHWinit()
302 hw->CRTCEXT[4] = 0; in matroxfb_vgaHWinit()
304 hw->CRTC[0] = ht-4; in matroxfb_vgaHWinit()
307 hw->CRTC[3] = (hbe & 0x1F) | 0x80; in matroxfb_vgaHWinit()
309 hw->CRTC[5] = ((hbe & 0x20) << 2) | (he & 0x1F); in matroxfb_vgaHWinit()
310 hw->CRTC[6] = vt & 0xFF; in matroxfb_vgaHWinit()
311 hw->CRTC[7] = ((vt & 0x100) >> 8) | in matroxfb_vgaHWinit()
312 ((vd & 0x100) >> 7) | in matroxfb_vgaHWinit()
313 ((vs & 0x100) >> 6) | in matroxfb_vgaHWinit()
314 ((vd & 0x100) >> 5) | in matroxfb_vgaHWinit()
315 ((lc & 0x100) >> 4) | in matroxfb_vgaHWinit()
316 ((vt & 0x200) >> 4) | in matroxfb_vgaHWinit()
317 ((vd & 0x200) >> 3) | in matroxfb_vgaHWinit()
318 ((vs & 0x200) >> 2); in matroxfb_vgaHWinit()
319 hw->CRTC[8] = 0x00; in matroxfb_vgaHWinit()
320 hw->CRTC[9] = ((vd & 0x200) >> 4) | in matroxfb_vgaHWinit()
321 ((lc & 0x200) >> 3); in matroxfb_vgaHWinit()
323 hw->CRTC[9] |= 0x80; in matroxfb_vgaHWinit()
325 hw->CRTC[i] = 0x00; in matroxfb_vgaHWinit()
326 hw->CRTC[16] = vs /* & 0xFF */; in matroxfb_vgaHWinit()
327 hw->CRTC[17] = (ve & 0x0F) | 0x20; in matroxfb_vgaHWinit()
328 hw->CRTC[18] = vd /* & 0xFF */; in matroxfb_vgaHWinit()
329 hw->CRTC[19] = wd /* & 0xFF */; in matroxfb_vgaHWinit()
330 hw->CRTC[20] = 0x00; in matroxfb_vgaHWinit()
331 hw->CRTC[21] = vd /* & 0xFF */; in matroxfb_vgaHWinit()
332 hw->CRTC[22] = (vt + 1) /* & 0xFF */; in matroxfb_vgaHWinit()
333 hw->CRTC[23] = 0xC3; in matroxfb_vgaHWinit()
335 return 0; in matroxfb_vgaHWinit()
348 for (i = 0; i < 5; i++) in matroxfb_vgaHWrestore()
352 for (i = 0; i < 9; i++) in matroxfb_vgaHWrestore()
356 for (i = 0; i < 25; i++) in matroxfb_vgaHWrestore()
360 for (i = 0; i < 21; i++) in matroxfb_vgaHWrestore()
367 mga_outb(M_ATTR_INDEX, 0); in matroxfb_vgaHWrestore()
371 mga_setr(M_CRTC_INDEX, 17, hw->CRTC[17] & 0x7F); in matroxfb_vgaHWrestore()
372 for (i = 0; i < 25; i++) in matroxfb_vgaHWrestore()
374 for (i = 0; i < 9; i++) in matroxfb_vgaHWrestore()
376 for (i = 0; i < 21; i++) { in matroxfb_vgaHWrestore()
381 mga_outb(M_PALETTE_MASK, 0xFF); in matroxfb_vgaHWrestore()
382 mga_outb(M_DAC_REG, 0x00); in matroxfb_vgaHWrestore()
383 for (i = 0; i < 768; i++) in matroxfb_vgaHWrestore()
386 mga_outb(M_ATTR_INDEX, 0x20); in matroxfb_vgaHWrestore()
394 if (b0 == 0x2E && readb(pins+1) == 0x41) { in get_pins()
403 *dst++ = 0x2E; in get_pins()
404 *dst++ = 0x41; in get_pins()
406 cksum = 0x2E + 0x41 + pins_len; in get_pins()
414 } else if (b0 == 0x40 && readb(pins+1) == 0x00) { in get_pins()
418 *dst++ = 0x40; in get_pins()
419 *dst++ = 0; in get_pins()
420 for (i = 2; i < 0x40; i++) { in get_pins()
423 bd->pins_len = 0x40; in get_pins()
431 if (pcir_offset >= 26 && pcir_offset < 0xFFE0 && in get_bios_version()
438 h = readb(vbios + pcir_offset + 0x12); in get_bios_version()
439 bd->version.vMaj = (h >> 4) & 0xF; in get_bios_version()
440 bd->version.vMin = h & 0xF; in get_bios_version()
441 bd->version.vRev = readb(vbios + pcir_offset + 0x13); in get_bios_version()
446 bd->version.vMaj = (h >> 4) & 0xF; in get_bios_version()
447 bd->version.vMin = h & 0xF; in get_bios_version()
448 bd->version.vRev = 0; in get_bios_version()
455 b = readb(vbios + 0x7FF1); in get_bios_output()
456 if (b == 0xFF) { in get_bios_output()
457 b = 0; in get_bios_output()
466 bd->output.tvout = 0; in get_bios_tvout()
467 if (readb(vbios + 0x1D) != 'I' || in get_bios_tvout()
468 readb(vbios + 0x1E) != 'B' || in get_bios_tvout()
469 readb(vbios + 0x1F) != 'M' || in get_bios_tvout()
470 readb(vbios + 0x20) != ' ') { in get_bios_tvout()
473 for (i = 0x2D; i < 0x2D + 128; i++) { in get_bios_tvout()
484 if (b == 0) in get_bios_tvout()
492 if (readb(vbios) != 0x55 || readb(vbios + 1) != 0xAA) { in parse_bios()
508 for ( pins_offset = 0 ; pins_offset <= 0xFF80 ; pins_offset++ ) { in parse_bios()
511 header[0] = readb(vbios + pins_offset); in parse_bios()
514 if ( (header[0] == 0x2E) && (header[1] == 0x41) in parse_bios()
515 && ((header[2] == 0x40) || (header[2] == 0x80)) ) { in parse_bios()
523 pins_offset = readb(vbios + 0x7FFC) | (readb(vbios + 0x7FFD) << 8); in parse_bios()
524 if (pins_offset <= 0xFF80) { in parse_bios()
536 case 0: maxdac = 175000; break; in parse_pins1()
548 minfo->values.reg.mctlwtst = 0x00030101; in parse_pins1()
549 return 0; in parse_pins1()
558 minfo->values.reg.mctlwtst = 0x00030101; in default_pins1()
565 minfo->limits.system.vcomax = (bd->pins[41] == 0xFF) ? 230000 : ((bd->pins[41] + 100) * 1000); in parse_pins2()
566 minfo->values.reg.mctlwtst = ((bd->pins[51] & 0x01) ? 0x00000001 : 0) | in parse_pins2()
567 ((bd->pins[51] & 0x02) ? 0x00000100 : 0) | in parse_pins2()
568 ((bd->pins[51] & 0x04) ? 0x00010000 : 0) | in parse_pins2()
569 ((bd->pins[51] & 0x08) ? 0x00020000 : 0); in parse_pins2()
570 minfo->values.pll.system = (bd->pins[43] == 0xFF) ? 50000 : ((bd->pins[43] + 100) * 1000); in parse_pins2()
572 return 0; in parse_pins2()
580 minfo->values.reg.mctlwtst = 0x00030101; in default_pins2()
589 minfo->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000); in parse_pins3()
590 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ? in parse_pins3()
591 0x01250A21 : get_unaligned_le32(bd->pins + 48); in parse_pins3()
593 minfo->values.reg.memrdbk = ((bd->pins[57] << 21) & 0x1E000000) | in parse_pins3()
594 ((bd->pins[57] << 22) & 0x00C00000) | in parse_pins3()
595 ((bd->pins[56] << 1) & 0x000001E0) | in parse_pins3()
596 ( bd->pins[56] & 0x0000000F); in parse_pins3()
599 minfo->features.pll.ref_freq = (bd->pins[52] & 0x20) ? 14318 : 27000; in parse_pins3()
600 return 0; in parse_pins3()
608 minfo->values.reg.mctlwtst = 0x01250A21; in default_pins3()
609 minfo->values.reg.memrdbk = 0x00000000; in default_pins3()
610 minfo->values.reg.opt = 0x00000C00; in default_pins3()
611 minfo->values.reg.opt2 = 0x00000000; in default_pins3()
618 minfo->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000; in parse_pins4()
619 …minfo->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 38]… in parse_pins4()
621 minfo->values.reg.memrdbk = ((bd->pins[87] << 21) & 0x1E000000) | in parse_pins4()
622 ((bd->pins[87] << 22) & 0x00C00000) | in parse_pins4()
623 ((bd->pins[86] << 1) & 0x000001E0) | in parse_pins4()
624 ( bd->pins[86] & 0x0000000F); in parse_pins4()
625 minfo->values.reg.opt = ((bd->pins[53] << 15) & 0x00400000) | in parse_pins4()
626 ((bd->pins[53] << 22) & 0x10000000) | in parse_pins4()
627 ((bd->pins[53] << 7) & 0x00001C00); in parse_pins4()
629 minfo->values.pll.system = (bd->pins[ 65] == 0xFF) ? 200000 : bd->pins[ 65] * 4000; in parse_pins4()
630 minfo->features.pll.ref_freq = (bd->pins[ 92] & 0x01) ? 14318 : 27000; in parse_pins4()
631 return 0; in parse_pins4()
639 minfo->values.reg.mctlwtst = 0x04A450A1; in default_pins4()
640 minfo->values.reg.memrdbk = 0x000000E7; in default_pins4()
641 minfo->values.reg.opt = 0x10000400; in default_pins4()
642 minfo->values.reg.opt3 = 0x0190A419; in default_pins4()
654 minfo->limits.pixel.vcomax = (bd->pins[ 38] == 0xFF) ? 600000 : bd->pins[ 38] * mult; in parse_pins5()
655 …minfo->limits.system.vcomax = (bd->pins[ 36] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 36]… in parse_pins5()
656 …minfo->limits.video.vcomax = (bd->pins[ 37] == 0xFF) ? minfo->limits.system.vcomax : bd->pins[ 37]… in parse_pins5()
657 minfo->limits.pixel.vcomin = (bd->pins[123] == 0xFF) ? 256000 : bd->pins[123] * mult; in parse_pins5()
658 …minfo->limits.system.vcomin = (bd->pins[121] == 0xFF) ? minfo->limits.pixel.vcomin : bd->pins[121]… in parse_pins5()
659 …minfo->limits.video.vcomin = (bd->pins[122] == 0xFF) ? minfo->limits.system.vcomin : bd->pins[122]… in parse_pins5()
661 minfo->values.pll.video = (bd->pins[ 92] == 0xFF) ? 284000 : bd->pins[ 92] * 4000; in parse_pins5()
668 minfo->features.pll.ref_freq = (bd->pins[110] & 0x01) ? 14318 : 27000; in parse_pins5()
669 minfo->values.memory.ddr = (bd->pins[114] & 0x60) == 0x20; in parse_pins5()
670 minfo->values.memory.dll = (bd->pins[115] & 0x02) != 0; in parse_pins5()
671 minfo->values.memory.emrswen = (bd->pins[115] & 0x01) != 0; in parse_pins5()
672 minfo->values.reg.maccess = minfo->values.memory.emrswen ? 0x00004000 : 0x00000000; in parse_pins5()
677 0, 1, 5, 6, 7, 5, 2, 3 in parse_pins5()
684 return 0; in parse_pins5()
698 minfo->values.reg.opt = 0x404A1160; in default_pins5()
699 minfo->values.reg.opt2 = 0x0000AC00; in default_pins5()
700 minfo->values.reg.opt3 = 0x0090A409; in default_pins5()
702 minfo->values.reg.mctlwtst = 0x0C81462B; in default_pins5()
703 minfo->values.reg.memmisc = 0x80000004; in default_pins5()
704 minfo->values.reg.memrdbk = 0x01001103; in default_pins5()
709 minfo->values.reg.maccess = 0x00004000; in default_pins5()
737 if (bd->pins[0] == 0x2E && bd->pins[1] == 0x41) { in matroxfb_set_limits()
774 memset(&minfo->bios, 0, sizeof(minfo->bios)); in matroxfb_read_pins()
787 b = ioremap(0x000C0000, 65536); in matroxfb_read_pins()
791 unsigned int ven = readb(b+0x64+0) | (readb(b+0x64+1) << 8); in matroxfb_read_pins()
792 unsigned int dev = readb(b+0x64+2) | (readb(b+0x64+3) << 8); in matroxfb_read_pins()
806 (minfo->values.reg.opt & 0x1C00) >> 10); in matroxfb_read_pins()