Lines Matching refs:mga_outl
117 mga_outl(0x3C14, ((mt->HDisplay - 8) << 16) | (mt->HTotal - 8)); in matroxfb_dh_restore()
118 mga_outl(0x3C18, ((mt->HSyncEnd - 8) << 16) | (mt->HSyncStart - 8)); in matroxfb_dh_restore()
119 mga_outl(0x3C1C, ((mt->VDisplay - 1) << 16) | (mt->VTotal - 1)); in matroxfb_dh_restore()
120 mga_outl(0x3C20, ((mt->VSyncEnd - 1) << 16) | (mt->VSyncStart - 1)); in matroxfb_dh_restore()
121 mga_outl(0x3C24, ((mt->VSyncStart) << 16) | (mt->HSyncStart)); /* preload */ in matroxfb_dh_restore()
126 mga_outl(0x3C2C, pos); /* field #1 vmemory start */ in matroxfb_dh_restore()
127 mga_outl(0x3C28, pos + linelen); /* field #0 vmemory start */ in matroxfb_dh_restore()
131 mga_outl(0x3C28, pos); /* vmemory start */ in matroxfb_dh_restore()
134 mga_outl(0x3C40, linelen); in matroxfb_dh_restore()
136 mga_outl(0x3C4C, datactl); /* data control */ in matroxfb_dh_restore()
140 mga_outl(0x3C10, tmp & ~0x02000000); in matroxfb_dh_restore()
150 mga_outl(0x3C10, tmp); in matroxfb_dh_restore()
158 mga_outl(0x3C44, tmp); in matroxfb_dh_restore()
164 mga_outl(0x3C10, 0x00000004); /* disable CRTC2, CRTC1->DAC1, PLL as clock source */ in matroxfb_dh_disable()
182 mga_outl(0x3C2C, pos); in matroxfb_dh_pan_var()
183 mga_outl(0x3C28, pos + linelen); in matroxfb_dh_pan_var()
185 mga_outl(0x3C28, pos); in matroxfb_dh_pan_var()