292 	(void)INREG(CLOCK_CNTL_DATA);  in radeon_pll_errata_after_index_slow()
293 	(void)INREG(CRTC_GEN_CNTL);  in radeon_pll_errata_after_index_slow()
304 		save = INREG(CLOCK_CNTL_INDEX);  in radeon_pll_errata_after_data_slow()
307 		tmp = INREG(CLOCK_CNTL_DATA);  in radeon_pll_errata_after_data_slow()
318 	tmp = INREG(addr);  in _OUTREGP()
331 	data = INREG(CLOCK_CNTL_DATA);  in __INPLL()
360 		if ((INREG(RBBM_STATUS) & 0x7f) >= entries)  in _radeon_fifo_wait()
382 		if (!(INREG(DSTCACHE_CTLSTAT) & RB2D_DC_BUSY))  in radeon_engine_flush()
397 		if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) {  in _radeon_engine_idle()
429 	temp = INREG(MPP_TB_CONFIG);  in radeon_map_ROM()
433 	temp = INREG(MPP_TB_CONFIG);  in radeon_map_ROM()
597 		if (((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3ff) == 0)  in radeon_probe_pll_params()
603 		if (((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3ff) != 0)  in radeon_probe_pll_params()
607 		if (((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3ff) == 0)  in radeon_probe_pll_params()
619 	hTotal = ((INREG(CRTC_H_TOTAL_DISP) & 0x1ff) + 1) * 8;  in radeon_probe_pll_params()
620 	vTotal = ((INREG(CRTC_V_TOTAL_DISP) & 0x3ff) + 1);  in radeon_probe_pll_params()
991 				tmp = INREG(LVDS_GEN_CNTL);  in radeonfb_ioctl()
995 				tmp = INREG(LVDS_GEN_CNTL);  in radeonfb_ioctl()
1003 				tmp = INREG(CRTC_EXT_CNTL);  in radeonfb_ioctl()
1008 				tmp = INREG(CRTC_EXT_CNTL);  in radeonfb_ioctl()
1021 			tmp = INREG(LVDS_GEN_CNTL);  in radeonfb_ioctl()
1025 			tmp = INREG(CRTC_EXT_CNTL);  in radeonfb_ioctl()
1049 	val = INREG(CRTC_EXT_CNTL);  in radeon_screen_blank()
1086 		val = INREG(LVDS_GEN_CNTL);  in radeon_screen_blank()
1248 			dac_cntl2 = INREG(DAC_CNTL2);  in radeonfb_setcolreg()
1278 			dac_cntl2 = INREG(DAC_CNTL2);  in radeonfb_setcmap()
1314 	save->crtc_gen_cntl = INREG(CRTC_GEN_CNTL);  in radeon_save_state()
1315 	save->crtc_ext_cntl = INREG(CRTC_EXT_CNTL);  in radeon_save_state()
1316 	save->crtc_more_cntl = INREG(CRTC_MORE_CNTL);  in radeon_save_state()
1317 	save->dac_cntl = INREG(DAC_CNTL);  in radeon_save_state()
1318         save->crtc_h_total_disp = INREG(CRTC_H_TOTAL_DISP);  in radeon_save_state()
1319         save->crtc_h_sync_strt_wid = INREG(CRTC_H_SYNC_STRT_WID);  in radeon_save_state()
1320         save->crtc_v_total_disp = INREG(CRTC_V_TOTAL_DISP);  in radeon_save_state()
1321         save->crtc_v_sync_strt_wid = INREG(CRTC_V_SYNC_STRT_WID);  in radeon_save_state()
1322 	save->crtc_pitch = INREG(CRTC_PITCH);  in radeon_save_state()
1323 	save->surface_cntl = INREG(SURFACE_CNTL);  in radeon_save_state()
1326 	save->fp_crtc_h_total_disp = INREG(FP_CRTC_H_TOTAL_DISP);  in radeon_save_state()
1327 	save->fp_crtc_v_total_disp = INREG(FP_CRTC_V_TOTAL_DISP);  in radeon_save_state()
1328 	save->fp_gen_cntl = INREG(FP_GEN_CNTL);  in radeon_save_state()
1329 	save->fp_h_sync_strt_wid = INREG(FP_H_SYNC_STRT_WID);  in radeon_save_state()
1330 	save->fp_horz_stretch = INREG(FP_HORZ_STRETCH);  in radeon_save_state()
1331 	save->fp_v_sync_strt_wid = INREG(FP_V_SYNC_STRT_WID);  in radeon_save_state()
1332 	save->fp_vert_stretch = INREG(FP_VERT_STRETCH);  in radeon_save_state()
1333 	save->lvds_gen_cntl = INREG(LVDS_GEN_CNTL);  in radeon_save_state()
1334 	save->lvds_pll_cntl = INREG(LVDS_PLL_CNTL);  in radeon_save_state()
1335 	save->tmds_crc = INREG(TMDS_CRC);  in radeon_save_state()
1336 	save->tmds_transmitter_cntl = INREG(TMDS_TRANSMITTER_CNTL);  in radeon_save_state()
1340 	save->clk_cntl_index = INREG(CLOCK_CNTL_INDEX) & ~0x3f;  in radeon_save_state()
1557 		u32 fp2_gen_cntl = INREG(FP2_GEN_CNTL);  in radeon_calc_pll_regs()
1573 				disp_output_cntl = INREG(DISP_OUTPUT_CNTL);  in radeon_calc_pll_regs()
2028 		save_crtc2_gen_cntl = INREG(CRTC2_GEN_CNTL);  in fixup_memory_mappings()
2031 	save_crtc_gen_cntl = INREG(CRTC_GEN_CNTL);  in fixup_memory_mappings()
2032 	save_crtc_ext_cntl = INREG(CRTC_EXT_CNTL);  in fixup_memory_mappings()
2038 	aper_base = INREG(CNFG_APER_0_BASE);  in fixup_memory_mappings()
2039 	aper_size = INREG(CNFG_APER_SIZE);  in fixup_memory_mappings()
2105 		u32 tom = INREG(NB_TOM);  in radeon_identify_vram()
2115 		OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000);  in radeon_identify_vram()
2126 		tmp = INREG(CNFG_MEMSIZE);  in radeon_identify_vram()
2152 	    (INREG(MEM_SDRAM_MODE_REG) & (1<<30)))  in radeon_identify_vram()
2157 	tmp = INREG(MEM_CNTL);  in radeon_identify_vram()
2320 	rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16;  in radeonfb_pci_register()
2327 	    (INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK)  in radeonfb_pci_register()