Lines Matching +full:0 +full:x20002000

118 } while (0)
125 } while (0)
144 0, /* EXT_VERT_STRETCH */
185 return 0; in aty_ld_lcd()
288 640, 480, 640, 480, 0, 0, 8, 0,
289 {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
290 0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2,
291 0, FB_VMODE_NONINTERLACED
297 0, FB_VMODE_NONINTERLACED
339 module_param_named(vmode, default_vmode, int, 0);
341 module_param_named(cmode, default_cmode, int, 0);
346 static unsigned int mach64_count = 0;
347 static unsigned long phys_vmembase[FB_MAX] = { 0, };
348 static unsigned long phys_size[FB_MAX] = { 0, };
349 static unsigned long phys_guiregbase[FB_MAX] = { 0, };
391 { PCI_CHIP_MACH64GX, "ATI888GX00 (Mach64 GX)", 135, 50, 50, 0, ATI_CHIP_88800GX },
392 { PCI_CHIP_MACH64CX, "ATI888CX00 (Mach64 CX)", 135, 50, 50, 0, ATI_CHIP_88800CX },
396 { PCI_CHIP_MACH64CT, "ATI264CT (Mach64 CT)", 135, 60, 60, 0, ATI_CHIP_264CT },
397 { PCI_CHIP_MACH64ET, "ATI264ET (Mach64 ET)", 135, 60, 60, 0, ATI_CHIP_264ET },
400 { PCI_CHIP_MACH64LT, "ATI264LT (Mach64 LT)", 135, 63, 63, 0, ATI_CHIP_264LT },
452 (info->fix.smem_len == 0x800000 || in aty_fudge_framebuffer_len()
453 (par->bus_type == ISA && info->fix.smem_len == 0x400000))) in aty_fudge_framebuffer_len()
465 for (i = (int)ARRAY_SIZE(aty_chips) - 1; i >= 0; i--) in correct_chipset()
469 if (i < 0) in correct_chipset()
486 if (type != 0x00d7) in correct_chipset()
490 if (type != 0x0057) in correct_chipset()
496 switch (rev & 0x07) { in correct_chipset()
497 case 0x00: in correct_chipset()
498 switch (rev & 0xc0) { in correct_chipset()
499 case 0x00: in correct_chipset()
507 case 0x40: in correct_chipset()
517 case 0x01: in correct_chipset()
525 case 0x02: in correct_chipset()
536 switch (rev & 0x07) { in correct_chipset()
537 case 0x01: in correct_chipset()
545 case 0x02: in correct_chipset()
558 PRINTKI("%s [0x%04x rev 0x%02x]\n", name, type, rev); in correct_chipset()
559 return 0; in correct_chipset()
601 par->pll.ct.xres = 0; in atyfb_get_pixclock()
602 if (par->lcd_table != 0) { in atyfb_get_pixclock()
623 aty_st_le32(GP_IO, 0x31003100, par); /* drive outputs high */ in read_aty_sense()
625 aty_st_le32(GP_IO, 0, par); /* turn off outputs */ in read_aty_sense()
628 sense = ((i & 0x3000) >> 3) | (i & 0x100); in read_aty_sense()
631 aty_st_le32(GP_IO, 0x20000000, par); /* drive A low */ in read_aty_sense()
634 sense |= ((i & 0x1000) >> 7) | ((i & 0x100) >> 4); in read_aty_sense()
635 aty_st_le32(GP_IO, 0x20002000, par); /* drive A high again */ in read_aty_sense()
638 aty_st_le32(GP_IO, 0x10000000, par); /* drive B low */ in read_aty_sense()
641 sense |= ((i & 0x2000) >> 10) | ((i & 0x100) >> 6); in read_aty_sense()
642 aty_st_le32(GP_IO, 0x10001000, par); /* drive B high again */ in read_aty_sense()
645 aty_st_le32(GP_IO, 0x01000000, par); /* drive C low */ in read_aty_sense()
647 sense |= (aty_ld_le32(GP_IO, par) & 0x3000) >> 12; in read_aty_sense()
648 aty_st_le32(GP_IO, 0, par); /* turn off outputs */ in read_aty_sense()
663 if (par->lcd_table != 0) { in aty_get_crtc()
692 if (par->lcd_table != 0) { in aty_get_crtc()
710 if (par->lcd_table != 0) { in aty_set_crtc()
733 ((((crtc->h_tot_disp >> 16) & 0xff) + 1) << 3), in aty_set_crtc()
734 (((crtc->v_tot_disp >> 16) & 0x7ff) + 1), in aty_set_crtc()
735 (crtc->h_sync_strt_wid & 0x200000) ? 'N' : 'P', in aty_set_crtc()
736 (crtc->v_sync_strt_wid & 0x200000) ? 'N' : 'P', in aty_set_crtc()
755 #if 0 in aty_set_crtc()
762 if (par->lcd_table != 0) { in aty_set_crtc()
768 ((((crtc->shadow_h_tot_disp >> 16) & 0xff) + 1) << 3), in aty_set_crtc()
769 (((crtc->shadow_v_tot_disp >> 16) & 0x7ff) + 1), in aty_set_crtc()
770 (crtc->shadow_h_sync_strt_wid & 0x200000) ? 'N' : 'P', in aty_set_crtc()
771 (crtc->shadow_v_sync_strt_wid & 0x200000) ? 'N' : 'P'); in aty_set_crtc()
889 h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1; in aty_var_to_crtc()
890 v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1; in aty_var_to_crtc()
906 if (par->lcd_table != 0) { in aty_var_to_crtc()
918 crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par) | 0x4000; in aty_var_to_crtc()
949 if ((par->lcd_table != 0) && (crtc->lcd_gen_cntl & LCD_ON)) { in aty_var_to_crtc()
951 /* bpp -> bytespp, 1,4 -> 0; 8 -> 2; 15,16 -> 1; 24 -> 6; 32 -> 5 in aty_var_to_crtc()
952 const u8 DFP_h_sync_dly_LT[] = { 0, 2, 1, 6, 5 }; in aty_var_to_crtc()
953 const u8 ADD_to_strt_wid_and_dly_LT_DAC[] = { 0, 5, 6, 9, 9, 12, 12 }; */ in aty_var_to_crtc()
991 FAIL_MAX("h_disp too large", h_disp, 0xff); in aty_var_to_crtc()
992 FAIL_MAX("h_sync_strt too large", h_sync_strt, 0x1ff); in aty_var_to_crtc()
993 /*FAIL_MAX("h_sync_wid too large", h_sync_wid, 0x1f);*/ in aty_var_to_crtc()
994 if (h_sync_wid > 0x1f) in aty_var_to_crtc()
995 h_sync_wid = 0x1f; in aty_var_to_crtc()
996 FAIL_MAX("h_total too large", h_total, 0x1ff); in aty_var_to_crtc()
1011 FAIL_MAX("v_disp too large", v_disp, 0x7ff); in aty_var_to_crtc()
1012 FAIL_MAX("v_sync_stsrt too large", v_sync_strt, 0x7ff); in aty_var_to_crtc()
1013 /*FAIL_MAX("v_sync_wid too large", v_sync_wid, 0x1f);*/ in aty_var_to_crtc()
1014 if (v_sync_wid > 0x1f) in aty_var_to_crtc()
1015 v_sync_wid = 0x1f; in aty_var_to_crtc()
1016 FAIL_MAX("v_total too large", v_total, 0x7ff); in aty_var_to_crtc()
1018 c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? CRTC_CSYNC_EN : 0; in aty_var_to_crtc()
1029 crtc->vline_crnt_vline = 0; in aty_var_to_crtc()
1032 crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly << 8) | in aty_var_to_crtc()
1033 ((h_sync_strt & 0x100) << 4) | (h_sync_wid << 16) | in aty_var_to_crtc()
1050 if (par->lcd_table != 0) { in aty_var_to_crtc()
1100 while (--Index >= 0) { in aty_var_to_crtc()
1110 if ((horz_stretch_loop >= 0) && !BestRemainder) { in aty_var_to_crtc()
1111 int horz_stretch_ratio = 0, Accumulator = 0; in aty_var_to_crtc()
1116 while (--Index >= 0) { in aty_var_to_crtc()
1117 if (Accumulator > 0) in aty_var_to_crtc()
1128 break; /* Out of the do { ... } while (0) */ in aty_var_to_crtc()
1134 } while (0); in aty_var_to_crtc()
1149 crtc->vert_stretching = 0; in aty_var_to_crtc()
1166 return 0; in aty_var_to_crtc()
1179 h_total = crtc->h_tot_disp & 0x1ff; in aty_crtc_to_var()
1180 h_disp = (crtc->h_tot_disp >> 16) & 0xff; in aty_crtc_to_var()
1181 h_sync_strt = (crtc->h_sync_strt_wid & 0xff) | ((crtc->h_sync_strt_wid >> 4) & 0x100); in aty_crtc_to_var()
1182 h_sync_dly = (crtc->h_sync_strt_wid >> 8) & 0x7; in aty_crtc_to_var()
1183 h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x1f; in aty_crtc_to_var()
1184 h_sync_pol = (crtc->h_sync_strt_wid >> 21) & 0x1; in aty_crtc_to_var()
1185 v_total = crtc->v_tot_disp & 0x7ff; in aty_crtc_to_var()
1186 v_disp = (crtc->v_tot_disp >> 16) & 0x7ff; in aty_crtc_to_var()
1187 v_sync_strt = crtc->v_sync_strt_wid & 0x7ff; in aty_crtc_to_var()
1188 v_sync_wid = (crtc->v_sync_strt_wid >> 16) & 0x1f; in aty_crtc_to_var()
1189 v_sync_pol = (crtc->v_sync_strt_wid >> 21) & 0x1; in aty_crtc_to_var()
1190 c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0; in aty_crtc_to_var()
1204 sync = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) | in aty_crtc_to_var()
1205 (v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) | in aty_crtc_to_var()
1206 (c_sync ? FB_SYNC_COMP_HIGH_ACT : 0); in aty_crtc_to_var()
1211 var->red.offset = 0; in aty_crtc_to_var()
1213 var->green.offset = 0; in aty_crtc_to_var()
1215 var->blue.offset = 0; in aty_crtc_to_var()
1217 var->transp.offset = 0; in aty_crtc_to_var()
1218 var->transp.length = 0; in aty_crtc_to_var()
1226 var->blue.offset = 0; in aty_crtc_to_var()
1228 var->transp.offset = 0; in aty_crtc_to_var()
1229 var->transp.length = 0; in aty_crtc_to_var()
1237 var->blue.offset = 0; in aty_crtc_to_var()
1239 var->transp.offset = 0; in aty_crtc_to_var()
1240 var->transp.length = 0; in aty_crtc_to_var()
1248 var->blue.offset = 0; in aty_crtc_to_var()
1250 var->transp.offset = 0; in aty_crtc_to_var()
1251 var->transp.length = 0; in aty_crtc_to_var()
1259 var->blue.offset = 0; in aty_crtc_to_var()
1300 return 0; in aty_crtc_to_var()
1316 return 0; in atyfb_set_par()
1324 if (pixclock == 0) { in atyfb_set_par()
1356 pixclock_in_ps = 0; in atyfb_set_par()
1358 if (0 == pixclock_in_ps) { in atyfb_set_par()
1359 PRINTKE("ALERT ops->pll_to_var get 0\n"); in atyfb_set_par()
1363 memset(&debug, 0, sizeof(debug)); in atyfb_set_par()
1409 tmp = aty_ld_le32(MEM_CNTL, par) & 0xf0ffffff; in atyfb_set_par()
1412 tmp |= 0x02000000; in atyfb_set_par()
1415 tmp |= 0x03000000; in atyfb_set_par()
1418 tmp |= 0x06000000; in atyfb_set_par()
1423 tmp = aty_ld_le32(MEM_CNTL, par) & 0xf00fffff; in atyfb_set_par()
1429 tmp |= 0x00000000; in atyfb_set_par()
1432 tmp |= 0x04000000; in atyfb_set_par()
1435 tmp |= 0x08000000; in atyfb_set_par()
1439 aty_st_le32(DAC_CNTL, 0x87010184, par); in atyfb_set_par()
1440 aty_st_le32(BUS_CNTL, 0x680000f9, par); in atyfb_set_par()
1442 aty_st_le32(DAC_CNTL, 0x87010184, par); in atyfb_set_par()
1443 aty_st_le32(BUS_CNTL, 0x680000f9, par); in atyfb_set_par()
1445 aty_st_le32(DAC_CNTL, 0x80010102, par); in atyfb_set_par()
1446 aty_st_le32(BUS_CNTL, 0x7b33a040 | (par->aux_start ? BUS_APER_REG_DIS : 0), par); in atyfb_set_par()
1449 aty_st_le32(DAC_CNTL, 0x86010102, par); in atyfb_set_par()
1450 aty_st_le32(BUS_CNTL, 0x7b23a040 | (par->aux_start ? BUS_APER_REG_DIS : 0), par); in atyfb_set_par()
1451 aty_st_le32(EXT_MEM_CNTL, aty_ld_le32(EXT_MEM_CNTL, par) | 0x5000001, par); in atyfb_set_par()
1455 aty_st_8(DAC_MASK, 0xff, par); in atyfb_set_par()
1469 (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8, in atyfb_set_par()
1470 ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1, in atyfb_set_par()
1480 base = 0x2000; in atyfb_set_par()
1482 for (i = 0; i < 256; i = i+4) { in atyfb_set_par()
1483 if (i % 16 == 0) { in atyfb_set_par()
1485 printk("debug atyfb: 0x%04X: ", base + i); in atyfb_set_par()
1493 base = 0x00; in atyfb_set_par()
1495 for (i = 0; i < 64; i++) { in atyfb_set_par()
1496 if (i % 16 == 0) { in atyfb_set_par()
1498 printk("debug atyfb: 0x%02X: ", base + i); in atyfb_set_par()
1500 if (i % 4 == 0) in atyfb_set_par()
1508 if (par->lcd_table != 0) { in atyfb_set_par()
1510 base = 0x00; in atyfb_set_par()
1513 for (i = 0; i <= POWER_MANAGEMENT; i++) { in atyfb_set_par()
1516 pr_cont("\ndebug atyfb: 0x%04X: ", in atyfb_set_par()
1521 for (i = 0; i < 64; i++) { in atyfb_set_par()
1522 if (i % 4 == 0) in atyfb_set_par()
1523 pr_cont("\ndebug atyfb: 0x%02X: ", in atyfb_set_par()
1533 return 0; in atyfb_set_par()
1552 if (pixclock == 0) { in atyfb_check_var()
1566 info->var.accel_flags = 0; in atyfb_check_var()
1570 return 0; in atyfb_check_var()
1597 par->mmaped = 0; in atyfb_open()
1600 return 0; in atyfb_open()
1606 int handled = 0; in aty_irq()
1619 par->vblank.pan_display = 0; in aty_irq()
1635 if (!test_and_set_bit(0, &par->irq_flags)) { in aty_enable_irq()
1637 clear_bit(0, &par->irq_flags); in aty_enable_irq()
1660 return 0; in aty_enable_irq()
1667 if (test_and_clear_bit(0, &par->irq_flags)) { in aty_disable_irq()
1669 par->vblank.pan_display = 0; in aty_disable_irq()
1680 return 0; in aty_disable_irq()
1691 return 0; in atyfb_release()
1698 return 0; in atyfb_release()
1703 par->mmaped = 0; in atyfb_release()
1731 return 0; in atyfb_release()
1746 xres = (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8; in atyfb_pan_display()
1747 yres = ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1; in atyfb_pan_display()
1758 return 0; in atyfb_pan_display()
1761 if ((var->activate & FB_ACTIVATE_VBL) && !aty_enable_irq(par, 0)) { in atyfb_pan_display()
1764 par->vblank.pan_display = 0; in atyfb_pan_display()
1768 return 0; in atyfb_pan_display()
1778 case 0: in aty_waitforvblank()
1785 ret = aty_enable_irq(par, 0); in aty_waitforvblank()
1792 if (ret < 0) in aty_waitforvblank()
1794 if (ret == 0) { in aty_waitforvblank()
1799 return 0; in aty_waitforvblank()
1804 #define ATYIO_CLKR 0x41545900 /* ATY\00 */
1805 #define ATYIO_CLKW 0x41545901 /* ATY\01 */
1816 u32 dsp_xclks_per_row; /* 0-16383 */
1817 u32 dsp_loop_latency; /* 0-15 */
1818 u32 dsp_precision; /* 0-7 */
1819 u32 dsp_on; /* 0-2047 */
1820 u32 dsp_off; /* 0-2047 */
1823 #define ATYIO_FEATR 0x41545902 /* ATY\02 */
1824 #define ATYIO_FEATW 0x41545903 /* ATY\03 */
1862 struct atyclk clk = { 0 }; in atyfb_ioctl()
1874 clk.dsp_xclks_per_row = dsp_config & 0x3fff; in atyfb_ioctl()
1875 clk.dsp_loop_latency = (dsp_config >> 16) & 0xf; in atyfb_ioctl()
1877 clk.dsp_off = dsp_on_off & 0x7ff; in atyfb_ioctl()
1878 clk.dsp_on = (dsp_on_off >> 16) & 0x7ff; in atyfb_ioctl()
1900 pll->ct.dsp_config = (clk.dsp_xclks_per_row & 0x3fff) | in atyfb_ioctl()
1901 ((clk.dsp_loop_latency & 0xf) << 16) | in atyfb_ioctl()
1903 pll->ct.dsp_on_off = (clk.dsp_off & 0x7ff) | in atyfb_ioctl()
1904 ((clk.dsp_on & 0x7ff) << 16); in atyfb_ioctl()
1922 return 0; in atyfb_ioctl()
1931 return 0; in atyfb_sync()
1938 unsigned int size, page, map_size = 0; in atyfb_mmap()
1939 unsigned long map_offset = 0; in atyfb_mmap()
1946 if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) in atyfb_mmap()
1954 if (((vma->vm_pgoff == 0) && (size == info->fix.smem_len)) || in atyfb_mmap()
1956 off += 0x8000000000000000UL; in atyfb_mmap()
1961 for (page = 0; page < size;) { in atyfb_mmap()
1962 map_size = 0; in atyfb_mmap()
1963 for (i = 0; par->mmap_map[i].size; i++) { in atyfb_mmap()
1999 return 0; in atyfb_mmap()
2037 if ((--timeout) == 0) in aty_power_mgmt()
2056 if ((--timeout) == 0) in aty_power_mgmt()
2058 } while ((pm & PWR_MGT_STATUS_MASK) != 0); in aty_power_mgmt()
2062 return timeout ? 0 : -EIO; in aty_power_mgmt()
2073 return 0; in atyfb_pci_suspend_late()
2098 par->asleep = 0; in atyfb_pci_suspend_late()
2099 par->lock_blank = 0; in atyfb_pci_suspend_late()
2101 fb_set_suspend(info, 0); in atyfb_pci_suspend_late()
2111 return 0; in atyfb_pci_suspend_late()
2150 return 0; in atyfb_pci_resume()
2163 aty_power_mgmt(0, par); in atyfb_pci_resume()
2168 par->asleep = 0; in atyfb_pci_resume()
2174 fb_set_suspend(info, 0); in atyfb_pci_resume()
2177 par->lock_blank = 0; in atyfb_pci_resume()
2184 return 0; in atyfb_pci_resume()
2202 #define MAX_LEVEL 0xFF
2213 if (atylevel < 0) in aty_bl_get_level_brightness()
2214 atylevel = 0; in aty_bl_get_level_brightness()
2228 if (level > 0) { in aty_bl_update_status()
2233 reg |= (aty_bl_get_level_brightness(par, 0) << BIAS_MOD_LEVEL_SHIFT); in aty_bl_update_status()
2237 return 0; in aty_bl_update_status()
2258 memset(&props, 0, sizeof(struct backlight_properties)); in aty_bl_init()
2270 fb_bl_default_curve(info, 0, in aty_bl_init()
2271 0x3F * FB_BACKLIGHT_MAX / MAX_LEVEL, in aty_bl_init()
2272 0xFF * FB_BACKLIGHT_MAX / MAX_LEVEL); in aty_bl_init()
2316 for (i = 0; i < size; i++) { in aty_calc_mem_refresh()
2335 if (par->lcd_table != 0 && (aty_ld_lcd(LCD_GEN_CNTL, par) & LCD_ON)) { in atyfb_get_timings_from_lcd()
2349 ret = 0; in atyfb_get_timings_from_lcd()
2360 int gtb_memsize, has_var = 0; in aty_init()
2375 par->bus_type = (stat0 >> 0) & 0x07; in aty_init()
2376 par->ram_type = (stat0 >> 3) & 0x07; in aty_init()
2381 dac_type = (stat0 >> 9) & 0x07; in aty_init()
2382 if (dac_type == 0x07) in aty_init()
2385 dac_subtype = (aty_ld_8(SCRATCH_REG1 + 1, par) & 0xF0) | dac_type; in aty_init()
2431 par->ram_type = (aty_ld_le32(CNFG_STAT0, par) & 0x07); in aty_init()
2479 if (diff1 < 0) in aty_init()
2481 if (diff2 < 0) in aty_init()
2499 /* 0xF used instead of MEM_SIZE_ALIAS */ in aty_init()
2500 switch (par->mem_cntl & 0xF) { in aty_init()
2502 info->fix.smem_len = 0x80000; in aty_init()
2505 info->fix.smem_len = 0x100000; in aty_init()
2508 info->fix.smem_len = 0x200000; in aty_init()
2511 info->fix.smem_len = 0x400000; in aty_init()
2514 info->fix.smem_len = 0x600000; in aty_init()
2517 info->fix.smem_len = 0x800000; in aty_init()
2520 info->fix.smem_len = 0x80000; in aty_init()
2524 info->fix.smem_len = 0x80000; in aty_init()
2527 info->fix.smem_len = 0x100000; in aty_init()
2530 info->fix.smem_len = 0x200000; in aty_init()
2533 info->fix.smem_len = 0x400000; in aty_init()
2536 info->fix.smem_len = 0x600000; in aty_init()
2539 info->fix.smem_len = 0x800000; in aty_init()
2542 info->fix.smem_len = 0x80000; in aty_init()
2546 if (aty_ld_le32(CNFG_STAT1, par) & 0x40000000) in aty_init()
2547 info->fix.smem_len += 0x400000; in aty_init()
2552 par->mem_cntl &= ~(gtb_memsize ? 0xF : MEM_SIZE_ALIAS); in aty_init()
2553 if (info->fix.smem_len <= 0x80000) in aty_init()
2555 else if (info->fix.smem_len <= 0x100000) in aty_init()
2557 else if (info->fix.smem_len <= 0x200000) in aty_init()
2559 else if (info->fix.smem_len <= 0x400000) in aty_init()
2561 else if (info->fix.smem_len <= 0x600000) in aty_init()
2569 * Reg Block 0 (CT-compatible block) is at mmio_start in aty_init()
2570 * Reg Block 1 (multimedia extensions) is at mmio_start - 0x400 in aty_init()
2573 info->fix.mmio_len = 0x400; in aty_init()
2576 info->fix.mmio_len = 0x400; in aty_init()
2579 info->fix.mmio_start -= 0x400; in aty_init()
2580 info->fix.mmio_len = 0x800; in aty_init()
2583 info->fix.mmio_start -= 0x400; in aty_init()
2584 info->fix.mmio_len = 0x800; in aty_init()
2589 info->fix.smem_len == 0x80000 ? 512 : (info->fix.smem_len>>20), in aty_init()
2590 info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname, xtal, in aty_init()
2612 for (i = 0; i < 40; i++) in aty_init()
2660 memset(&var, 0, sizeof(var)); in aty_init()
2687 if (default_vmode <= 0 || default_vmode > VMODE_MAX) in aty_init()
2704 if (mode && fb_find_mode(&var, info, mode, NULL, 0, &defmode, 8)) in aty_init()
2741 ret = fb_alloc_cmap(&info->cmap, 256, 0); in aty_init()
2742 if (ret < 0) in aty_init()
2746 if (ret < 0) { in aty_init()
2761 return 0; in aty_init()
2782 vmembase = simple_strtoul(p, NULL, 0); in store_video_par()
2785 size = simple_strtoul(p, NULL, 0); in store_video_par()
2788 guiregbase = simple_strtoul(p, NULL, 0); in store_video_par()
2795 return 0; in store_video_par()
2798 phys_vmembase[m64_num] = 0; in store_video_par()
2813 return 0; in atyfb_blank()
2825 gen_cntl &= ~0x400004c; in atyfb_blank()
2830 gen_cntl |= 0x4000040; in atyfb_blank()
2833 gen_cntl |= 0x4000048; in atyfb_blank()
2836 gen_cntl |= 0x4000044; in atyfb_blank()
2839 gen_cntl |= 0x400004c; in atyfb_blank()
2853 return 0; in atyfb_blank()
2868 * entries in the var structure). Return != 0 for invalid regno.
2884 return 0; in atyfb_setcolreg()
2917 i = aty_ld_8(DAC_CNTL, par) & 0xfc; in atyfb_setcolreg()
2919 i |= 0x2; /* DAC_CNTL | 0x2 turns off the extra brightness for gt */ in atyfb_setcolreg()
2921 aty_st_8(DAC_MASK, 0xff, par); in atyfb_setcolreg()
2934 for (i = 0; i < 8; i++) in atyfb_setcolreg()
2940 return 0; in atyfb_setcolreg()
2958 par->ati_regbase = (void *)addr + 0x7ffc00UL; in atyfb_setup_sparc()
2959 info->fix.mmio_start = addr + 0x7ffc00UL; in atyfb_setup_sparc()
2964 info->screen_base = (char *) (addr + 0x800000UL); in atyfb_setup_sparc()
2965 info->fix.smem_start = addr + 0x800000UL; in atyfb_setup_sparc()
2971 for (i = 0; i < 6 && pdev->resource[i].start; i++) in atyfb_setup_sparc()
2981 for (i = 0, j = 2; i < 6 && pdev->resource[i].start; i++) { in atyfb_setup_sparc()
3005 par->mmap_map[j].voff = (pbase + 0x10000000) & PAGE_MASK; in atyfb_setup_sparc()
3018 par->mmap_map[j].voff = (pbase + 0x800000) & PAGE_MASK; in atyfb_setup_sparc()
3019 par->mmap_map[j].poff = (base + 0x800000) & PAGE_MASK; in atyfb_setup_sparc()
3020 par->mmap_map[j].size = 0x800000; in atyfb_setup_sparc()
3023 size -= 0x800000; in atyfb_setup_sparc()
3046 switch (mem & 0x0f) { in atyfb_setup_sparc()
3048 mem = (mem & ~(0x0f)) | 2; in atyfb_setup_sparc()
3051 mem = (mem & ~(0x0f)) | 3; in atyfb_setup_sparc()
3054 mem = (mem & ~(0x0f)) | 4; in atyfb_setup_sparc()
3057 mem = (mem & ~(0x0f)) | 5; in atyfb_setup_sparc()
3063 mem &= ~(0x00700000); in atyfb_setup_sparc()
3065 mem &= ~(0xcf80e000); /* Turn off all undocumented bits. */ in atyfb_setup_sparc()
3080 var->xoffset = var->yoffset = 0; in atyfb_setup_sparc()
3093 for (i = 0; i < 16; i++) in atyfb_setup_sparc()
3136 return 0; in atyfb_setup_sparc()
3156 /* Address of driver information table is at offset 0x78. */ in aty_init_lcd()
3157 driv_inf_tab = bios_base + *((u16 *)(bios_base+0x78)); in aty_init_lcd()
3161 if ((sig == 0x54504c24) || /* Rage LT pro */ in aty_init_lcd()
3162 (sig == 0x544d5224) || /* Rage mobility */ in aty_init_lcd()
3163 (sig == 0x54435824) || /* Rage XC */ in aty_init_lcd()
3164 (sig == 0x544c5824)) { /* Rage XL */ in aty_init_lcd()
3167 par->lcd_table = 0; in aty_init_lcd()
3168 if (lcd_ofs != 0) in aty_init_lcd()
3172 if (par->lcd_table != 0) { in aty_init_lcd()
3207 case 0: in aty_init_lcd()
3226 if (tech == 0 || tech == 2) { in aty_init_lcd()
3228 case 0: in aty_init_lcd()
3242 case 0: in aty_init_lcd()
3268 refresh_rates_buf[0] = 0; in aty_init_lcd()
3271 f = 0; in aty_init_lcd()
3272 for (i = 0; i < 16; i++) { in aty_init_lcd()
3274 if (f == 0) { in aty_init_lcd()
3286 default_refresh_rate = (*(u8 *)(par->lcd_table+61) & 0xf0) >> 4; in aty_init_lcd()
3303 while (*lcdmodeptr != 0) { in aty_init_lcd()
3308 mwidth = *((u16 *)(modeptr+0)); in aty_init_lcd()
3342 if (*lcdmodeptr == 0) { in aty_init_lcd()
3378 rom_addr = 0xc0000 + ((aty_ld_le32(SCRATCH_REG1, par) & 0x7f) << 11); in init_from_bios()
3379 bios_base = (unsigned long)ioremap(rom_addr, 0x10000); in init_from_bios()
3381 /* The BIOS starts with 0xaa55. */ in init_from_bios()
3382 if (*((u16 *)bios_base) == 0xaa55) { in init_from_bios()
3392 rom_table_offset = (u16)(bios_ptr[0x48] | (bios_ptr[0x49] << 8)); in init_from_bios()
3415 ret = 0; in init_from_bios()
3433 int ret = 0; in atyfb_setup_generic()
3435 raddr = addr + 0x7ff000UL; in atyfb_setup_generic()
3451 par->ati_regbase = ioremap_uc(info->fix.mmio_start, 0x1000); in atyfb_setup_generic()
3453 par->ati_regbase = ioremap(info->fix.mmio_start, 0x1000); in atyfb_setup_generic()
3458 info->fix.mmio_start += par->aux_start ? 0x400 : 0xc00; in atyfb_setup_generic()
3459 par->ati_regbase += par->aux_start ? 0x400 : 0xc00; in atyfb_setup_generic()
3472 addr += 0x800000; in atyfb_setup_generic()
3489 info->fix.smem_len = 0x800000; in atyfb_setup_generic()
3511 return 0; in atyfb_setup_generic()
3545 rp = &pdev->resource[0]; in atyfb_pci_probe()
3593 par->mmap_map[0].voff = 0x8000000000000000UL; in atyfb_pci_probe()
3594 par->mmap_map[0].poff = (unsigned long) info->screen_base & PAGE_MASK; in atyfb_pci_probe()
3595 par->mmap_map[0].size = info->fix.smem_len; in atyfb_pci_probe()
3596 par->mmap_map[0].prot_mask = _PAGE_CACHE; in atyfb_pci_probe()
3597 par->mmap_map[0].prot_flag = _PAGE_E; in atyfb_pci_probe()
3598 par->mmap_map[1].voff = par->mmap_map[0].voff + info->fix.smem_len; in atyfb_pci_probe()
3610 return 0; in atyfb_pci_probe()
3641 int num_found = 0; in atyfb_atari_probe()
3643 for (m64_num = 0; m64_num < mach64_count; m64_num++) { in atyfb_atari_probe()
3668 par->ati_regbase = ioremap(phys_guiregbase[m64_num], 0x10000) + in atyfb_atari_probe()
3669 0xFC00ul; in atyfb_atari_probe()
3672 aty_st_le32(CLOCK_CNTL, 0x12345678, par); in atyfb_atari_probe()
3675 switch (clock_r & 0x003F) { in atyfb_atari_probe()
3676 case 0x12: in atyfb_atari_probe()
3679 case 0x34: in atyfb_atari_probe()
3682 case 0x16: in atyfb_atari_probe()
3685 case 0x38: in atyfb_atari_probe()
3686 par->clk_wr_offset = 0; /* Panther 1 ISA Adapter (Gerald) */ in atyfb_atari_probe()
3692 case 0x00d7: in atyfb_atari_probe()
3695 case 0x0057: in atyfb_atari_probe()
3711 return num_found ? 0 : -ENXIO; in atyfb_atari_probe()
3842 return 0; in atyfb_setup()
3850 vram = simple_strtoul(this_opt + 5, NULL, 0); in atyfb_setup()
3852 pll = simple_strtoul(this_opt + 4, NULL, 0); in atyfb_setup()
3854 mclk = simple_strtoul(this_opt + 5, NULL, 0); in atyfb_setup()
3856 xclk = simple_strtoul(this_opt+5, NULL, 0); in atyfb_setup()
3858 comp_sync = simple_strtoul(this_opt+10, NULL, 0); in atyfb_setup()
3860 backlight = simple_strtoul(this_opt+10, NULL, 0); in atyfb_setup()
3864 simple_strtoul(this_opt + 6, NULL, 0); in atyfb_setup()
3865 if (vmode > 0 && vmode <= VMODE_MAX) in atyfb_setup()
3869 simple_strtoul(this_opt + 6, NULL, 0); in atyfb_setup()
3871 case 0: in atyfb_setup()
3905 return 0; in atyfb_setup()
3990 return 0; in atyfb_init()
4008 module_param(noaccel, bool, 0);
4010 module_param(vram, int, 0);
4012 module_param(pll, int, 0);
4014 module_param(mclk, int, 0);
4016 module_param(xclk, int, 0);
4018 module_param(comp_sync, int, 0);
4019 MODULE_PARM_DESC(comp_sync, "Set composite sync signal to low (0) or high (1)");
4020 module_param(mode, charp, 0);
4022 module_param(nomtrr, bool, 0);