Lines Matching refs:musb_writel
110 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp); in tusb_wbus_quirk()
113 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); in tusb_wbus_quirk()
120 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp); in tusb_wbus_quirk()
122 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); in tusb_wbus_quirk()
191 musb_writel(fifo, 0, val); in tusb_fifo_write_unaligned()
200 musb_writel(fifo, 0, val); in tusb_fifo_write_unaligned()
238 musb_writel(ep_conf, TUSB_EP_TX_OFFSET, in tusb_write_fifo()
241 musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_DIR_TX | in tusb_write_fifo()
264 musb_writel(fifo, 0, val); in tusb_write_fifo()
286 musb_writel(ep_conf, TUSB_EP_RX_OFFSET, in tusb_read_fifo()
289 musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_XFR_SIZE(len)); in tusb_read_fifo()
357 musb_writel(tbase, TUSB_PRCM_MNGMT, reg); in tusb_draw_power()
383 musb_writel(tbase, TUSB_PRCM_CONF, reg); in tusb_set_clock_source()
406 musb_writel(tbase, TUSB_PRCM_WAKEUP_MASK, ~wakeup_enables); in tusb_allow_idle()
423 musb_writel(tbase, TUSB_PRCM_MNGMT, reg); in tusb_allow_idle()
447 musb_writel(tbase, TUSB_PRCM_MNGMT, tmp); in tusb_musb_vbus_status()
449 musb_writel(tbase, TUSB_PRCM_MNGMT, prcm_mngmt); in tusb_musb_vbus_status()
614 musb_writel(tbase, TUSB_PRCM_MNGMT, prcm); in tusb_musb_set_vbus()
615 musb_writel(tbase, TUSB_DEV_OTG_TIMER, timer); in tusb_musb_set_vbus()
616 musb_writel(tbase, TUSB_DEV_CONF, conf); in tusb_musb_set_vbus()
667 musb_writel(tbase, TUSB_PHY_OTG_CTRL, in tusb_musb_set_mode()
669 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, in tusb_musb_set_mode()
671 musb_writel(tbase, TUSB_DEV_CONF, dev_conf); in tusb_musb_set_mode()
835 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS); in tusb_musb_interrupt()
854 musb_writel(tbase, TUSB_SCRATCH_PAD, 0); in tusb_musb_interrupt()
855 musb_writel(tbase, TUSB_SCRATCH_PAD, i); in tusb_musb_interrupt()
866 musb_writel(tbase, TUSB_PRCM_WAKEUP_CLEAR, reg); in tusb_musb_interrupt()
894 musb_writel(tbase, TUSB_DMA_INT_CLEAR, dma_src); in tusb_musb_interrupt()
901 musb_writel(tbase, TUSB_USBIP_INT_CLEAR, musb_src); in tusb_musb_interrupt()
913 musb_writel(tbase, TUSB_INT_SRC_CLEAR, in tusb_musb_interrupt()
918 musb_writel(tbase, TUSB_INT_MASK, int_mask); in tusb_musb_interrupt()
937 musb_writel(tbase, TUSB_INT_MASK, TUSB_INT_SRC_USB_IP_SOF); in tusb_musb_enable()
940 musb_writel(tbase, TUSB_USBIP_INT_MASK, 0); in tusb_musb_enable()
941 musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff); in tusb_musb_enable()
942 musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff); in tusb_musb_enable()
945 musb_writel(tbase, TUSB_USBIP_INT_CLEAR, 0x7fffffff); in tusb_musb_enable()
946 musb_writel(tbase, TUSB_DMA_INT_CLEAR, 0x7fffffff); in tusb_musb_enable()
947 musb_writel(tbase, TUSB_GPIO_INT_CLEAR, 0x1ff); in tusb_musb_enable()
950 musb_writel(tbase, TUSB_INT_SRC_CLEAR, ~TUSB_INT_MASK_RESERVED_BITS); in tusb_musb_enable()
954 musb_writel(tbase, TUSB_INT_CTRL_CONF, in tusb_musb_enable()
962 musb_writel(tbase, TUSB_INT_SRC_SET, in tusb_musb_enable()
982 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS); in tusb_musb_disable()
983 musb_writel(tbase, TUSB_USBIP_INT_MASK, 0x7fffffff); in tusb_musb_disable()
984 musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff); in tusb_musb_disable()
985 musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff); in tusb_musb_disable()
1008 musb_writel(tbase, TUSB_PULLUP_1_CTRL, 0x0000003F); in tusb_setup_cpu_interface()
1011 musb_writel(tbase, TUSB_PULLUP_2_CTRL, 0x01FFFFFF); in tusb_setup_cpu_interface()
1014 musb_writel(tbase, TUSB_GPIO_CONF, TUSB_GPIO_CONF_DMAREQ(0x3f)); in tusb_setup_cpu_interface()
1018 musb_writel(tbase, TUSB_DMA_REQ_CONF, in tusb_setup_cpu_interface()
1024 musb_writel(tbase, TUSB_WAIT_COUNT, 1); in tusb_setup_cpu_interface()
1068 musb_writel(tbase, TUSB_VLYNQ_CTRL, 8); in tusb_musb_start()
1076 musb_writel(tbase, TUSB_PRCM_MNGMT, in tusb_musb_start()
1087 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, reg); in tusb_musb_start()
1091 musb_writel(tbase, TUSB_PHY_OTG_CTRL, reg); in tusb_musb_start()