907 	u16			rx_csr, tx_csr;  in musb_bulk_nak_timeout()  local
931 		tx_csr = musb_readw(epio, MUSB_TXCSR);  in musb_bulk_nak_timeout()
932 		tx_csr |= MUSB_TXCSR_H_WZC_BITS;  in musb_bulk_nak_timeout()
933 		tx_csr &= ~MUSB_TXCSR_H_NAKTIMEOUT;  in musb_bulk_nak_timeout()
934 		musb_writew(epio, MUSB_TXCSR, tx_csr);  in musb_bulk_nak_timeout()
1199 	u16			tx_csr;  in musb_host_tx()  local
1212 	tx_csr = musb_readw(epio, MUSB_TXCSR);  in musb_host_tx()
1216 		musb_dbg(musb, "extra TX%d ready, csr %04x", epnum, tx_csr);  in musb_host_tx()
1223 	musb_dbg(musb, "OUT/TX%d end, csr %04x%s", epnum, tx_csr,  in musb_host_tx()
1227 	if (tx_csr & MUSB_TXCSR_H_RXSTALL) {  in musb_host_tx()
1234 	} else if (tx_csr & MUSB_TXCSR_H_ERROR) {  in musb_host_tx()
1240 	} else if (tx_csr & MUSB_TXCSR_H_NAKTIMEOUT) {  in musb_host_tx()
1274 		tx_csr &= ~(MUSB_TXCSR_AUTOSET  in musb_host_tx()
1282 		musb_writew(epio, MUSB_TXCSR, tx_csr);  in musb_host_tx()
1284 		musb_writew(epio, MUSB_TXCSR, tx_csr);  in musb_host_tx()
1292 		musb_dbg(musb, "extra TX%d ready, csr %04x", epnum, tx_csr);  in musb_host_tx()
1305 		if (tx_csr & MUSB_TXCSR_DMAMODE) {  in musb_host_tx()
1322 			tx_csr &= musb_readw(epio, MUSB_TXCSR);  in musb_host_tx()
1323 			if (tx_csr & MUSB_TXCSR_TXPKTRDY) {  in musb_host_tx()
1324 				tx_csr &= ~(MUSB_TXCSR_DMAENAB |  in musb_host_tx()
1327 					    tx_csr | MUSB_TXCSR_H_WZC_BITS);  in musb_host_tx()
1329 			tx_csr &= ~(MUSB_TXCSR_DMAMODE |  in musb_host_tx()
1332 				    tx_csr | MUSB_TXCSR_H_WZC_BITS);  in musb_host_tx()
1340 			tx_csr = musb_readw(epio, MUSB_TXCSR);  in musb_host_tx()
1350 		if (tx_csr & (MUSB_TXCSR_FIFONOTEMPTY | MUSB_TXCSR_TXPKTRDY)) {  in musb_host_tx()
1353 				tx_csr);  in musb_host_tx()
1418 	} else	if (tx_csr & MUSB_TXCSR_DMAENAB) {  in musb_host_tx()