Lines Matching +full:settle +full:- +full:delay +full:- +full:usec
1 // SPDX-License-Identifier: GPL-2.0
20 #include <linux/dma-mapping.h>
23 #include "xhci-trace.h"
24 #include "xhci-debugfs.h"
25 #include "xhci-dbgcap.h"
43 struct xhci_segment *seg = ring->first_seg; in td_on_ring()
45 if (!td || !td->start_seg) in td_on_ring()
48 if (seg == td->start_seg) in td_on_ring()
50 seg = seg->next; in td_on_ring()
51 } while (seg && seg != ring->first_seg); in td_on_ring()
57 * xhci_handshake - spin reading hc until handshake completes or fails
61 * @usec: timeout in microseconds
66 * handshake done). There are two failure modes: "usec" have passed (major
67 * hardware flakeout), or the register reads as all-ones (hardware removed).
79 return -ENODEV; in xhci_handshake()
85 * xhci_handshake_check_state - same as xhci_handshake but takes an additional
90 u32 mask, u32 done, int usec, unsigned int exit_state) in xhci_handshake_check_state() argument
98 xhci->xhc_state & exit_state, in xhci_handshake_check_state()
99 1, usec); in xhci_handshake_check_state()
101 if (result == U32_MAX || xhci->xhc_state & exit_state) in xhci_handshake_check_state()
102 return -ENODEV; in xhci_handshake_check_state()
117 halted = readl(&xhci->op_regs->status) & STS_HALT; in xhci_quiesce()
121 cmd = readl(&xhci->op_regs->command); in xhci_quiesce()
123 writel(cmd, &xhci->op_regs->command); in xhci_quiesce()
141 ret = xhci_handshake(&xhci->op_regs->status, in xhci_halt()
148 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_halt()
149 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_halt()
162 temp = readl(&xhci->op_regs->command); in xhci_start()
166 writel(temp, &xhci->op_regs->command); in xhci_start()
172 ret = xhci_handshake(&xhci->op_regs->status, in xhci_start()
174 if (ret == -ETIMEDOUT) in xhci_start()
180 xhci->xhc_state = 0; in xhci_start()
181 xhci->run_graceperiod = jiffies + msecs_to_jiffies(500); in xhci_start()
200 state = readl(&xhci->op_regs->status); in xhci_reset()
204 return -ENODEV; in xhci_reset()
213 command = readl(&xhci->op_regs->command); in xhci_reset()
215 writel(command, &xhci->op_regs->command); in xhci_reset()
217 /* Existing Intel xHCI controllers require a delay of 1 mS, in xhci_reset()
221 * Without this delay, the subsequent HC register access, in xhci_reset()
224 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_reset()
227 ret = xhci_handshake_check_state(xhci, &xhci->op_regs->command, in xhci_reset()
232 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_reset()
233 usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci)->self.controller)); in xhci_reset()
241 ret = xhci_handshake(&xhci->op_regs->status, STS_CNR, 0, timeout_us); in xhci_reset()
243 xhci->usb2_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
244 xhci->usb2_rhub.bus_state.suspended_ports = 0; in xhci_reset()
245 xhci->usb2_rhub.bus_state.resuming_ports = 0; in xhci_reset()
246 xhci->usb3_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
247 xhci->usb3_rhub.bus_state.suspended_ports = 0; in xhci_reset()
248 xhci->usb3_rhub.bus_state.resuming_ports = 0; in xhci_reset()
255 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_zero_64b_regs()
276 if (!(xhci->quirks & XHCI_ZERO_64B_REGS) || !domain || in xhci_zero_64b_regs()
277 domain->type == IOMMU_DOMAIN_IDENTITY) in xhci_zero_64b_regs()
283 val = readl(&xhci->op_regs->command); in xhci_zero_64b_regs()
285 writel(val, &xhci->op_regs->command); in xhci_zero_64b_regs()
288 val = readl(&xhci->op_regs->status); in xhci_zero_64b_regs()
290 writel(val, &xhci->op_regs->status); in xhci_zero_64b_regs()
293 val = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
295 xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
296 val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
298 xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
300 intrs = min_t(u32, HCS_MAX_INTRS(xhci->hcs_params1), in xhci_zero_64b_regs()
301 ARRAY_SIZE(xhci->run_regs->ir_set)); in xhci_zero_64b_regs()
306 ir = &xhci->run_regs->ir_set[i]; in xhci_zero_64b_regs()
307 val = xhci_read_64(xhci, &ir->erst_base); in xhci_zero_64b_regs()
309 xhci_write_64(xhci, 0, &ir->erst_base); in xhci_zero_64b_regs()
310 val= xhci_read_64(xhci, &ir->erst_dequeue); in xhci_zero_64b_regs()
312 xhci_write_64(xhci, 0, &ir->erst_dequeue); in xhci_zero_64b_regs()
316 err = xhci_handshake(&xhci->op_regs->status, in xhci_zero_64b_regs()
327 if (!ir || !ir->ir_set) in xhci_enable_interrupter()
328 return -EINVAL; in xhci_enable_interrupter()
330 iman = readl(&ir->ir_set->irq_pending); in xhci_enable_interrupter()
331 writel(ER_IRQ_ENABLE(iman), &ir->ir_set->irq_pending); in xhci_enable_interrupter()
340 if (!ir || !ir->ir_set) in xhci_disable_interrupter()
341 return -EINVAL; in xhci_disable_interrupter()
343 iman = readl(&ir->ir_set->irq_pending); in xhci_disable_interrupter()
344 writel(ER_IRQ_DISABLE(iman), &ir->ir_set->irq_pending); in xhci_disable_interrupter()
355 if (!ir || !ir->ir_set || imod_interval > U16_MAX * 250) in xhci_set_interrupter_moderation()
356 return -EINVAL; in xhci_set_interrupter_moderation()
358 imod = readl(&ir->ir_set->irq_control); in xhci_set_interrupter_moderation()
361 writel(imod, &ir->ir_set->irq_control); in xhci_set_interrupter_moderation()
375 rhub = &xhci->usb3_rhub; in compliance_mode_recovery()
376 hcd = rhub->hcd; in compliance_mode_recovery()
381 for (i = 0; i < rhub->num_ports; i++) { in compliance_mode_recovery()
382 temp = readl(rhub->ports[i]->addr); in compliance_mode_recovery()
389 "Compliance mode detected->port %d", in compliance_mode_recovery()
394 if (hcd->state == HC_STATE_SUSPENDED) in compliance_mode_recovery()
401 if (xhci->port_status_u0 != ((1 << rhub->num_ports) - 1)) in compliance_mode_recovery()
402 mod_timer(&xhci->comp_mode_recovery_timer, in compliance_mode_recovery()
407 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
418 xhci->port_status_u0 = 0; in compliance_mode_recovery_timer_init()
419 timer_setup(&xhci->comp_mode_recovery_timer, compliance_mode_recovery, in compliance_mode_recovery_timer_init()
421 xhci->comp_mode_recovery_timer.expires = jiffies + in compliance_mode_recovery_timer_init()
424 add_timer(&xhci->comp_mode_recovery_timer); in compliance_mode_recovery_timer_init()
431 * USB3.0 re-driver and that need the Compliance Mode Quirk.
433 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
444 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard"))) in xhci_compliance_mode_recovery_timer_quirk_check()
458 return (xhci->port_status_u0 == ((1 << xhci->usb3_rhub.num_ports) - 1)); in xhci_all_ports_seen_u0()
463 * Initialize memory for HCD and xHC (one-time init).
475 spin_lock_init(&xhci->lock); in xhci_init()
476 if (xhci->hci_version == 0x95 && link_quirk) { in xhci_init()
479 xhci->quirks |= XHCI_LINK_TRB_QUIRK; in xhci_init()
489 xhci->quirks |= XHCI_COMP_MODE_QUIRK; in xhci_init()
496 /*-------------------------------------------------------------------------*/
500 struct xhci_interrupter *ir = xhci->interrupters[0]; in xhci_run_finished()
508 spin_lock_irqsave(&xhci->lock, flags); in xhci_run_finished()
511 temp = readl(&xhci->op_regs->command); in xhci_run_finished()
513 writel(temp, &xhci->op_regs->command); in xhci_run_finished()
520 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_run_finished()
521 return -ENODEV; in xhci_run_finished()
524 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING; in xhci_run_finished()
526 if (xhci->quirks & XHCI_NEC_HOST) in xhci_run_finished()
529 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_run_finished()
544 * Setup MSI-X vectors and enable interrupts.
551 struct xhci_interrupter *ir = xhci->interrupters[0]; in xhci_run()
556 hcd->uses_new_polling = 1; in xhci_run()
557 if (hcd->msi_enabled) in xhci_run()
558 ir->ip_autoclear = true; in xhci_run()
565 temp_64 = xhci_read_64(xhci, &ir->ir_set->erst_dequeue); in xhci_run()
570 xhci_set_interrupter_moderation(ir, xhci->imod_interval); in xhci_run()
572 if (xhci->quirks & XHCI_NEC_HOST) { in xhci_run()
577 return -ENOMEM; in xhci_run()
594 set_bit(HCD_FLAG_DEFER_RH_REGISTER, &hcd->flags); in xhci_run()
613 struct xhci_interrupter *ir = xhci->interrupters[0]; in xhci_stop()
615 mutex_lock(&xhci->mutex); in xhci_stop()
619 mutex_unlock(&xhci->mutex); in xhci_stop()
625 spin_lock_irq(&xhci->lock); in xhci_stop()
626 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_stop()
627 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_stop()
630 spin_unlock_irq(&xhci->lock); in xhci_stop()
633 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_stop()
635 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_stop()
641 if (xhci->quirks & XHCI_AMD_PLL_FIX) in xhci_stop()
646 temp = readl(&xhci->op_regs->status); in xhci_stop()
647 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_stop()
654 "xhci_stop completed - status = %x", in xhci_stop()
655 readl(&xhci->op_regs->status)); in xhci_stop()
656 mutex_unlock(&xhci->mutex); in xhci_stop()
661 * Shutdown HC (not bus-specific)
673 if (xhci->quirks & XHCI_SPURIOUS_REBOOT) in xhci_shutdown()
674 usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev)); in xhci_shutdown()
678 __func__, hcd->self.busnum); in xhci_shutdown()
679 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_shutdown()
680 del_timer_sync(&hcd->rh_timer); in xhci_shutdown()
682 if (xhci->shared_hcd) { in xhci_shutdown()
683 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_shutdown()
684 del_timer_sync(&xhci->shared_hcd->rh_timer); in xhci_shutdown()
687 spin_lock_irq(&xhci->lock); in xhci_shutdown()
692 * firmware delay in ADL-P PCH if port are left in U3 at shutdown in xhci_shutdown()
694 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP || in xhci_shutdown()
695 xhci->quirks & XHCI_RESET_TO_DEFAULT) in xhci_shutdown()
698 spin_unlock_irq(&xhci->lock); in xhci_shutdown()
701 "xhci_shutdown completed - status = %x", in xhci_shutdown()
702 readl(&xhci->op_regs->status)); in xhci_shutdown()
712 xhci->s3.command = readl(&xhci->op_regs->command); in xhci_save_registers()
713 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification); in xhci_save_registers()
714 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_save_registers()
715 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg); in xhci_save_registers()
719 for (i = 0; i < xhci->max_interrupters; i++) { in xhci_save_registers()
720 ir = xhci->interrupters[i]; in xhci_save_registers()
724 ir->s3_erst_size = readl(&ir->ir_set->erst_size); in xhci_save_registers()
725 ir->s3_erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); in xhci_save_registers()
726 ir->s3_erst_dequeue = xhci_read_64(xhci, &ir->ir_set->erst_dequeue); in xhci_save_registers()
727 ir->s3_irq_pending = readl(&ir->ir_set->irq_pending); in xhci_save_registers()
728 ir->s3_irq_control = readl(&ir->ir_set->irq_control); in xhci_save_registers()
737 writel(xhci->s3.command, &xhci->op_regs->command); in xhci_restore_registers()
738 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification); in xhci_restore_registers()
739 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); in xhci_restore_registers()
740 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); in xhci_restore_registers()
743 for (i = 0; i < xhci->max_interrupters; i++) { in xhci_restore_registers()
744 ir = xhci->interrupters[i]; in xhci_restore_registers()
748 writel(ir->s3_erst_size, &ir->ir_set->erst_size); in xhci_restore_registers()
749 xhci_write_64(xhci, ir->s3_erst_base, &ir->ir_set->erst_base); in xhci_restore_registers()
750 xhci_write_64(xhci, ir->s3_erst_dequeue, &ir->ir_set->erst_dequeue); in xhci_restore_registers()
751 writel(ir->s3_irq_pending, &ir->ir_set->irq_pending); in xhci_restore_registers()
752 writel(ir->s3_irq_control, &ir->ir_set->irq_control); in xhci_restore_registers()
761 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
763 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, in xhci_set_cmd_ring_deq()
764 xhci->cmd_ring->dequeue) & in xhci_set_cmd_ring_deq()
766 xhci->cmd_ring->cycle_state; in xhci_set_cmd_ring_deq()
770 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
777 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
780 * middle of the ring (TRBs are 16-byte aligned).
787 ring = xhci->cmd_ring; in xhci_clear_command_ring()
788 seg = ring->deq_seg; in xhci_clear_command_ring()
790 memset(seg->trbs, 0, in xhci_clear_command_ring()
791 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1)); in xhci_clear_command_ring()
792 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &= in xhci_clear_command_ring()
794 seg = seg->next; in xhci_clear_command_ring()
795 } while (seg != ring->deq_seg); in xhci_clear_command_ring()
800 * Yes, this will need to be re-written after resume, but we're paranoid in xhci_clear_command_ring()
825 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_hub_port_wake()
827 for (i = 0; i < rhub->num_ports; i++) { in xhci_disable_hub_port_wake()
828 portsc = readl(rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
841 writel(t2, rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
842 xhci_dbg(xhci, "config port %d-%d wake bits, portsc: 0x%x, write: 0x%x\n", in xhci_disable_hub_port_wake()
843 rhub->hcd->self.busnum, i + 1, portsc, t2); in xhci_disable_hub_port_wake()
846 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_hub_port_wake()
856 status = readl(&xhci->op_regs->status); in xhci_pending_portevent()
865 port_index = xhci->usb2_rhub.num_ports; in xhci_pending_portevent()
866 ports = xhci->usb2_rhub.ports; in xhci_pending_portevent()
867 while (port_index--) { in xhci_pending_portevent()
868 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
873 port_index = xhci->usb3_rhub.num_ports; in xhci_pending_portevent()
874 ports = xhci->usb3_rhub.ports; in xhci_pending_portevent()
875 while (port_index--) { in xhci_pending_portevent()
876 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
885 * Stop HC (not bus-specific)
893 unsigned int delay = XHCI_MAX_HALT_USEC * 2; in xhci_suspend() local
898 if (!hcd->state) in xhci_suspend()
901 if (hcd->state != HC_STATE_SUSPENDED || in xhci_suspend()
902 (xhci->shared_hcd && xhci->shared_hcd->state != HC_STATE_SUSPENDED)) in xhci_suspend()
903 return -EINVAL; in xhci_suspend()
906 xhci_disable_hub_port_wake(xhci, &xhci->usb3_rhub, do_wakeup); in xhci_suspend()
907 xhci_disable_hub_port_wake(xhci, &xhci->usb2_rhub, do_wakeup); in xhci_suspend()
916 __func__, hcd->self.busnum); in xhci_suspend()
917 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_suspend()
918 del_timer_sync(&hcd->rh_timer); in xhci_suspend()
919 if (xhci->shared_hcd) { in xhci_suspend()
920 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_suspend()
921 del_timer_sync(&xhci->shared_hcd->rh_timer); in xhci_suspend()
924 if (xhci->quirks & XHCI_SUSPEND_DELAY) in xhci_suspend()
927 spin_lock_irq(&xhci->lock); in xhci_suspend()
928 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_suspend()
929 if (xhci->shared_hcd) in xhci_suspend()
930 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_suspend()
935 command = readl(&xhci->op_regs->command); in xhci_suspend()
937 writel(command, &xhci->op_regs->command); in xhci_suspend()
939 /* Some chips from Fresco Logic need an extraordinary delay */ in xhci_suspend()
940 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1; in xhci_suspend()
942 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
943 STS_HALT, STS_HALT, delay)) { in xhci_suspend()
945 spin_unlock_irq(&xhci->lock); in xhci_suspend()
946 return -ETIMEDOUT; in xhci_suspend()
954 command = readl(&xhci->op_regs->command); in xhci_suspend()
956 writel(command, &xhci->op_regs->command); in xhci_suspend()
957 xhci->broken_suspend = 0; in xhci_suspend()
958 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
969 res = readl(&xhci->op_regs->status); in xhci_suspend()
970 if ((xhci->quirks & XHCI_SNPS_BROKEN_SUSPEND) && in xhci_suspend()
973 xhci->broken_suspend = 1; in xhci_suspend()
976 spin_unlock_irq(&xhci->lock); in xhci_suspend()
977 return -ETIMEDOUT; in xhci_suspend()
980 spin_unlock_irq(&xhci->lock); in xhci_suspend()
986 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_suspend()
988 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_suspend()
999 * start xHC (not bus-specific)
1015 if (!hcd->state) in xhci_resume()
1018 /* Wait a bit if either of the roothubs need to settle from the in xhci_resume()
1022 if (time_before(jiffies, xhci->usb2_rhub.bus_state.next_statechange) || in xhci_resume()
1023 time_before(jiffies, xhci->usb3_rhub.bus_state.next_statechange)) in xhci_resume()
1026 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_resume()
1027 if (xhci->shared_hcd) in xhci_resume()
1028 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_resume()
1030 spin_lock_irq(&xhci->lock); in xhci_resume()
1032 if (hibernated || xhci->quirks & XHCI_RESET_ON_RESUME || xhci->broken_suspend) in xhci_resume()
1040 retval = xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1045 spin_unlock_irq(&xhci->lock); in xhci_resume()
1054 command = readl(&xhci->op_regs->command); in xhci_resume()
1056 writel(command, &xhci->op_regs->command); in xhci_resume()
1062 if (xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1065 spin_unlock_irq(&xhci->lock); in xhci_resume()
1066 return -ETIMEDOUT; in xhci_resume()
1070 temp = readl(&xhci->op_regs->status); in xhci_resume()
1072 /* re-initialize the HC on Restore Error, or Host Controller Error */ in xhci_resume()
1074 !(xhci->xhc_state & XHCI_STATE_REMOVING)) { in xhci_resume()
1076 if (!xhci->broken_suspend) in xhci_resume()
1081 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_resume()
1083 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_resume()
1089 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub); in xhci_resume()
1090 if (xhci->shared_hcd) in xhci_resume()
1091 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub); in xhci_resume()
1097 spin_unlock_irq(&xhci->lock); in xhci_resume()
1102 temp = readl(&xhci->op_regs->status); in xhci_resume()
1103 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_resume()
1104 xhci_disable_interrupter(xhci->interrupters[0]); in xhci_resume()
1109 xhci_dbg(xhci, "xhci_stop completed - status = %x\n", in xhci_resume()
1110 readl(&xhci->op_regs->status)); in xhci_resume()
1124 if (!retval && xhci->shared_hcd) { in xhci_resume()
1126 retval = xhci_run(xhci->shared_hcd); in xhci_resume()
1134 hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1136 if (xhci->shared_hcd) { in xhci_resume()
1137 xhci->shared_hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1138 usb_hcd_resume_root_hub(xhci->shared_hcd); in xhci_resume()
1146 command = readl(&xhci->op_regs->command); in xhci_resume()
1148 writel(command, &xhci->op_regs->command); in xhci_resume()
1149 xhci_handshake(&xhci->op_regs->status, STS_HALT, in xhci_resume()
1161 spin_unlock_irq(&xhci->lock); in xhci_resume()
1168 * USB 3 devices resend U3 LFPS wake after a 100ms delay if in xhci_resume()
1172 if (xhci->usb3_rhub.bus_state.suspended_ports || in xhci_resume()
1173 xhci->usb3_rhub.bus_state.bus_suspended) in xhci_resume()
1185 if (xhci->shared_hcd) in xhci_resume()
1186 usb_hcd_resume_root_hub(xhci->shared_hcd); in xhci_resume()
1193 * be re-initialized Always after a system resume. Ports are subject in xhci_resume()
1197 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running) in xhci_resume()
1200 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_resume()
1201 usb_asmedia_modifyflowcontrol(to_pci_dev(hcd->self.controller)); in xhci_resume()
1203 /* Re-enable port polling. */ in xhci_resume()
1205 __func__, hcd->self.busnum); in xhci_resume()
1206 if (xhci->shared_hcd) { in xhci_resume()
1207 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_resume()
1208 usb_hcd_poll_rh_status(xhci->shared_hcd); in xhci_resume()
1210 set_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_resume()
1218 /*-------------------------------------------------------------------------*/
1228 buf_len = urb->transfer_buffer_length; in xhci_map_temp_buffer()
1231 dev_to_node(hcd->self.sysdev)); in xhci_map_temp_buffer()
1233 return -ENOMEM; in xhci_map_temp_buffer()
1236 sg_pcopy_to_buffer(urb->sg, urb->num_sgs, in xhci_map_temp_buffer()
1239 urb->transfer_buffer = temp; in xhci_map_temp_buffer()
1240 urb->transfer_dma = dma_map_single(hcd->self.sysdev, in xhci_map_temp_buffer()
1241 urb->transfer_buffer, in xhci_map_temp_buffer()
1242 urb->transfer_buffer_length, in xhci_map_temp_buffer()
1245 if (dma_mapping_error(hcd->self.sysdev, in xhci_map_temp_buffer()
1246 urb->transfer_dma)) { in xhci_map_temp_buffer()
1247 ret = -EAGAIN; in xhci_map_temp_buffer()
1250 urb->transfer_flags |= URB_DMA_MAP_SINGLE; in xhci_map_temp_buffer()
1267 tail_sg = urb->sg; in xhci_urb_temp_buffer_required()
1268 max_pkt = usb_endpoint_maxp(&urb->ep->desc); in xhci_urb_temp_buffer_required()
1270 if (!urb->num_sgs) in xhci_urb_temp_buffer_required()
1273 if (urb->dev->speed >= USB_SPEED_SUPER) in xhci_urb_temp_buffer_required()
1278 if (urb->transfer_buffer_length != 0 && in xhci_urb_temp_buffer_required()
1279 !(urb->transfer_flags & URB_NO_TRANSFER_DMA_MAP)) { in xhci_urb_temp_buffer_required()
1280 for_each_sg(urb->sg, sg, urb->num_sgs, i) { in xhci_urb_temp_buffer_required()
1281 len = len + sg->length; in xhci_urb_temp_buffer_required()
1282 if (i > trb_size - 2) { in xhci_urb_temp_buffer_required()
1283 len = len - tail_sg->length; in xhci_urb_temp_buffer_required()
1304 buf_len = urb->transfer_buffer_length; in xhci_unmap_temp_buf()
1307 (urb->transfer_flags & URB_DMA_MAP_SINGLE)) in xhci_unmap_temp_buf()
1308 dma_unmap_single(hcd->self.sysdev, in xhci_unmap_temp_buf()
1309 urb->transfer_dma, in xhci_unmap_temp_buf()
1310 urb->transfer_buffer_length, in xhci_unmap_temp_buf()
1314 len = sg_pcopy_from_buffer(urb->sg, urb->num_sgs, in xhci_unmap_temp_buf()
1315 urb->transfer_buffer, in xhci_unmap_temp_buf()
1321 urb->actual_length = len; in xhci_unmap_temp_buf()
1324 urb->transfer_flags &= ~URB_DMA_MAP_SINGLE; in xhci_unmap_temp_buf()
1325 kfree(urb->transfer_buffer); in xhci_unmap_temp_buf()
1326 urb->transfer_buffer = NULL; in xhci_unmap_temp_buf()
1345 if (xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) { in xhci_map_urb_for_dma()
1359 if (urb->num_sgs && (urb->transfer_flags & URB_DMA_MAP_SINGLE)) in xhci_unmap_urb_for_dma()
1362 if ((xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) && unmap_temp_buf) in xhci_unmap_urb_for_dma()
1369 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1373 * Index = (epnum * 2) + direction - 1,
1376 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1385 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1; in xhci_get_endpoint_index()
1417 return fls(added_ctxs) - 1; in xhci_last_valid_endpoint()
1421 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1431 return -EINVAL; in xhci_check_args()
1433 if (!udev->parent) { in xhci_check_args()
1440 if (!udev->slot_id || !xhci->devs[udev->slot_id]) { in xhci_check_args()
1443 return -EINVAL; in xhci_check_args()
1446 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_args()
1447 if (virt_dev->udev != udev) { in xhci_check_args()
1450 return -EINVAL; in xhci_check_args()
1454 if (xhci->xhc_state & XHCI_STATE_HALTED) in xhci_check_args()
1455 return -ENODEV; in xhci_check_args()
1479 ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, 0); in xhci_check_ep0_maxpacket()
1480 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); in xhci_check_ep0_maxpacket()
1481 max_packet_size = usb_endpoint_maxp(&vdev->udev->ep0.desc); in xhci_check_ep0_maxpacket()
1501 return -ENOMEM; in xhci_check_ep0_maxpacket()
1503 command->in_ctx = vdev->in_ctx; in xhci_check_ep0_maxpacket()
1504 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_ep0_maxpacket()
1508 ret = -ENOMEM; in xhci_check_ep0_maxpacket()
1512 xhci_endpoint_copy(xhci, vdev->in_ctx, vdev->out_ctx, 0); in xhci_check_ep0_maxpacket()
1514 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, 0); in xhci_check_ep0_maxpacket()
1515 ep_ctx->ep_info &= cpu_to_le32(~EP_STATE_MASK);/* must clear */ in xhci_check_ep0_maxpacket()
1516 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK); in xhci_check_ep0_maxpacket()
1517 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size)); in xhci_check_ep0_maxpacket()
1519 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG); in xhci_check_ep0_maxpacket()
1520 ctrl_ctx->drop_flags = 0; in xhci_check_ep0_maxpacket()
1522 ret = xhci_configure_endpoint(xhci, vdev->udev, command, in xhci_check_ep0_maxpacket()
1525 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG); in xhci_check_ep0_maxpacket()
1528 dev_dbg(&vdev->udev->dev, "incorrect max packet size %d for ep0\n", in xhci_check_ep0_maxpacket()
1530 return -EINVAL; in xhci_check_ep0_maxpacket()
1533 kfree(command->completion); in xhci_check_ep0_maxpacket()
1540 * non-error returns are a promise to giveback() the urb later
1553 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_enqueue()
1555 if (usb_endpoint_xfer_isoc(&urb->ep->desc)) in xhci_urb_enqueue()
1556 num_tds = urb->number_of_packets; in xhci_urb_enqueue()
1557 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) && in xhci_urb_enqueue()
1558 urb->transfer_buffer_length > 0 && in xhci_urb_enqueue()
1559 urb->transfer_flags & URB_ZERO_PACKET && in xhci_urb_enqueue()
1560 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc))) in xhci_urb_enqueue()
1567 return -ENOMEM; in xhci_urb_enqueue()
1569 urb_priv->num_tds = num_tds; in xhci_urb_enqueue()
1570 urb_priv->num_tds_done = 0; in xhci_urb_enqueue()
1571 urb->hcpriv = urb_priv; in xhci_urb_enqueue()
1575 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_enqueue()
1577 ret = xhci_check_args(hcd, urb->dev, urb->ep, in xhci_urb_enqueue()
1580 ret = ret ? ret : -EINVAL; in xhci_urb_enqueue()
1584 slot_id = urb->dev->slot_id; in xhci_urb_enqueue()
1587 ret = -ESHUTDOWN; in xhci_urb_enqueue()
1591 if (xhci->devs[slot_id]->flags & VDEV_PORT_ERROR) { in xhci_urb_enqueue()
1593 ret = -ENODEV; in xhci_urb_enqueue()
1597 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_enqueue()
1598 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n", in xhci_urb_enqueue()
1599 urb->ep->desc.bEndpointAddress, urb); in xhci_urb_enqueue()
1600 ret = -ESHUTDOWN; in xhci_urb_enqueue()
1604 ep_state = &xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_urb_enqueue()
1609 ret = -EINVAL; in xhci_urb_enqueue()
1614 ret = -EINVAL; in xhci_urb_enqueue()
1618 switch (usb_endpoint_type(&urb->ep->desc)) { in xhci_urb_enqueue()
1640 urb->hcpriv = NULL; in xhci_urb_enqueue()
1642 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_enqueue()
1662 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1692 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_dequeue()
1702 vdev = xhci->devs[urb->dev->slot_id]; in xhci_urb_dequeue()
1703 urb_priv = urb->hcpriv; in xhci_urb_dequeue()
1707 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_dequeue()
1708 ep = &vdev->eps[ep_index]; in xhci_urb_dequeue()
1714 temp = readl(&xhci->op_regs->status); in xhci_urb_dequeue()
1715 if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_dequeue()
1721 * check ring is not re-allocated since URB was enqueued. If it is, then in xhci_urb_dequeue()
1725 if (!td_on_ring(&urb_priv->td[0], ep_ring)) { in xhci_urb_dequeue()
1727 for (i = urb_priv->num_tds_done; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1728 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1729 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1730 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1735 if (xhci->xhc_state & XHCI_STATE_HALTED) { in xhci_urb_dequeue()
1738 for (i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1739 i < urb_priv->num_tds; in xhci_urb_dequeue()
1741 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1742 if (!list_empty(&td->td_list)) in xhci_urb_dequeue()
1743 list_del_init(&td->td_list); in xhci_urb_dequeue()
1744 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1745 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1750 i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1751 if (i < urb_priv->num_tds) in xhci_urb_dequeue()
1755 urb, urb->dev->devpath, in xhci_urb_dequeue()
1756 urb->ep->desc.bEndpointAddress, in xhci_urb_dequeue()
1758 urb_priv->td[i].start_seg, in xhci_urb_dequeue()
1759 urb_priv->td[i].first_trb)); in xhci_urb_dequeue()
1761 for (; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1762 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1764 if (list_empty(&td->cancelled_td_list)) { in xhci_urb_dequeue()
1765 td->cancel_status = TD_DIRTY; in xhci_urb_dequeue()
1766 list_add_tail(&td->cancelled_td_list, in xhci_urb_dequeue()
1767 &ep->cancelled_td_list); in xhci_urb_dequeue()
1774 if (!(ep->ep_state & EP_STOP_CMD_PENDING)) { in xhci_urb_dequeue()
1777 ret = -ENOMEM; in xhci_urb_dequeue()
1780 ep->ep_state |= EP_STOP_CMD_PENDING; in xhci_urb_dequeue()
1781 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id, in xhci_urb_dequeue()
1786 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1793 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1794 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN); in xhci_urb_dequeue()
1809 * the xhci->devs[slot_id] structure.
1827 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_drop_endpoint()
1828 return -ENODEV; in xhci_drop_endpoint()
1831 drop_flag = xhci_get_endpoint_flag(&ep->desc); in xhci_drop_endpoint()
1833 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n", in xhci_drop_endpoint()
1838 in_ctx = xhci->devs[udev->slot_id]->in_ctx; in xhci_drop_endpoint()
1839 out_ctx = xhci->devs[udev->slot_id]->out_ctx; in xhci_drop_endpoint()
1847 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_drop_endpoint()
1853 le32_to_cpu(ctrl_ctx->drop_flags) & in xhci_drop_endpoint()
1854 xhci_get_endpoint_flag(&ep->desc)) { in xhci_drop_endpoint()
1856 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL) in xhci_drop_endpoint()
1862 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag); in xhci_drop_endpoint()
1863 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_drop_endpoint()
1865 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag); in xhci_drop_endpoint()
1866 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_drop_endpoint()
1868 xhci_debugfs_remove_endpoint(xhci, xhci->devs[udev->slot_id], ep_index); in xhci_drop_endpoint()
1870 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); in xhci_drop_endpoint()
1873 (unsigned int) ep->desc.bEndpointAddress, in xhci_drop_endpoint()
1874 udev->slot_id, in xhci_drop_endpoint()
1892 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1910 ep->hcpriv = NULL; in xhci_add_endpoint()
1914 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_add_endpoint()
1915 return -ENODEV; in xhci_add_endpoint()
1917 added_ctxs = xhci_get_endpoint_flag(&ep->desc); in xhci_add_endpoint()
1923 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n", in xhci_add_endpoint()
1928 virt_dev = xhci->devs[udev->slot_id]; in xhci_add_endpoint()
1929 in_ctx = virt_dev->in_ctx; in xhci_add_endpoint()
1937 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_add_endpoint()
1941 if (virt_dev->eps[ep_index].ring && in xhci_add_endpoint()
1942 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) { in xhci_add_endpoint()
1945 (unsigned int) ep->desc.bEndpointAddress); in xhci_add_endpoint()
1946 return -EINVAL; in xhci_add_endpoint()
1952 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) { in xhci_add_endpoint()
1964 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", in xhci_add_endpoint()
1965 __func__, ep->desc.bEndpointAddress); in xhci_add_endpoint()
1966 return -ENOMEM; in xhci_add_endpoint()
1969 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs); in xhci_add_endpoint()
1970 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_add_endpoint()
1974 * this re-adds a new state for the endpoint from the new endpoint in xhci_add_endpoint()
1975 * descriptors. We must drop and re-add this endpoint, so we leave the in xhci_add_endpoint()
1978 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_add_endpoint()
1981 ep->hcpriv = udev; in xhci_add_endpoint()
1983 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); in xhci_add_endpoint()
1987 (unsigned int) ep->desc.bEndpointAddress, in xhci_add_endpoint()
1988 udev->slot_id, in xhci_add_endpoint()
2002 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_zero_in_ctx()
2014 ctrl_ctx->drop_flags = 0; in xhci_zero_in_ctx()
2015 ctrl_ctx->add_flags = 0; in xhci_zero_in_ctx()
2016 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_zero_in_ctx()
2017 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_zero_in_ctx()
2019 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1)); in xhci_zero_in_ctx()
2021 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); in xhci_zero_in_ctx()
2022 ep_ctx->ep_info = 0; in xhci_zero_in_ctx()
2023 ep_ctx->ep_info2 = 0; in xhci_zero_in_ctx()
2024 ep_ctx->deq = 0; in xhci_zero_in_ctx()
2025 ep_ctx->tx_info = 0; in xhci_zero_in_ctx()
2038 ret = -ETIME; in xhci_configure_endpoint_result()
2041 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2043 ret = -ENOMEM; in xhci_configure_endpoint_result()
2048 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2050 ret = -ENOSPC; in xhci_configure_endpoint_result()
2055 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " in xhci_configure_endpoint_result()
2058 ret = -EINVAL; in xhci_configure_endpoint_result()
2061 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2063 ret = -ENODEV; in xhci_configure_endpoint_result()
2073 ret = -EINVAL; in xhci_configure_endpoint_result()
2088 ret = -ETIME; in xhci_evaluate_context_result()
2091 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2093 ret = -EINVAL; in xhci_evaluate_context_result()
2096 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2098 ret = -EINVAL; in xhci_evaluate_context_result()
2101 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2103 ret = -EINVAL; in xhci_evaluate_context_result()
2106 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2108 ret = -ENODEV; in xhci_evaluate_context_result()
2112 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n"); in xhci_evaluate_context_result()
2113 ret = -EINVAL; in xhci_evaluate_context_result()
2123 ret = -EINVAL; in xhci_evaluate_context_result()
2139 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_new_endpoints()
2140 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_new_endpoints()
2146 return hweight32(valid_add_flags) - in xhci_count_num_new_endpoints()
2156 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_dropped_endpoints()
2157 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_dropped_endpoints()
2159 return hweight32(valid_drop_flags) - in xhci_count_num_dropped_endpoints()
2169 * - the first configure endpoint command drops more endpoints than it adds
2170 * - a second configure endpoint command that adds more endpoints is queued
2171 * - the first configure endpoint command fails, so the config is unchanged
2172 * - the second command may succeed, even though there isn't enough resources
2174 * Must be called with xhci->lock held.
2182 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) { in xhci_reserve_host_resources()
2186 xhci->num_active_eps, added_eps, in xhci_reserve_host_resources()
2187 xhci->limit_active_eps); in xhci_reserve_host_resources()
2188 return -ENOMEM; in xhci_reserve_host_resources()
2190 xhci->num_active_eps += added_eps; in xhci_reserve_host_resources()
2193 xhci->num_active_eps); in xhci_reserve_host_resources()
2201 * Must be called with xhci->lock held.
2209 xhci->num_active_eps -= num_failed_eps; in xhci_free_host_resources()
2213 xhci->num_active_eps); in xhci_free_host_resources()
2220 * Must be called with xhci->lock held.
2228 xhci->num_active_eps -= num_dropped_eps; in xhci_finish_resource_reservation()
2233 xhci->num_active_eps); in xhci_finish_resource_reservation()
2238 switch (udev->speed) { in xhci_get_block_size()
2257 if (interval_bw->overhead[LS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2259 if (interval_bw->overhead[FS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2276 bw_table = &xhci->rh_bw[virt_dev->rhub_port->hw_portnum].bw_table; in xhci_check_tt_bw_table()
2277 tt_info = virt_dev->tt_info; in xhci_check_tt_bw_table()
2284 if (old_active_eps == 0 && tt_info->active_eps != 0) { in xhci_check_tt_bw_table()
2285 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT) in xhci_check_tt_bw_table()
2286 return -ENOMEM; in xhci_check_tt_bw_table()
2304 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved)) in xhci_check_ss_bw()
2305 return -ENOMEM; in xhci_check_ss_bw()
2308 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved)) in xhci_check_ss_bw()
2309 return -ENOMEM; in xhci_check_ss_bw()
2315 * This algorithm is a very conservative estimate of the worst-case scheduling
2323 * over-estimate.
2370 if (virt_dev->udev->speed >= USB_SPEED_SUPER) in xhci_check_bw_table()
2373 if (virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2382 bw_table = virt_dev->bw_table; in xhci_check_bw_table()
2386 block_size = xhci_get_block_size(virt_dev->udev); in xhci_check_bw_table()
2391 if (virt_dev->tt_info) { in xhci_check_bw_table()
2394 virt_dev->rhub_port->hw_portnum + 1); in xhci_check_bw_table()
2398 return -ENOMEM; in xhci_check_bw_table()
2402 virt_dev->tt_info->slot_id, in xhci_check_bw_table()
2403 virt_dev->tt_info->ttport); in xhci_check_bw_table()
2407 virt_dev->rhub_port->hw_portnum + 1); in xhci_check_bw_table()
2413 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) + in xhci_check_bw_table()
2414 bw_table->interval_bw[0].num_packets * in xhci_check_bw_table()
2415 xhci_get_largest_overhead(&bw_table->interval_bw[0]); in xhci_check_bw_table()
2428 bw_table->interval_bw[i].num_packets; in xhci_check_bw_table()
2433 if (list_empty(&bw_table->interval_bw[i].endpoints)) in xhci_check_bw_table()
2439 ep_entry = bw_table->interval_bw[i].endpoints.next; in xhci_check_bw_table()
2444 virt_ep->bw_info.max_packet_size, in xhci_check_bw_table()
2452 &bw_table->interval_bw[i]); in xhci_check_bw_table()
2491 return -ENOMEM; in xhci_check_bw_table()
2495 * Ok, we know we have some packets left over after even-handedly in xhci_check_bw_table()
2497 * fit into, so we over-schedule and say they will be scheduled every in xhci_check_bw_table()
2503 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2509 xhci->rh_bw[virt_dev->rhub_port->hw_portnum].num_active_tts; in xhci_check_bw_table()
2516 (max_bandwidth - bw_used - bw_reserved) * 100 / in xhci_check_bw_table()
2523 return -ENOMEM; in xhci_check_bw_table()
2526 bw_table->bw_used = bw_used; in xhci_check_bw_table()
2544 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK); in xhci_get_ss_bw_consumed()
2546 if (ep_bw->ep_interval == 0) in xhci_get_ss_bw_consumed()
2548 (ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2550 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2552 1 << ep_bw->ep_interval); in xhci_get_ss_bw_consumed()
2566 if (xhci_is_async_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2569 if (udev->speed >= USB_SPEED_SUPER) { in xhci_drop_ep_from_interval_table()
2570 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2571 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -= in xhci_drop_ep_from_interval_table()
2574 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -= in xhci_drop_ep_from_interval_table()
2582 if (list_empty(&virt_ep->bw_endpoint_list)) in xhci_drop_ep_from_interval_table()
2587 if (udev->speed == USB_SPEED_HIGH) in xhci_drop_ep_from_interval_table()
2588 normalized_interval = ep_bw->ep_interval; in xhci_drop_ep_from_interval_table()
2590 normalized_interval = ep_bw->ep_interval - 3; in xhci_drop_ep_from_interval_table()
2593 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload; in xhci_drop_ep_from_interval_table()
2594 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_drop_ep_from_interval_table()
2595 interval_bw->num_packets -= ep_bw->num_packets; in xhci_drop_ep_from_interval_table()
2596 switch (udev->speed) { in xhci_drop_ep_from_interval_table()
2598 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2601 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2604 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2613 tt_info->active_eps -= 1; in xhci_drop_ep_from_interval_table()
2614 list_del_init(&virt_ep->bw_endpoint_list); in xhci_drop_ep_from_interval_table()
2628 if (xhci_is_async_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2631 if (udev->speed == USB_SPEED_SUPER) { in xhci_add_ep_to_interval_table()
2632 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2633 xhci->devs[udev->slot_id]->bw_table->ss_bw_in += in xhci_add_ep_to_interval_table()
2636 xhci->devs[udev->slot_id]->bw_table->ss_bw_out += in xhci_add_ep_to_interval_table()
2644 if (udev->speed == USB_SPEED_HIGH) in xhci_add_ep_to_interval_table()
2645 normalized_interval = ep_bw->ep_interval; in xhci_add_ep_to_interval_table()
2647 normalized_interval = ep_bw->ep_interval - 3; in xhci_add_ep_to_interval_table()
2650 bw_table->interval0_esit_payload += ep_bw->max_esit_payload; in xhci_add_ep_to_interval_table()
2651 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_add_ep_to_interval_table()
2652 interval_bw->num_packets += ep_bw->num_packets; in xhci_add_ep_to_interval_table()
2653 switch (udev->speed) { in xhci_add_ep_to_interval_table()
2655 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2658 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2661 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2671 tt_info->active_eps += 1; in xhci_add_ep_to_interval_table()
2673 list_for_each_entry(smaller_ep, &interval_bw->endpoints, in xhci_add_ep_to_interval_table()
2675 if (ep_bw->max_packet_size >= in xhci_add_ep_to_interval_table()
2676 smaller_ep->bw_info.max_packet_size) { in xhci_add_ep_to_interval_table()
2678 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2679 &smaller_ep->bw_endpoint_list); in xhci_add_ep_to_interval_table()
2684 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2685 &interval_bw->endpoints); in xhci_add_ep_to_interval_table()
2693 if (!virt_dev->tt_info) in xhci_update_tt_active_eps()
2696 rh_bw_info = &xhci->rh_bw[virt_dev->rhub_port->hw_portnum]; in xhci_update_tt_active_eps()
2698 virt_dev->tt_info->active_eps != 0) { in xhci_update_tt_active_eps()
2699 rh_bw_info->num_active_tts += 1; in xhci_update_tt_active_eps()
2700 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2702 virt_dev->tt_info->active_eps == 0) { in xhci_update_tt_active_eps()
2703 rh_bw_info->num_active_tts -= 1; in xhci_update_tt_active_eps()
2704 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2717 if (virt_dev->tt_info) in xhci_reserve_bandwidth()
2718 old_active_eps = virt_dev->tt_info->active_eps; in xhci_reserve_bandwidth()
2724 return -ENOMEM; in xhci_reserve_bandwidth()
2732 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2739 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2740 virt_dev->bw_table, in xhci_reserve_bandwidth()
2741 virt_dev->udev, in xhci_reserve_bandwidth()
2742 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2743 virt_dev->tt_info); in xhci_reserve_bandwidth()
2746 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev); in xhci_reserve_bandwidth()
2751 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2752 virt_dev->bw_table, in xhci_reserve_bandwidth()
2753 virt_dev->udev, in xhci_reserve_bandwidth()
2754 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2755 virt_dev->tt_info); in xhci_reserve_bandwidth()
2776 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2777 virt_dev->bw_table, in xhci_reserve_bandwidth()
2778 virt_dev->udev, in xhci_reserve_bandwidth()
2779 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2780 virt_dev->tt_info); in xhci_reserve_bandwidth()
2783 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i], in xhci_reserve_bandwidth()
2788 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2789 virt_dev->bw_table, in xhci_reserve_bandwidth()
2790 virt_dev->udev, in xhci_reserve_bandwidth()
2791 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2792 virt_dev->tt_info); in xhci_reserve_bandwidth()
2794 return -ENOMEM; in xhci_reserve_bandwidth()
2813 return -EINVAL; in xhci_configure_endpoint()
2815 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2817 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_configure_endpoint()
2818 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2819 return -ESHUTDOWN; in xhci_configure_endpoint()
2822 virt_dev = xhci->devs[udev->slot_id]; in xhci_configure_endpoint()
2824 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_configure_endpoint()
2826 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2829 return -ENOMEM; in xhci_configure_endpoint()
2832 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) && in xhci_configure_endpoint()
2834 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2837 xhci->num_active_eps); in xhci_configure_endpoint()
2838 return -ENOMEM; in xhci_configure_endpoint()
2840 if ((xhci->quirks & XHCI_SW_BW_CHECKING) && !ctx_change && in xhci_configure_endpoint()
2841 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) { in xhci_configure_endpoint()
2842 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2844 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2846 return -ENOMEM; in xhci_configure_endpoint()
2849 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_configure_endpoint()
2856 command->in_ctx->dma, in xhci_configure_endpoint()
2857 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2860 command->in_ctx->dma, in xhci_configure_endpoint()
2861 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2863 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2865 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2868 return -ENOMEM; in xhci_configure_endpoint()
2871 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2874 wait_for_completion(command->completion); in xhci_configure_endpoint()
2878 &command->status); in xhci_configure_endpoint()
2881 &command->status); in xhci_configure_endpoint()
2883 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_configure_endpoint()
2884 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2892 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2900 struct xhci_virt_ep *ep = &vdev->eps[i]; in xhci_check_bw_drop_ep_streams()
2902 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_check_bw_drop_ep_streams()
2905 xhci_free_stream_info(xhci, ep->stream_info); in xhci_check_bw_drop_ep_streams()
2906 ep->stream_info = NULL; in xhci_check_bw_drop_ep_streams()
2907 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_check_bw_drop_ep_streams()
2918 * else should be touching the xhci->devs[slot_id] structure, so we
2919 * don't need to take the xhci->lock for manipulating that.
2935 if ((xhci->xhc_state & XHCI_STATE_DYING) || in xhci_check_bandwidth()
2936 (xhci->xhc_state & XHCI_STATE_REMOVING)) in xhci_check_bandwidth()
2937 return -ENODEV; in xhci_check_bandwidth()
2940 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_bandwidth()
2944 return -ENOMEM; in xhci_check_bandwidth()
2946 command->in_ctx = virt_dev->in_ctx; in xhci_check_bandwidth()
2948 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ in xhci_check_bandwidth()
2949 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_bandwidth()
2953 ret = -ENOMEM; in xhci_check_bandwidth()
2956 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_check_bandwidth()
2957 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG); in xhci_check_bandwidth()
2958 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG)); in xhci_check_bandwidth()
2961 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) && in xhci_check_bandwidth()
2962 ctrl_ctx->drop_flags == 0) { in xhci_check_bandwidth()
2967 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_check_bandwidth()
2968 for (i = 31; i >= 1; i--) { in xhci_check_bandwidth()
2971 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32)) in xhci_check_bandwidth()
2972 || (ctrl_ctx->add_flags & le32) || i == 1) { in xhci_check_bandwidth()
2973 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_check_bandwidth()
2974 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i)); in xhci_check_bandwidth()
2987 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) && in xhci_check_bandwidth()
2988 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) { in xhci_check_bandwidth()
2999 if (!virt_dev->eps[i].new_ring) in xhci_check_bandwidth()
3004 if (virt_dev->eps[i].ring) { in xhci_check_bandwidth()
3008 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring; in xhci_check_bandwidth()
3009 virt_dev->eps[i].new_ring = NULL; in xhci_check_bandwidth()
3013 kfree(command->completion); in xhci_check_bandwidth()
3032 virt_dev = xhci->devs[udev->slot_id]; in xhci_reset_bandwidth()
3035 if (virt_dev->eps[i].new_ring) { in xhci_reset_bandwidth()
3037 xhci_ring_free(xhci, virt_dev->eps[i].new_ring); in xhci_reset_bandwidth()
3038 virt_dev->eps[i].new_ring = NULL; in xhci_reset_bandwidth()
3051 ctrl_ctx->add_flags = cpu_to_le32(add_flags); in xhci_setup_input_ctx_for_config_ep()
3052 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags); in xhci_setup_input_ctx_for_config_ep()
3054 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_setup_input_ctx_for_config_ep()
3069 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_disable()
3071 udev = (struct usb_device *)host_ep->hcpriv; in xhci_endpoint_disable()
3072 if (!udev || !udev->slot_id) in xhci_endpoint_disable()
3075 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_disable()
3079 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_disable()
3080 ep = &vdev->eps[ep_index]; in xhci_endpoint_disable()
3083 if (ep->ep_state & EP_CLEARING_TT) { in xhci_endpoint_disable()
3084 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3089 if (ep->ep_state) in xhci_endpoint_disable()
3091 ep->ep_state); in xhci_endpoint_disable()
3093 host_ep->hcpriv = NULL; in xhci_endpoint_disable()
3094 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3108 * vdev may be lost due to xHC restore error and re-initialization during S3/S4
3127 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_reset()
3134 if (usb_endpoint_xfer_control(&host_ep->desc) && ep_index == 0) { in xhci_endpoint_reset()
3137 if (udev->speed != USB_SPEED_FULL || !udev->slot_id) in xhci_endpoint_reset()
3140 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_reset()
3141 if (!vdev || vdev->udev != udev) in xhci_endpoint_reset()
3150 if (!host_ep->hcpriv) in xhci_endpoint_reset()
3152 udev = (struct usb_device *) host_ep->hcpriv; in xhci_endpoint_reset()
3153 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_reset()
3155 if (!udev->slot_id || !vdev) in xhci_endpoint_reset()
3158 ep = &vdev->eps[ep_index]; in xhci_endpoint_reset()
3161 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3162 if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) { in xhci_endpoint_reset()
3163 ep->ep_state &= ~EP_HARD_CLEAR_TOGGLE; in xhci_endpoint_reset()
3164 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3167 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3168 /* Only interrupt and bulk ep's use data toggle, USB2 spec 5.5.4-> */ in xhci_endpoint_reset()
3169 if (usb_endpoint_xfer_control(&host_ep->desc) || in xhci_endpoint_reset()
3170 usb_endpoint_xfer_isoc(&host_ep->desc)) in xhci_endpoint_reset()
3173 ep_flag = xhci_get_endpoint_flag(&host_ep->desc); in xhci_endpoint_reset()
3186 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3189 ep->ep_state |= EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3197 if (!list_empty(&ep->ring->td_list)) { in xhci_endpoint_reset()
3198 dev_err(&udev->dev, "EP not empty, refuse reset\n"); in xhci_endpoint_reset()
3199 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3204 err = xhci_queue_stop_endpoint(xhci, stop_cmd, udev->slot_id, in xhci_endpoint_reset()
3207 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3215 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3217 wait_for_completion(stop_cmd->completion); in xhci_endpoint_reset()
3219 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3222 ctrl_ctx = xhci_get_input_control_ctx(cfg_cmd->in_ctx); in xhci_endpoint_reset()
3224 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3231 xhci_setup_input_ctx_for_config_ep(xhci, cfg_cmd->in_ctx, vdev->out_ctx, in xhci_endpoint_reset()
3233 xhci_endpoint_copy(xhci, cfg_cmd->in_ctx, vdev->out_ctx, ep_index); in xhci_endpoint_reset()
3235 err = xhci_queue_configure_endpoint(xhci, cfg_cmd, cfg_cmd->in_ctx->dma, in xhci_endpoint_reset()
3236 udev->slot_id, false); in xhci_endpoint_reset()
3238 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3246 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3248 wait_for_completion(cfg_cmd->completion); in xhci_endpoint_reset()
3253 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3254 if (ep->ep_state & EP_SOFT_CLEAR_TOGGLE) in xhci_endpoint_reset()
3255 ep->ep_state &= ~EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3256 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3268 return -EINVAL; in xhci_check_streams_endpoint()
3271 return ret ? ret : -EINVAL; in xhci_check_streams_endpoint()
3272 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) { in xhci_check_streams_endpoint()
3275 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3276 return -EINVAL; in xhci_check_streams_endpoint()
3279 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_check_streams_endpoint()
3280 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_check_streams_endpoint()
3285 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3288 return -EINVAL; in xhci_check_streams_endpoint()
3290 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) { in xhci_check_streams_endpoint()
3293 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3294 return -EINVAL; in xhci_check_streams_endpoint()
3312 max_streams = HCC_MAX_PSA(xhci->hcc_params); in xhci_calculate_streams_entries()
3337 eps[i], udev->slot_id); in xhci_calculate_streams_and_bitmask()
3341 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp); in xhci_calculate_streams_and_bitmask()
3342 if (max_streams < (*num_streams - 1)) { in xhci_calculate_streams_and_bitmask()
3344 eps[i]->desc.bEndpointAddress, in xhci_calculate_streams_and_bitmask()
3349 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_streams_and_bitmask()
3351 return -EINVAL; in xhci_calculate_streams_and_bitmask()
3367 slot_id = udev->slot_id; in xhci_calculate_no_streams_bitmask()
3368 if (!xhci->devs[slot_id]) in xhci_calculate_no_streams_bitmask()
3372 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3373 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_calculate_no_streams_bitmask()
3379 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3388 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3390 "with non-streams endpoint\n"); in xhci_calculate_no_streams_bitmask()
3393 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3430 return -EINVAL; in xhci_alloc_streams()
3441 if ((xhci->quirks & XHCI_BROKEN_STREAMS) || in xhci_alloc_streams()
3442 HCC_MAX_PSA(xhci->hcc_params) < 4) { in xhci_alloc_streams()
3444 return -ENOSYS; in xhci_alloc_streams()
3449 return -ENOMEM; in xhci_alloc_streams()
3451 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_alloc_streams()
3456 return -ENOMEM; in xhci_alloc_streams()
3463 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3468 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3475 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3476 return -EINVAL; in xhci_alloc_streams()
3478 vdev = xhci->devs[udev->slot_id]; in xhci_alloc_streams()
3483 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3484 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS; in xhci_alloc_streams()
3486 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3497 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3498 max_packet = usb_endpoint_maxp(&eps[i]->desc); in xhci_alloc_streams()
3499 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci, in xhci_alloc_streams()
3503 if (!vdev->eps[ep_index].stream_info) in xhci_alloc_streams()
3514 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3515 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index); in xhci_alloc_streams()
3517 xhci_endpoint_copy(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3518 vdev->out_ctx, ep_index); in xhci_alloc_streams()
3520 vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3525 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3526 vdev->out_ctx, ctrl_ctx, in xhci_alloc_streams()
3540 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3542 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3543 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3545 udev->slot_id, ep_index); in xhci_alloc_streams()
3546 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS; in xhci_alloc_streams()
3549 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3552 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3556 return num_streams - 1; in xhci_alloc_streams()
3561 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3562 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3563 vdev->eps[ep_index].stream_info = NULL; in xhci_alloc_streams()
3567 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3568 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_alloc_streams()
3572 return -ENOMEM; in xhci_alloc_streams()
3595 vdev = xhci->devs[udev->slot_id]; in xhci_free_streams()
3598 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3602 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3603 return -EINVAL; in xhci_free_streams()
3610 ep_index = xhci_get_endpoint_index(&eps[0]->desc); in xhci_free_streams()
3611 command = vdev->eps[ep_index].stream_info->free_streams_command; in xhci_free_streams()
3612 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_free_streams()
3614 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3617 return -EINVAL; in xhci_free_streams()
3623 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3624 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); in xhci_free_streams()
3625 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |= in xhci_free_streams()
3628 xhci_endpoint_copy(xhci, command->in_ctx, in xhci_free_streams()
3629 vdev->out_ctx, ep_index); in xhci_free_streams()
3631 &vdev->eps[ep_index]); in xhci_free_streams()
3633 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx, in xhci_free_streams()
3634 vdev->out_ctx, ctrl_ctx, in xhci_free_streams()
3636 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3650 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3652 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3653 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_free_streams()
3654 vdev->eps[ep_index].stream_info = NULL; in xhci_free_streams()
3658 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS; in xhci_free_streams()
3659 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_free_streams()
3661 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3671 * Must be called with xhci->lock held.
3681 if (virt_dev->eps[i].ring) { in xhci_free_device_endpoint_resources()
3686 xhci->num_active_eps -= num_dropped_eps; in xhci_free_device_endpoint_resources()
3692 xhci->num_active_eps); in xhci_free_device_endpoint_resources()
3699 * xhci_address_device(), and then re-set up the configuration. If this is
3701 * settings will be re-installed through the normal bandwidth allocation
3710 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3711 * re-allocate the device.
3729 slot_id = udev->slot_id; in xhci_discover_or_reset_device()
3730 virt_dev = xhci->devs[slot_id]; in xhci_discover_or_reset_device()
3733 "not exist. Re-allocate the device\n", slot_id); in xhci_discover_or_reset_device()
3738 return -EINVAL; in xhci_discover_or_reset_device()
3741 if (virt_dev->tt_info) in xhci_discover_or_reset_device()
3742 old_active_eps = virt_dev->tt_info->active_eps; in xhci_discover_or_reset_device()
3744 if (virt_dev->udev != udev) { in xhci_discover_or_reset_device()
3747 * Re-allocate the device. in xhci_discover_or_reset_device()
3750 "not match the udev. Re-allocate the device\n", in xhci_discover_or_reset_device()
3756 return -EINVAL; in xhci_discover_or_reset_device()
3760 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_discover_or_reset_device()
3761 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_discover_or_reset_device()
3777 return -ENOMEM; in xhci_discover_or_reset_device()
3781 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3786 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3790 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3793 wait_for_completion(reset_device_cmd->completion); in xhci_discover_or_reset_device()
3799 ret = reset_device_cmd->status; in xhci_discover_or_reset_device()
3804 ret = -ETIME; in xhci_discover_or_reset_device()
3810 xhci_get_slot_state(xhci, virt_dev->out_ctx)); in xhci_discover_or_reset_device()
3823 ret = -EINVAL; in xhci_discover_or_reset_device()
3828 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_discover_or_reset_device()
3829 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3832 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3837 struct xhci_virt_ep *ep = &virt_dev->eps[i]; in xhci_discover_or_reset_device()
3839 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_discover_or_reset_device()
3842 xhci_free_stream_info(xhci, ep->stream_info); in xhci_discover_or_reset_device()
3843 ep->stream_info = NULL; in xhci_discover_or_reset_device()
3844 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_discover_or_reset_device()
3847 if (ep->ring) { in xhci_discover_or_reset_device()
3851 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list)) in xhci_discover_or_reset_device()
3853 &virt_dev->eps[i].bw_info, in xhci_discover_or_reset_device()
3854 virt_dev->bw_table, in xhci_discover_or_reset_device()
3856 &virt_dev->eps[i], in xhci_discover_or_reset_device()
3857 virt_dev->tt_info); in xhci_discover_or_reset_device()
3858 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info); in xhci_discover_or_reset_device()
3862 virt_dev->flags = 0; in xhci_discover_or_reset_device()
3888 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_free_dev()
3889 pm_runtime_put_noidle(hcd->self.controller); in xhci_free_dev()
3895 if (ret <= 0 && ret != -ENODEV) in xhci_free_dev()
3898 virt_dev = xhci->devs[udev->slot_id]; in xhci_free_dev()
3899 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_free_dev()
3904 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING; in xhci_free_dev()
3905 virt_dev->udev = NULL; in xhci_free_dev()
3906 xhci_disable_slot(xhci, udev->slot_id); in xhci_free_dev()
3908 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_dev()
3909 xhci_free_virt_device(xhci, udev->slot_id); in xhci_free_dev()
3910 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_dev()
3923 return -ENOMEM; in xhci_disable_slot()
3927 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_slot()
3929 state = readl(&xhci->op_regs->status); in xhci_disable_slot()
3930 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || in xhci_disable_slot()
3931 (xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_disable_slot()
3932 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3934 return -ENODEV; in xhci_disable_slot()
3940 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3945 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3947 wait_for_completion(command->completion); in xhci_disable_slot()
3949 if (command->status != COMP_SUCCESS) in xhci_disable_slot()
3951 slot_id, command->status); in xhci_disable_slot()
3962 * Must be called with xhci->lock held.
3966 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) { in xhci_reserve_host_control_ep_resources()
3970 xhci->num_active_eps, xhci->limit_active_eps); in xhci_reserve_host_control_ep_resources()
3971 return -ENOMEM; in xhci_reserve_host_control_ep_resources()
3973 xhci->num_active_eps += 1; in xhci_reserve_host_control_ep_resources()
3976 xhci->num_active_eps); in xhci_reserve_host_control_ep_resources()
3998 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
4001 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4007 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4009 wait_for_completion(command->completion); in xhci_alloc_dev()
4010 slot_id = command->slot_id; in xhci_alloc_dev()
4012 if (!slot_id || command->status != COMP_SUCCESS) { in xhci_alloc_dev()
4014 xhci_trb_comp_code_string(command->status)); in xhci_alloc_dev()
4017 readl(&xhci->cap_regs->hcs_params1))); in xhci_alloc_dev()
4024 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_alloc_dev()
4025 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
4028 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4031 xhci->num_active_eps); in xhci_alloc_dev()
4034 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4044 vdev = xhci->devs[slot_id]; in xhci_alloc_dev()
4045 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx); in xhci_alloc_dev()
4048 udev->slot_id = slot_id; in xhci_alloc_dev()
4056 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_alloc_dev()
4057 pm_runtime_get_noresume(hcd->self.controller); in xhci_alloc_dev()
4064 xhci_disable_slot(xhci, udev->slot_id); in xhci_alloc_dev()
4065 xhci_free_virt_device(xhci, udev->slot_id); in xhci_alloc_dev()
4071 * xhci_setup_device - issues an Address Device command to assign a unique
4093 mutex_lock(&xhci->mutex); in xhci_setup_device()
4095 if (xhci->xhc_state) { /* dying, removing or halted */ in xhci_setup_device()
4096 ret = -ESHUTDOWN; in xhci_setup_device()
4100 if (!udev->slot_id) { in xhci_setup_device()
4102 "Bad Slot ID %d", udev->slot_id); in xhci_setup_device()
4103 ret = -EINVAL; in xhci_setup_device()
4107 virt_dev = xhci->devs[udev->slot_id]; in xhci_setup_device()
4112 * a zero-dereference was observed once due to virt_dev = 0. in xhci_setup_device()
4116 udev->slot_id); in xhci_setup_device()
4117 ret = -EINVAL; in xhci_setup_device()
4120 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4124 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_setup_device()
4133 ret = -ENOMEM; in xhci_setup_device()
4137 command->in_ctx = virt_dev->in_ctx; in xhci_setup_device()
4138 command->timeout_ms = timeout_ms; in xhci_setup_device()
4140 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_setup_device()
4141 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_setup_device()
4145 ret = -EINVAL; in xhci_setup_device()
4149 * If this is the first Set Address since device plug-in or in xhci_setup_device()
4153 if (!slot_ctx->dev_info) in xhci_setup_device()
4158 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); in xhci_setup_device()
4159 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4161 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4162 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4165 spin_lock_irqsave(&xhci->lock, flags); in xhci_setup_device()
4167 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma, in xhci_setup_device()
4168 udev->slot_id, setup); in xhci_setup_device()
4170 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4176 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4179 wait_for_completion(command->completion); in xhci_setup_device()
4185 switch (command->status) { in xhci_setup_device()
4189 ret = -ETIME; in xhci_setup_device()
4194 act, udev->slot_id); in xhci_setup_device()
4195 ret = -EINVAL; in xhci_setup_device()
4198 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act); in xhci_setup_device()
4200 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4201 ret = xhci_disable_slot(xhci, udev->slot_id); in xhci_setup_device()
4202 xhci_free_virt_device(xhci, udev->slot_id); in xhci_setup_device()
4207 kfree(command->completion); in xhci_setup_device()
4209 return -EPROTO; in xhci_setup_device()
4211 dev_warn(&udev->dev, in xhci_setup_device()
4213 ret = -ENODEV; in xhci_setup_device()
4222 act, command->status); in xhci_setup_device()
4223 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1); in xhci_setup_device()
4224 ret = -EINVAL; in xhci_setup_device()
4229 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_setup_device()
4234 udev->slot_id, in xhci_setup_device()
4235 &xhci->dcbaa->dev_context_ptrs[udev->slot_id], in xhci_setup_device()
4237 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id])); in xhci_setup_device()
4240 (unsigned long long)virt_dev->out_ctx->dma); in xhci_setup_device()
4241 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4242 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4247 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, in xhci_setup_device()
4248 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4250 ctrl_ctx->add_flags = 0; in xhci_setup_device()
4251 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4252 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4253 udev->devaddr = (u8)(le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4257 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4259 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4261 kfree(command->completion); in xhci_setup_device()
4290 return rhub->ports[port1 - 1]->hw_portnum + 1; in xhci_find_raw_port_number()
4309 return -ENOMEM; in xhci_change_max_exit_latency()
4311 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4313 virt_dev = xhci->devs[udev->slot_id]; in xhci_change_max_exit_latency()
4317 * xHC was re-initialized. Exit latency will be set later after in xhci_change_max_exit_latency()
4318 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated in xhci_change_max_exit_latency()
4321 if (!virt_dev || max_exit_latency == virt_dev->current_mel) { in xhci_change_max_exit_latency()
4322 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4328 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_change_max_exit_latency()
4330 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4334 return -ENOMEM; in xhci_change_max_exit_latency()
4337 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx); in xhci_change_max_exit_latency()
4338 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4340 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_change_max_exit_latency()
4341 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_change_max_exit_latency()
4342 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT)); in xhci_change_max_exit_latency()
4343 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency); in xhci_change_max_exit_latency()
4344 slot_ctx->dev_state = 0; in xhci_change_max_exit_latency()
4354 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4355 virt_dev->current_mel = max_exit_latency; in xhci_change_max_exit_latency()
4356 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4378 u2del = HCS_U2_LATENCY(xhci->hcs_params3); in xhci_calculate_hird_besl()
4379 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_hird_besl()
4395 besl_host = (u2del - 51) / 75 + 1; in xhci_calculate_hird_besl()
4413 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_usb2_hw_lpm_params()
4416 l1 = udev->l1_params.timeout / 256; in xhci_calculate_usb2_hw_lpm_params()
4439 if (xhci->quirks & XHCI_HW_LPM_DISABLE) in xhci_set_usb2_hardware_lpm()
4440 return -EPERM; in xhci_set_usb2_hardware_lpm()
4442 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support || in xhci_set_usb2_hardware_lpm()
4443 !udev->lpm_capable) in xhci_set_usb2_hardware_lpm()
4444 return -EPERM; in xhci_set_usb2_hardware_lpm()
4446 if (!udev->parent || udev->parent->parent || in xhci_set_usb2_hardware_lpm()
4447 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_set_usb2_hardware_lpm()
4448 return -EPERM; in xhci_set_usb2_hardware_lpm()
4450 if (udev->usb2_hw_lpm_capable != 1) in xhci_set_usb2_hardware_lpm()
4451 return -EPERM; in xhci_set_usb2_hardware_lpm()
4453 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4455 ports = xhci->usb2_rhub.ports; in xhci_set_usb2_hardware_lpm()
4456 port_num = udev->portnum - 1; in xhci_set_usb2_hardware_lpm()
4457 pm_addr = ports[port_num]->addr + PORTPMSC; in xhci_set_usb2_hardware_lpm()
4459 hlpm_addr = ports[port_num]->addr + PORTHLPMC; in xhci_set_usb2_hardware_lpm()
4466 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4471 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_set_usb2_hardware_lpm()
4476 hird = udev->l1_params.besl; in xhci_set_usb2_hardware_lpm()
4479 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4485 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4496 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id); in xhci_set_usb2_hardware_lpm()
4508 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4509 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4511 readl_poll_timeout(ports[port_num]->addr, pm_val, in xhci_set_usb2_hardware_lpm()
4518 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4529 if (hcd->speed >= HCD_USB3 && !udev->parent->parent) { in xhci_update_device()
4530 port = xhci->usb3_rhub.ports[udev->portnum - 1]; in xhci_update_device()
4532 udev->tunnel_mode = xhci_port_is_tunneled(xhci, port); in xhci_update_device()
4533 if (udev->tunnel_mode == USB_LINK_UNKNOWN) in xhci_update_device()
4534 dev_dbg(&udev->dev, "link tunnel state unknown\n"); in xhci_update_device()
4535 else if (udev->tunnel_mode == USB_LINK_TUNNELED) in xhci_update_device()
4536 dev_dbg(&udev->dev, "tunneled over USB4 link\n"); in xhci_update_device()
4537 else if (udev->tunnel_mode == USB_LINK_NATIVE) in xhci_update_device()
4538 dev_dbg(&udev->dev, "native USB 3.x link\n"); in xhci_update_device()
4542 if (hcd->speed >= HCD_USB3 || !udev->lpm_capable || !xhci->hw_lpm_support) in xhci_update_device()
4545 /* we only support lpm for non-hub device connected to root hub yet */ in xhci_update_device()
4546 if (!udev->parent || udev->parent->parent || in xhci_update_device()
4547 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_update_device()
4550 port = xhci->usb2_rhub.ports[udev->portnum - 1]; in xhci_update_device()
4551 capability = port->port_cap->protocol_caps; in xhci_update_device()
4554 udev->usb2_hw_lpm_capable = 1; in xhci_update_device()
4555 udev->l1_params.timeout = XHCI_L1_TIMEOUT; in xhci_update_device()
4556 udev->l1_params.besl = XHCI_DEFAULT_BESL; in xhci_update_device()
4558 udev->usb2_hw_lpm_besl_capable = 1; in xhci_update_device()
4564 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4566 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4570 return (1ULL << (desc->bInterval - 1)) * 125 * 1000; in xhci_service_interval_to_ns()
4584 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4585 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4590 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4591 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4596 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n", in xhci_get_timeout_no_hub_lpm()
4605 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4609 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4616 * - For control endpoints, U1 system exit latency (SEL) * 3
4617 * - For bulk endpoints, U1 SEL * 5
4618 * - For interrupt endpoints:
4619 * - Notification EPs, U1 SEL * 3
4620 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4621 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4634 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4637 timeout_ns = udev->u1_params.sel * 5; in xhci_calculate_intel_u1_timeout()
4642 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4650 if (timeout_ns < udev->u1_params.sel * 2) in xhci_calculate_intel_u1_timeout()
4651 timeout_ns = udev->u1_params.sel * 2; in xhci_calculate_intel_u1_timeout()
4660 /* Returns the hub-encoded U1 timeout value. */
4669 if (xhci_service_interval_to_ns(desc) <= udev->u1_params.mel) { in xhci_calculate_u1_timeout()
4670 dev_dbg(&udev->dev, "Disable U1, ESIT shorter than exit latency\n"); in xhci_calculate_u1_timeout()
4675 if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_ZHAOXIN_HOST)) in xhci_calculate_u1_timeout()
4678 timeout_ns = udev->u1_params.sel; in xhci_calculate_u1_timeout()
4689 * USB 3.0 hub, we have to disable hub-initiated U1. in xhci_calculate_u1_timeout()
4693 dev_dbg(&udev->dev, "Hub-initiated U1 disabled " in xhci_calculate_u1_timeout()
4699 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4700 * - largest bInterval of any active periodic endpoint (to avoid going
4702 * - the U2 Exit Latency of the device
4717 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL; in xhci_calculate_intel_u2_timeout()
4724 /* Returns the hub-encoded U2 timeout value. */
4733 if (xhci_service_interval_to_ns(desc) <= udev->u2_params.mel) { in xhci_calculate_u2_timeout()
4734 dev_dbg(&udev->dev, "Disable U2, ESIT shorter than exit latency\n"); in xhci_calculate_u2_timeout()
4739 if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_ZHAOXIN_HOST)) in xhci_calculate_u2_timeout()
4742 timeout_ns = udev->u2_params.sel; in xhci_calculate_u2_timeout()
4747 * USB 3.0 hub, we have to disable hub-initiated U2. in xhci_calculate_u2_timeout()
4751 dev_dbg(&udev->dev, "Hub-initiated U2 disabled " in xhci_calculate_u2_timeout()
4781 /* If we found we can't enable hub-initiated LPM, and in xhci_update_timeout_for_endpoint()
4783 * device-initiated LPM as well, then we will disable LPM in xhci_update_timeout_for_endpoint()
4788 return -E2BIG; in xhci_update_timeout_for_endpoint()
4803 for (j = 0; j < alt->desc.bNumEndpoints; j++) { in xhci_update_timeout_for_interface()
4805 &alt->endpoint[j].desc, state, timeout)) in xhci_update_timeout_for_interface()
4806 return -E2BIG; in xhci_update_timeout_for_interface()
4815 struct usb_device *parent = udev->parent; in xhci_check_tier_policy()
4819 parent = parent->parent; in xhci_check_tier_policy()
4823 if (xhci->quirks & XHCI_INTEL_HOST && tier > 3) in xhci_check_tier_policy()
4825 if (xhci->quirks & XHCI_ZHAOXIN_HOST && tier > 2) in xhci_check_tier_policy()
4830 dev_dbg(&udev->dev, "Tier policy prevents U1/U2 LPM states for devices at tier %d\n", in xhci_check_tier_policy()
4832 return -E2BIG; in xhci_check_tier_policy()
4836 * If the tier check or timeout setting functions return with a non-zero exit
4854 dev_warn(&udev->dev, "Can't enable unknown link state %i\n", in xhci_calculate_lpm_timeout()
4862 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc, in xhci_calculate_lpm_timeout()
4866 config = udev->actconfig; in xhci_calculate_lpm_timeout()
4870 for (i = 0; i < config->desc.bNumInterfaces; i++) { in xhci_calculate_lpm_timeout()
4872 struct usb_interface *intf = config->interface[i]; in xhci_calculate_lpm_timeout()
4877 /* Check if any currently bound drivers want hub-initiated LPM in xhci_calculate_lpm_timeout()
4880 if (intf->dev.driver) { in xhci_calculate_lpm_timeout()
4881 driver = to_usb_driver(intf->dev.driver); in xhci_calculate_lpm_timeout()
4882 if (driver && driver->disable_hub_initiated_lpm) { in xhci_calculate_lpm_timeout()
4883 dev_dbg(&udev->dev, "Hub-initiated %s disabled at request of driver %s\n", in xhci_calculate_lpm_timeout()
4884 state_name, driver->name); in xhci_calculate_lpm_timeout()
4893 if (!intf->cur_altsetting) in xhci_calculate_lpm_timeout()
4897 intf->cur_altsetting, in xhci_calculate_lpm_timeout()
4929 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) || in calculate_max_exit_latency()
4931 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000); in calculate_max_exit_latency()
4932 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) || in calculate_max_exit_latency()
4934 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000); in calculate_max_exit_latency()
4940 dev_warn(&udev->dev, "Link PM max exit latency of %lluus " in calculate_max_exit_latency()
4942 return -E2BIG; in calculate_max_exit_latency()
4947 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4958 /* The LPM timeout values are pretty host-controller specific, so don't in xhci_enable_usb3_lpm_timeout()
4959 * enable hub-initiated timeouts unless the vendor has provided in xhci_enable_usb3_lpm_timeout()
4962 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_enable_usb3_lpm_timeout()
4963 !xhci->devs[udev->slot_id]) in xhci_enable_usb3_lpm_timeout()
4970 if (udev->parent && !udev->parent->parent) { in xhci_enable_usb3_lpm_timeout()
4971 port = xhci->usb3_rhub.ports[udev->portnum - 1]; in xhci_enable_usb3_lpm_timeout()
4972 if (port->lpm_incapable) in xhci_enable_usb3_lpm_timeout()
4997 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_disable_usb3_lpm_timeout()
4998 !xhci->devs[udev->slot_id]) in xhci_disable_usb3_lpm_timeout()
5030 /*-------------------------------------------------------------------------*/
5048 if (!hdev->parent) in xhci_update_hub_device()
5051 vdev = xhci->devs[hdev->slot_id]; in xhci_update_hub_device()
5054 return -EINVAL; in xhci_update_hub_device()
5059 return -ENOMEM; in xhci_update_hub_device()
5061 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_update_hub_device()
5066 return -ENOMEM; in xhci_update_hub_device()
5069 spin_lock_irqsave(&xhci->lock, flags); in xhci_update_hub_device()
5070 if (hdev->speed == USB_SPEED_HIGH && in xhci_update_hub_device()
5074 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5075 return -ENOMEM; in xhci_update_hub_device()
5078 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx); in xhci_update_hub_device()
5079 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_update_hub_device()
5080 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx); in xhci_update_hub_device()
5081 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB); in xhci_update_hub_device()
5087 if (tt->multi) in xhci_update_hub_device()
5088 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); in xhci_update_hub_device()
5089 else if (hdev->speed == USB_SPEED_FULL) in xhci_update_hub_device()
5090 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT); in xhci_update_hub_device()
5092 if (xhci->hci_version > 0x95) { in xhci_update_hub_device()
5095 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5096 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild)); in xhci_update_hub_device()
5097 /* Set TT think time - convert from ns to FS bit times. in xhci_update_hub_device()
5102 * High-spped hub. in xhci_update_hub_device()
5104 think_time = tt->think_time; in xhci_update_hub_device()
5106 think_time = (think_time / 666) - 1; in xhci_update_hub_device()
5107 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH) in xhci_update_hub_device()
5108 slot_ctx->tt_info |= in xhci_update_hub_device()
5113 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5115 slot_ctx->dev_state = 0; in xhci_update_hub_device()
5116 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5119 (xhci->hci_version > 0x95) ? in xhci_update_hub_device()
5125 if (xhci->hci_version > 0x95) in xhci_update_hub_device()
5141 return readl(&xhci->run_regs->microframe_index) >> 3; in xhci_get_frame()
5146 xhci->usb2_rhub.hcd = hcd; in xhci_hcd_init_usb2_data()
5147 hcd->speed = HCD_USB2; in xhci_hcd_init_usb2_data()
5148 hcd->self.root_hub->speed = USB_SPEED_HIGH; in xhci_hcd_init_usb2_data()
5154 hcd->has_tt = 1; in xhci_hcd_init_usb2_data()
5164 * is a two digit BCD containig minor and sub-minor numbers. in xhci_hcd_init_usb3_data()
5170 if (xhci->usb3_rhub.min_rev == 0x1) in xhci_hcd_init_usb3_data()
5173 minor_rev = xhci->usb3_rhub.min_rev / 0x10; in xhci_hcd_init_usb3_data()
5177 hcd->speed = HCD_USB32; in xhci_hcd_init_usb3_data()
5178 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_hcd_init_usb3_data()
5179 hcd->self.root_hub->rx_lanes = 2; in xhci_hcd_init_usb3_data()
5180 hcd->self.root_hub->tx_lanes = 2; in xhci_hcd_init_usb3_data()
5181 hcd->self.root_hub->ssp_rate = USB_SSP_GEN_2x2; in xhci_hcd_init_usb3_data()
5184 hcd->speed = HCD_USB31; in xhci_hcd_init_usb3_data()
5185 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_hcd_init_usb3_data()
5186 hcd->self.root_hub->ssp_rate = USB_SSP_GEN_2x1; in xhci_hcd_init_usb3_data()
5192 xhci->usb3_rhub.hcd = hcd; in xhci_hcd_init_usb3_data()
5202 struct device *dev = hcd->self.sysdev; in xhci_gen_setup()
5205 /* Accept arbitrarily long scatter-gather lists */ in xhci_gen_setup()
5206 hcd->self.sg_tablesize = ~0; in xhci_gen_setup()
5209 hcd->self.no_sg_constraint = 1; in xhci_gen_setup()
5212 hcd->self.no_stop_on_short = 1; in xhci_gen_setup()
5221 mutex_init(&xhci->mutex); in xhci_gen_setup()
5222 xhci->main_hcd = hcd; in xhci_gen_setup()
5223 xhci->cap_regs = hcd->regs; in xhci_gen_setup()
5224 xhci->op_regs = hcd->regs + in xhci_gen_setup()
5225 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase)); in xhci_gen_setup()
5226 xhci->run_regs = hcd->regs + in xhci_gen_setup()
5227 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK); in xhci_gen_setup()
5228 /* Cache read-only capability registers */ in xhci_gen_setup()
5229 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1); in xhci_gen_setup()
5230 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2); in xhci_gen_setup()
5231 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3); in xhci_gen_setup()
5232 xhci->hci_version = HC_VERSION(readl(&xhci->cap_regs->hc_capbase)); in xhci_gen_setup()
5233 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params); in xhci_gen_setup()
5234 if (xhci->hci_version > 0x100) in xhci_gen_setup()
5235 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2); in xhci_gen_setup()
5237 /* xhci-plat or xhci-pci might have set max_interrupters already */ in xhci_gen_setup()
5238 if ((!xhci->max_interrupters) || in xhci_gen_setup()
5239 xhci->max_interrupters > HCS_MAX_INTRS(xhci->hcs_params1)) in xhci_gen_setup()
5240 xhci->max_interrupters = HCS_MAX_INTRS(xhci->hcs_params1); in xhci_gen_setup()
5242 xhci->quirks |= quirks; in xhci_gen_setup()
5251 if (xhci->hci_version > 0x96) in xhci_gen_setup()
5252 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; in xhci_gen_setup()
5269 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0) in xhci_gen_setup()
5270 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit in xhci_gen_setup()
5272 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev, in xhci_gen_setup()
5275 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT) in xhci_gen_setup()
5276 xhci->hcc_params &= ~BIT(0); in xhci_gen_setup()
5278 /* Set dma_mask and coherent_dma_mask to 64-bits, in xhci_gen_setup()
5279 * if xHC supports 64-bit addressing */ in xhci_gen_setup()
5280 if (HCC_64BIT_ADDR(xhci->hcc_params) && in xhci_gen_setup()
5282 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n"); in xhci_gen_setup()
5286 * This is to avoid error in cases where a 32-bit USB in xhci_gen_setup()
5287 * controller is used on a 64-bit capable system. in xhci_gen_setup()
5292 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n"); in xhci_gen_setup()
5309 xhci->hcc_params, xhci->hci_version, xhci->quirks); in xhci_gen_setup()
5326 spin_lock_irqsave(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5327 udev = (struct usb_device *)ep->hcpriv; in xhci_clear_tt_buffer_complete()
5328 slot_id = udev->slot_id; in xhci_clear_tt_buffer_complete()
5329 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_clear_tt_buffer_complete()
5331 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_CLEARING_TT; in xhci_clear_tt_buffer_complete()
5333 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5337 .description = "xhci-hcd",
5412 drv->hcd_priv_size += over->extra_priv_size; in xhci_init_driver()
5413 if (over->reset) in xhci_init_driver()
5414 drv->reset = over->reset; in xhci_init_driver()
5415 if (over->start) in xhci_init_driver()
5416 drv->start = over->start; in xhci_init_driver()
5417 if (over->add_endpoint) in xhci_init_driver()
5418 drv->add_endpoint = over->add_endpoint; in xhci_init_driver()
5419 if (over->drop_endpoint) in xhci_init_driver()
5420 drv->drop_endpoint = over->drop_endpoint; in xhci_init_driver()
5421 if (over->check_bandwidth) in xhci_init_driver()
5422 drv->check_bandwidth = over->check_bandwidth; in xhci_init_driver()
5423 if (over->reset_bandwidth) in xhci_init_driver()
5424 drv->reset_bandwidth = over->reset_bandwidth; in xhci_init_driver()
5425 if (over->update_hub_device) in xhci_init_driver()
5426 drv->update_hub_device = over->update_hub_device; in xhci_init_driver()
5427 if (over->hub_control) in xhci_init_driver()
5428 drv->hub_control = over->hub_control; in xhci_init_driver()
5458 return -ENODEV; in xhci_hcd_init()