Lines Matching +full:usb2 +full:- +full:device +full:- +full:4
1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* PORTSC - Port Status and Control Register - port_status_base bitmasks */
4 /* true: device connected */
9 /* true: port has an over-current condition */
12 #define PORT_RESET (1 << 4)
13 /* Port Link State - bits 5:8
34 /* bits 10:13 indicate device speed:
35 * 0 - undefined speed - port hasn't be initialized by a reset yet
36 * 1 - full speed
37 * 2 - low speed
38 * 3 - high speed
39 * 4 - super speed
40 * 5-15 reserved
57 /* Bits 20:23 in the Slot Context are the speed for the device */
68 /* Port Link State Write Strobe - set this when changing link state */
74 /* true: warm reset for a USB 3.0 device is done. A "hot" reset puts the port
75 * into an enabled state, and the device into the default state. A "warm" reset
76 * also resets the link, forcing the device through the link training sequence.
80 /* true: over-current change */
82 /* true: reset change - 1 to 0 transition of PORT_RESET */
84 /* port link status change - set on some port link state transitions:
86 * ------------------------------------------------------------------------------
87 * - U3 to Resume Wakeup signaling from a device
88 * - Resume to Recovery to U0 USB 3.0 device resume
89 * - Resume to U0 USB 2.0 device resume
90 * - U3 to Recovery to U0 Software resume of USB 3.0 device complete
91 * - U3 to U0 Software resume of USB 2.0 device complete
92 * - U2 to U0 L1 resume of USB 2.1 device complete
93 * - U0 to U0 (???) L1 entry rejection by USB 2.1 device
94 * - U0 to disabled L1 entry error with USB 2.1 device
95 * - Any state to inactive Error on USB 3.0 port
98 /* port configure error change - port failed to configure its link partner */
104 /* Cold Attach Status - xHC can set this bit to report device attached during
113 /* wake on over-current (enable) */
116 /* true: device is non-removable - for USB 3.0 roothub emulation */
118 /* Initiate a warm port reset - complete when PORT_WRC is '1' */
121 /* We mark duplicate entries with -1 */
122 #define DUPLICATE_ENTRY ((u8)(-1))
124 /* Port Power Management Status and Control - port_power_base bitmasks */
135 /* USB2 Protocol PORTSPMSC */
139 #define PORT_HIRD(p) (((p) & 0xf) << 4)
140 #define PORT_HIRD_MASK (0xf << 4)
150 /* USB2 Protocol PORTHLPMC */
155 /* use 512 microseconds as USB2 LPM L1 default timeout. */
158 /* Set default HIRD/BESL value to 4 (350/400us) for USB2 L1 LPM resume latency.
159 * Safe to use with mixed HIRD and BESL systems (host and device) and is used
164 * device's resume latency requirements,
165 * e.g. not program values > '4' if BLC = '1' and a HIRD device is attached,
166 * or not program values < '4' if BLC = '0' and a BESL device is attached.
168 #define XHCI_DEFAULT_BESL 4