Lines Matching +full:set +full:- +full:of +full:- +full:ports
1 // SPDX-License-Identifier: GPL-2.0
17 #include "xhci-trace.h"
23 /* Default sublink speed attribute of each lane */
53 bos->bLength = USB_DT_BOS_SIZE; in xhci_create_usb3x_bos_desc()
54 bos->bDescriptorType = USB_DT_BOS; in xhci_create_usb3x_bos_desc()
55 bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE + in xhci_create_usb3x_bos_desc()
57 bos->bNumDeviceCaps = 1; in xhci_create_usb3x_bos_desc()
60 for (i = 0; i < xhci->num_port_caps; i++) { in xhci_create_usb3x_bos_desc()
61 u8 major = xhci->port_caps[i].maj_rev; in xhci_create_usb3x_bos_desc()
62 u8 minor = xhci->port_caps[i].min_rev; in xhci_create_usb3x_bos_desc()
67 port_cap = &xhci->port_caps[i]; in xhci_create_usb3x_bos_desc()
72 if (port_cap->psi_count) { in xhci_create_usb3x_bos_desc()
75 for (i = 0; i < port_cap->psi_count; i++) { in xhci_create_usb3x_bos_desc()
76 if ((port_cap->psi[i] & PLT_MASK) == PLT_SYM) in xhci_create_usb3x_bos_desc()
80 ssac = port_cap->psi_count + num_sym_ssa - 1; in xhci_create_usb3x_bos_desc()
81 ssic = port_cap->psi_uid_count - 1; in xhci_create_usb3x_bos_desc()
88 ssic = (ssac + 1) / 2 - 1; in xhci_create_usb3x_bos_desc()
91 bos->bNumDeviceCaps++; in xhci_create_usb3x_bos_desc()
92 bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE + in xhci_create_usb3x_bos_desc()
102 ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE; in xhci_create_usb3x_bos_desc()
103 ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; in xhci_create_usb3x_bos_desc()
104 ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE; in xhci_create_usb3x_bos_desc()
105 ss_cap->bmAttributes = 0; /* set later */ in xhci_create_usb3x_bos_desc()
106 ss_cap->wSpeedSupported = cpu_to_le16(USB_5GBPS_OPERATION); in xhci_create_usb3x_bos_desc()
107 ss_cap->bFunctionalitySupport = USB_LOW_SPEED_OPERATION; in xhci_create_usb3x_bos_desc()
108 ss_cap->bU1devExitLat = 0; /* set later */ in xhci_create_usb3x_bos_desc()
109 ss_cap->bU2DevExitLat = 0; /* set later */ in xhci_create_usb3x_bos_desc()
111 reg = readl(&xhci->cap_regs->hcc_params); in xhci_create_usb3x_bos_desc()
113 ss_cap->bmAttributes |= USB_LTM_SUPPORT; in xhci_create_usb3x_bos_desc()
115 if ((xhci->quirks & XHCI_LPM_SUPPORT)) { in xhci_create_usb3x_bos_desc()
116 reg = readl(&xhci->cap_regs->hcs_params3); in xhci_create_usb3x_bos_desc()
117 ss_cap->bU1devExitLat = HCS_U1_LATENCY(reg); in xhci_create_usb3x_bos_desc()
118 ss_cap->bU2DevExitLat = cpu_to_le16(HCS_U2_LATENCY(reg)); in xhci_create_usb3x_bos_desc()
121 if (wLength < le16_to_cpu(bos->wTotalLength)) in xhci_create_usb3x_bos_desc()
125 return le16_to_cpu(bos->wTotalLength); in xhci_create_usb3x_bos_desc()
129 ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(ssac); in xhci_create_usb3x_bos_desc()
130 ssp_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; in xhci_create_usb3x_bos_desc()
131 ssp_cap->bDevCapabilityType = USB_SSP_CAP_TYPE; in xhci_create_usb3x_bos_desc()
132 ssp_cap->bReserved = 0; in xhci_create_usb3x_bos_desc()
133 ssp_cap->wReserved = 0; in xhci_create_usb3x_bos_desc()
134 ssp_cap->bmAttributes = in xhci_create_usb3x_bos_desc()
138 if (!port_cap->psi_count) { in xhci_create_usb3x_bos_desc()
140 ssp_cap->bmSublinkSpeedAttr[i] = in xhci_create_usb3x_bos_desc()
148 for (i = 0; i < port_cap->psi_count; i++) { in xhci_create_usb3x_bos_desc()
159 psi = port_cap->psi[i]; in xhci_create_usb3x_bos_desc()
169 /* Shift to Gbps and set SSP Link Protocol if 10Gpbs */ in xhci_create_usb3x_bos_desc()
178 /* Some host controllers don't set the link protocol for SSP */ in xhci_create_usb3x_bos_desc()
183 * PSIM and PSIE represent the total speed of PSI. The BOS in xhci_create_usb3x_bos_desc()
200 u32 prev = port_cap->psi[i - 1]; in xhci_create_usb3x_bos_desc()
226 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
231 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
236 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
241 ssp_cap->bmSublinkSpeedAttr[offset++] = cpu_to_le32(attr); in xhci_create_usb3x_bos_desc()
246 ssp_cap->wFunctionalitySupport = in xhci_create_usb3x_bos_desc()
252 return le16_to_cpu(bos->wTotalLength); in xhci_create_usb3x_bos_desc()
256 struct usb_hub_descriptor *desc, int ports) in xhci_common_hub_descriptor() argument
260 desc->bHubContrCurrent = 0; in xhci_common_hub_descriptor()
262 desc->bNbrPorts = ports; in xhci_common_hub_descriptor()
264 /* Bits 1:0 - support per-port power switching, or power always on */ in xhci_common_hub_descriptor()
265 if (HCC_PPC(xhci->hcc_params)) in xhci_common_hub_descriptor()
269 /* Bit 2 - root hubs are not part of a compound device */ in xhci_common_hub_descriptor()
270 /* Bits 4:3 - individual port over current protection */ in xhci_common_hub_descriptor()
272 /* Bits 6:5 - no TTs in root ports */ in xhci_common_hub_descriptor()
273 /* Bit 7 - no port indicators */ in xhci_common_hub_descriptor()
274 desc->wHubCharacteristics = cpu_to_le16(temp); in xhci_common_hub_descriptor()
281 int ports; in xhci_usb2_hub_descriptor() local
288 rhub = &xhci->usb2_rhub; in xhci_usb2_hub_descriptor()
289 ports = rhub->num_ports; in xhci_usb2_hub_descriptor()
290 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb2_hub_descriptor()
291 desc->bDescriptorType = USB_DT_HUB; in xhci_usb2_hub_descriptor()
292 temp = 1 + (ports / 8); in xhci_usb2_hub_descriptor()
293 desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp; in xhci_usb2_hub_descriptor()
294 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.8 says 20ms */ in xhci_usb2_hub_descriptor()
297 * If the port doesn't exist within that byte, the bit is set to 0. in xhci_usb2_hub_descriptor()
300 for (i = 0; i < ports; i++) { in xhci_usb2_hub_descriptor()
301 portsc = readl(rhub->ports[i]->addr); in xhci_usb2_hub_descriptor()
306 /* This math is hairy because bit 0 of DeviceRemovable in xhci_usb2_hub_descriptor()
313 * ports on it. The USB 2.0 specification says that there are two in xhci_usb2_hub_descriptor()
314 * variable length fields at the end of the hub descriptor: in xhci_usb2_hub_descriptor()
316 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array in xhci_usb2_hub_descriptor()
317 * to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to in xhci_usb2_hub_descriptor()
319 * PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each in xhci_usb2_hub_descriptor()
320 * set of ports that actually exist. in xhci_usb2_hub_descriptor()
322 memset(desc->u.hs.DeviceRemovable, 0xff, in xhci_usb2_hub_descriptor()
323 sizeof(desc->u.hs.DeviceRemovable)); in xhci_usb2_hub_descriptor()
324 memset(desc->u.hs.PortPwrCtrlMask, 0xff, in xhci_usb2_hub_descriptor()
325 sizeof(desc->u.hs.PortPwrCtrlMask)); in xhci_usb2_hub_descriptor()
327 for (i = 0; i < (ports + 1 + 7) / 8; i++) in xhci_usb2_hub_descriptor()
328 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i], in xhci_usb2_hub_descriptor()
336 int ports; in xhci_usb3_hub_descriptor() local
342 rhub = &xhci->usb3_rhub; in xhci_usb3_hub_descriptor()
343 ports = rhub->num_ports; in xhci_usb3_hub_descriptor()
344 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb3_hub_descriptor()
345 desc->bDescriptorType = USB_DT_SS_HUB; in xhci_usb3_hub_descriptor()
346 desc->bDescLength = USB_DT_SS_HUB_SIZE; in xhci_usb3_hub_descriptor()
347 desc->bPwrOn2PwrGood = 50; /* usb 3.1 may fail if less than 100ms */ in xhci_usb3_hub_descriptor()
352 desc->u.ss.bHubHdrDecLat = 0; in xhci_usb3_hub_descriptor()
353 desc->u.ss.wHubDelay = 0; in xhci_usb3_hub_descriptor()
357 for (i = 0; i < ports; i++) { in xhci_usb3_hub_descriptor()
358 portsc = readl(rhub->ports[i]->addr); in xhci_usb3_hub_descriptor()
363 desc->u.ss.DeviceRemovable = cpu_to_le16(port_removable); in xhci_usb3_hub_descriptor()
370 if (hcd->speed >= HCD_USB3) in xhci_hub_descriptor()
394 * connect status, over-current status, port speed, and device removable.
395 * connect status and port speed are also sticky - meaning they're in
414 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
415 * over-current, reset, link state, and L1 change
430 * xhci_port_state_to_neutral() - Clean up read portsc value back into writeable
446 /* Save read-only status and port state */ in xhci_port_state_to_neutral()
455 * suspend will set to 1, if suspend bit need to set in command.
466 virt_dev = xhci->devs[slot_id]; in xhci_stop_device()
468 return -ENODEV; in xhci_stop_device()
474 return -ENOMEM; in xhci_stop_device()
476 spin_lock_irqsave(&xhci->lock, flags); in xhci_stop_device()
477 for (i = LAST_EP_INDEX; i > 0; i--) { in xhci_stop_device()
478 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue) { in xhci_stop_device()
482 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->out_ctx, i); in xhci_stop_device()
490 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
491 ret = -ENOMEM; in xhci_stop_device()
498 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
506 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
511 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_device()
514 wait_for_completion(cmd->completion); in xhci_stop_device()
516 if (cmd->status == COMP_COMMAND_ABORTED || in xhci_stop_device()
517 cmd->status == COMP_COMMAND_RING_STOPPED) { in xhci_stop_device()
519 ret = -ETIME; in xhci_stop_device()
536 ep = &xhci->devs[slot_id]->eps[i]; in xhci_ring_device()
538 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_ring_device()
539 for (s = 1; s < ep->stream_info->num_streams; s++) in xhci_ring_device()
541 } else if (ep->ring && ep->ring->dequeue) { in xhci_ring_device()
554 hcd = port->rhub->hcd; in xhci_disable_port()
556 /* Don't allow the USB core to disable SuperSpeed ports. */ in xhci_disable_port()
557 if (hcd->speed >= HCD_USB3) { in xhci_disable_port()
562 if (xhci->quirks & XHCI_BROKEN_PORT_PED) { in xhci_disable_port()
568 portsc = readl(port->addr); in xhci_disable_port()
572 writel(portsc | PORT_PE, port->addr); in xhci_disable_port()
574 portsc = readl(port->addr); in xhci_disable_port()
575 xhci_dbg(xhci, "disable port %d-%d, portsc: 0x%x\n", in xhci_disable_port()
576 hcd->self.busnum, port->hcd_portnum + 1, portsc); in xhci_disable_port()
600 port_change_bit = "over-current"; in xhci_clear_port_change_bit()
634 if (hcd->speed >= HCD_USB3) in xhci_get_rhub()
635 return &xhci->usb3_rhub; in xhci_get_rhub()
636 return &xhci->usb2_rhub; in xhci_get_rhub()
640 * xhci_set_port_power() must be called with xhci->lock held.
641 * It will release and re-aquire the lock while calling ACPI
646 __must_hold(&xhci->lock) in xhci_set_port_power()
651 hcd = port->rhub->hcd; in xhci_set_port_power()
652 temp = readl(port->addr); in xhci_set_port_power()
654 xhci_dbg(xhci, "set port power %d-%d %s, portsc: 0x%x\n", in xhci_set_port_power()
655 hcd->self.busnum, port->hcd_portnum + 1, on ? "ON" : "OFF", temp); in xhci_set_port_power()
661 writel(temp | PORT_POWER, port->addr); in xhci_set_port_power()
662 readl(port->addr); in xhci_set_port_power()
665 writel(temp & ~PORT_POWER, port->addr); in xhci_set_port_power()
668 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_set_port_power()
669 temp = usb_acpi_power_manageable(hcd->self.root_hub, in xhci_set_port_power()
670 port->hcd_portnum); in xhci_set_port_power()
672 usb_acpi_set_power_state(hcd->self.root_hub, in xhci_set_port_power()
673 port->hcd_portnum, on); in xhci_set_port_power()
674 spin_lock_irqsave(&xhci->lock, *flags); in xhci_set_port_power()
683 /* xhci only supports test mode for usb2 ports */ in xhci_port_set_test_mode()
684 port = xhci->usb2_rhub.ports[wIndex]; in xhci_port_set_test_mode()
685 temp = readl(port->addr + PORTPMSC); in xhci_port_set_test_mode()
687 writel(temp, port->addr + PORTPMSC); in xhci_port_set_test_mode()
688 xhci->test_mode = test_mode; in xhci_port_set_test_mode()
695 __must_hold(&xhci->lock) in xhci_enter_test_mode()
701 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_enter_test_mode()
702 for (i = 1; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) { in xhci_enter_test_mode()
703 if (!xhci->devs[i]) in xhci_enter_test_mode()
712 spin_lock_irqsave(&xhci->lock, *flags); in xhci_enter_test_mode()
713 /* Put all ports to the Disable state by clear PP */ in xhci_enter_test_mode()
715 /* Power off USB3 ports*/ in xhci_enter_test_mode()
716 for (i = 0; i < xhci->usb3_rhub.num_ports; i++) in xhci_enter_test_mode()
717 xhci_set_port_power(xhci, xhci->usb3_rhub.ports[i], false, flags); in xhci_enter_test_mode()
718 /* Power off USB2 ports*/ in xhci_enter_test_mode()
719 for (i = 0; i < xhci->usb2_rhub.num_ports; i++) in xhci_enter_test_mode()
720 xhci_set_port_power(xhci, xhci->usb2_rhub.ports[i], false, flags); in xhci_enter_test_mode()
727 pm_runtime_forbid(xhci_to_hcd(xhci)->self.controller); in xhci_enter_test_mode()
728 /* Set PORTPMSC.PTC field to enter selected test mode */ in xhci_enter_test_mode()
740 if (!xhci->test_mode) { in xhci_exit_test_mode()
744 if (xhci->test_mode == USB_TEST_FORCE_ENABLE && in xhci_exit_test_mode()
745 !(xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_exit_test_mode()
750 pm_runtime_allow(xhci_to_hcd(xhci)->self.controller); in xhci_exit_test_mode()
751 xhci->test_mode = 0; in xhci_exit_test_mode()
756 * xhci_port_is_tunneled() - Check if USB3 connection is tunneled over USB4
766 * Return: link tunnel mode enum, USB_LINK_UNKNOWN if host is incapable of
776 base = &xhci->cap_regs->hc_capbase; in xhci_port_is_tunneled()
780 offset = XHCI_INTEL_SPR_ESS_PORT_OFFSET + port->hcd_portnum * 0x20; in xhci_port_is_tunneled()
797 portsc = readl(port->addr); in xhci_set_link_state()
801 writel(temp, port->addr); in xhci_set_link_state()
803 xhci_dbg(xhci, "Set port %d-%d link state, portsc: 0x%x, write 0x%x", in xhci_set_link_state()
804 port->rhub->hcd->self.busnum, port->hcd_portnum + 1, in xhci_set_link_state()
813 temp = readl(port->addr); in xhci_set_remote_wake_mask()
831 writel(temp, port->addr); in xhci_set_remote_wake_mask()
840 temp = readl(port->addr); in xhci_test_and_clear_bit()
844 writel(temp, port->addr); in xhci_test_and_clear_bit()
854 /* When the CAS bit is set then warm reset in xhci_hub_report_usb3_link_state()
858 /* The CAS bit can be set while the port is in xhci_hub_report_usb3_link_state()
869 /* Return also connection bit - in xhci_hub_report_usb3_link_state()
871 * when this bit is set. in xhci_hub_report_usb3_link_state()
886 * If CAS bit isn't set but the Port is already at in xhci_hub_report_usb3_link_state()
891 * caused by a delay on the host-device negotiation. in xhci_hub_report_usb3_link_state()
893 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_hub_report_usb3_link_state()
905 * This Function verifies if all xhc USB3 ports have entered U0, if so,
912 u32 all_ports_seen_u0 = ((1 << xhci->usb3_rhub.num_ports) - 1); in xhci_del_comp_mod_timer()
915 if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK)) in xhci_del_comp_mod_timer()
918 if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) { in xhci_del_comp_mod_timer()
919 xhci->port_status_u0 |= 1 << wIndex; in xhci_del_comp_mod_timer()
920 if (xhci->port_status_u0 == all_ports_seen_u0) { in xhci_del_comp_mod_timer()
921 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_del_comp_mod_timer()
923 "All USB3 ports have entered U0 already!"); in xhci_del_comp_mod_timer()
939 hcd = port->rhub->hcd; in xhci_handle_usb2_port_link_resume()
940 bus_state = &port->rhub->bus_state; in xhci_handle_usb2_port_link_resume()
942 wIndex = port->hcd_portnum; in xhci_handle_usb2_port_link_resume()
945 return -EINVAL; in xhci_handle_usb2_port_link_resume()
948 if (!port->resume_timestamp) { in xhci_handle_usb2_port_link_resume()
950 if (test_bit(wIndex, &bus_state->resuming_ports)) { in xhci_handle_usb2_port_link_resume()
964 set_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
965 port->resume_timestamp = timeout; in xhci_handle_usb2_port_link_resume()
966 mod_timer(&hcd->rh_timer, timeout); in xhci_handle_usb2_port_link_resume()
967 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
970 } else if (time_after_eq(jiffies, port->resume_timestamp)) { in xhci_handle_usb2_port_link_resume()
973 xhci_dbg(xhci, "resume USB2 port %d-%d\n", in xhci_handle_usb2_port_link_resume()
974 hcd->self.busnum, wIndex + 1); in xhci_handle_usb2_port_link_resume()
976 port->resume_timestamp = 0; in xhci_handle_usb2_port_link_resume()
977 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_handle_usb2_port_link_resume()
979 reinit_completion(&port->rexit_done); in xhci_handle_usb2_port_link_resume()
980 port->rexit_active = true; in xhci_handle_usb2_port_link_resume()
985 spin_unlock_irqrestore(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
987 &port->rexit_done, in xhci_handle_usb2_port_link_resume()
989 spin_lock_irqsave(&xhci->lock, *flags); in xhci_handle_usb2_port_link_resume()
992 if (!port->slot_id) { in xhci_handle_usb2_port_link_resume()
994 return -ENODEV; in xhci_handle_usb2_port_link_resume()
996 xhci_ring_device(xhci, port->slot_id); in xhci_handle_usb2_port_link_resume()
998 int port_status = readl(port->addr); in xhci_handle_usb2_port_link_resume()
1000 xhci_warn(xhci, "Port resume timed out, port %d-%d: 0x%x\n", in xhci_handle_usb2_port_link_resume()
1001 hcd->self.busnum, wIndex + 1, port_status); in xhci_handle_usb2_port_link_resume()
1003 * keep rexit_active set if U0 transition failed so we in xhci_handle_usb2_port_link_resume()
1006 * out of RESUME/U3 state in xhci_handle_usb2_port_link_resume()
1010 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_handle_usb2_port_link_resume()
1011 bus_state->port_c_suspend |= 1 << wIndex; in xhci_handle_usb2_port_link_resume()
1012 bus_state->suspended_ports &= ~(1 << wIndex); in xhci_handle_usb2_port_link_resume()
1023 /* only support rx and tx lane counts of 1 in usb3.1 spec */ in xhci_get_ext_port_status()
1043 bus_state = &port->rhub->bus_state; in xhci_get_usb3_port_status()
1044 xhci = hcd_to_xhci(port->rhub->hcd); in xhci_get_usb3_port_status()
1045 hcd = port->rhub->hcd; in xhci_get_usb3_port_status()
1047 portnum = port->hcd_portnum; in xhci_get_usb3_port_status()
1074 if (bus_state->port_remote_wakeup & (1 << portnum)) { in xhci_get_usb3_port_status()
1075 bus_state->port_remote_wakeup &= ~(1 << portnum); in xhci_get_usb3_port_status()
1076 usb_hcd_end_port_resume(&hcd->self, portnum); in xhci_get_usb3_port_status()
1078 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb3_port_status()
1093 bus_state = &port->rhub->bus_state; in xhci_get_usb2_port_status()
1095 portnum = port->hcd_portnum; in xhci_get_usb2_port_status()
1107 if (bus_state->suspended_ports & (1 << portnum)) { in xhci_get_usb2_port_status()
1108 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb2_port_status()
1109 bus_state->port_c_suspend |= 1 << portnum; in xhci_get_usb2_port_status()
1117 else if (port->resume_timestamp || port->rexit_active) in xhci_get_usb2_port_status()
1128 if (port->resume_timestamp || in xhci_get_usb2_port_status()
1129 test_bit(portnum, &bus_state->resuming_ports)) { in xhci_get_usb2_port_status()
1130 port->resume_timestamp = 0; in xhci_get_usb2_port_status()
1131 clear_bit(portnum, &bus_state->resuming_ports); in xhci_get_usb2_port_status()
1132 usb_hcd_end_port_resume(&port->rhub->hcd->self, portnum); in xhci_get_usb2_port_status()
1134 port->rexit_active = 0; in xhci_get_usb2_port_status()
1135 bus_state->suspended_ports &= ~(1 << portnum); in xhci_get_usb2_port_status()
1144 * - Mark a port as being done with device resume,
1146 * - Stop the Synopsys redriver Compliance Mode polling.
1147 * - Drop and reacquire the xHCI lock, in order to wait for port resume.
1153 __releases(&xhci->lock) in xhci_get_port_status()
1154 __acquires(&xhci->lock) in xhci_get_port_status()
1161 port = rhub->ports[wIndex]; in xhci_get_port_status()
1186 if (hcd->speed >= HCD_USB3) in xhci_get_port_status()
1192 if (bus_state->port_c_suspend & (1 << wIndex)) in xhci_get_port_status()
1212 struct xhci_port **ports; in xhci_hub_control() local
1217 ports = rhub->ports; in xhci_hub_control()
1218 max_ports = rhub->num_ports; in xhci_hub_control()
1219 bus_state = &rhub->bus_state; in xhci_hub_control()
1222 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1225 /* No power source, over-current reported per port */ in xhci_hub_control()
1233 if (hcd->speed >= HCD_USB3 && in xhci_hub_control()
1247 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1251 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1257 wIndex--; in xhci_hub_control()
1258 port = ports[portnum1 - 1]; in xhci_hub_control()
1259 temp = readl(port->addr); in xhci_hub_control()
1262 retval = -ENODEV; in xhci_hub_control()
1271 xhci_dbg(xhci, "Get port status %d-%d read: 0x%x, return 0x%x", in xhci_hub_control()
1272 hcd->self.busnum, portnum1, temp, status); in xhci_hub_control()
1279 if (hcd->speed < HCD_USB31 || wLength != 8) { in xhci_hub_control()
1281 retval = -EINVAL; in xhci_hub_control()
1284 port_li = readl(port->addr + PORTLI); in xhci_hub_control()
1296 /* The MSB of wIndex is the U1/U2 timeout */ in xhci_hub_control()
1303 port = ports[portnum1 - 1]; in xhci_hub_control()
1304 wIndex--; in xhci_hub_control()
1305 temp = readl(port->addr); in xhci_hub_control()
1308 retval = -ENODEV; in xhci_hub_control()
1315 temp = readl(port->addr); in xhci_hub_control()
1319 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1321 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1327 temp = readl(port->addr); in xhci_hub_control()
1330 xhci_warn(xhci, "USB core suspending port %d-%d not in U0/U1/U2\n", in xhci_hub_control()
1331 hcd->self.busnum, portnum1); in xhci_hub_control()
1335 if (!port->slot_id) { in xhci_hub_control()
1340 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1341 xhci_stop_device(xhci, port->slot_id, 1); in xhci_hub_control()
1342 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1346 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1348 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1350 temp = readl(port->addr); in xhci_hub_control()
1351 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1354 temp = readl(port->addr); in xhci_hub_control()
1357 xhci_dbg(xhci, "Disable port %d-%d\n", in xhci_hub_control()
1358 hcd->self.busnum, portnum1); in xhci_hub_control()
1367 writel(temp | PORT_PE, port->addr); in xhci_hub_control()
1368 temp = readl(port->addr); in xhci_hub_control()
1374 xhci_dbg(xhci, "Enable port %d-%d\n", in xhci_hub_control()
1375 hcd->self.busnum, portnum1); in xhci_hub_control()
1377 temp = readl(port->addr); in xhci_hub_control()
1386 * software visible). This flag is set by writing 0xA in xhci_hub_control()
1392 * flag is set, otherwise, the compliance substate is in xhci_hub_control()
1396 if (!HCC2_CTC(xhci->hcc_params2)) { in xhci_hub_control()
1402 xhci_warn(xhci, "Can't set compliance mode when port is connected\n"); in xhci_hub_control()
1406 xhci_dbg(xhci, "Enable compliance mode transition for port %d-%d\n", in xhci_hub_control()
1407 hcd->self.busnum, portnum1); in xhci_hub_control()
1410 temp = readl(port->addr); in xhci_hub_control()
1415 retval = -ENODEV; in xhci_hub_control()
1418 /* Can't set port link state above '3' (U3) */ in xhci_hub_control()
1420 xhci_warn(xhci, "Cannot set port %d-%d link state %d\n", in xhci_hub_control()
1421 hcd->self.busnum, portnum1, link_state); in xhci_hub_control()
1426 * set link to U0, steps depend on current link state. in xhci_hub_control()
1427 * U3: set link to U0 and wait for u3exit completion. in xhci_hub_control()
1428 * U1/U2: no PLC complete event, only set link to U0. in xhci_hub_control()
1443 reinit_completion(&port->u3exit_done); in xhci_hub_control()
1452 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1453 if (!wait_for_completion_timeout(&port->u3exit_done, in xhci_hub_control()
1455 xhci_dbg(xhci, "missing U0 port change event for port %d-%d\n", in xhci_hub_control()
1456 hcd->self.busnum, portnum1); in xhci_hub_control()
1457 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1458 temp = readl(port->addr); in xhci_hub_control()
1464 if (port->slot_id) { in xhci_hub_control()
1467 spin_unlock_irqrestore(&xhci->lock, in xhci_hub_control()
1469 xhci_stop_device(xhci, port->slot_id, 1); in xhci_hub_control()
1470 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1473 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1474 while (retries--) { in xhci_hub_control()
1476 temp = readl(port->addr); in xhci_hub_control()
1480 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1481 temp = readl(port->addr); in xhci_hub_control()
1482 bus_state->suspended_ports |= 1 << wIndex; in xhci_hub_control()
1487 * Turn on ports, even if there isn't per-port switching. in xhci_hub_control()
1488 * HC will report connect events even before this is set. in xhci_hub_control()
1496 writel(temp, port->addr); in xhci_hub_control()
1498 temp = readl(port->addr); in xhci_hub_control()
1499 xhci_dbg(xhci, "set port reset, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1500 hcd->self.busnum, portnum1, temp); in xhci_hub_control()
1504 temp = readl(port->addr); in xhci_hub_control()
1505 xhci_dbg(xhci, "set port remote wake mask, actual port %d-%d status = 0x%x\n", in xhci_hub_control()
1506 hcd->self.busnum, portnum1, temp); in xhci_hub_control()
1510 writel(temp, port->addr); in xhci_hub_control()
1511 temp = readl(port->addr); in xhci_hub_control()
1514 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1516 temp = readl(port->addr + PORTPMSC); in xhci_hub_control()
1519 writel(temp, port->addr + PORTPMSC); in xhci_hub_control()
1522 if (hcd->speed < HCD_USB3) in xhci_hub_control()
1524 temp = readl(port->addr + PORTPMSC); in xhci_hub_control()
1527 writel(temp, port->addr + PORTPMSC); in xhci_hub_control()
1531 if (hcd->speed != HCD_USB2) in xhci_hub_control()
1543 temp = readl(port->addr); in xhci_hub_control()
1549 port = ports[portnum1 - 1]; in xhci_hub_control()
1551 wIndex--; in xhci_hub_control()
1552 temp = readl(port->addr); in xhci_hub_control()
1555 retval = -ENODEV; in xhci_hub_control()
1562 temp = readl(port->addr); in xhci_hub_control()
1571 set_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1572 usb_hcd_start_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1574 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1576 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_control()
1578 clear_bit(wIndex, &bus_state->resuming_ports); in xhci_hub_control()
1579 usb_hcd_end_port_resume(&hcd->self, wIndex); in xhci_hub_control()
1581 bus_state->port_c_suspend |= 1 << wIndex; in xhci_hub_control()
1583 if (!port->slot_id) { in xhci_hub_control()
1587 xhci_ring_device(xhci, port->slot_id); in xhci_hub_control()
1590 bus_state->port_c_suspend &= ~(1 << wIndex); in xhci_hub_control()
1600 port->addr, temp); in xhci_hub_control()
1618 retval = -EPIPE; in xhci_hub_control()
1620 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_control()
1626 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
1627 * Ports are 0-indexed from the HCD point of view,
1628 * and 1-indexed from the USB core pointer of view.
1644 struct xhci_port **ports; in xhci_hub_status_data() local
1647 ports = rhub->ports; in xhci_hub_status_data()
1648 max_ports = rhub->num_ports; in xhci_hub_status_data()
1649 bus_state = &rhub->bus_state; in xhci_hub_status_data()
1656 * Inform the usbcore about resume-in-progress by returning in xhci_hub_status_data()
1657 * a non-zero value even if there are no status changes. in xhci_hub_status_data()
1659 spin_lock_irqsave(&xhci->lock, flags); in xhci_hub_status_data()
1661 status = bus_state->resuming_ports; in xhci_hub_status_data()
1667 if (xhci->run_graceperiod) { in xhci_hub_status_data()
1668 if (time_before(jiffies, xhci->run_graceperiod)) in xhci_hub_status_data()
1671 xhci->run_graceperiod = 0; in xhci_hub_status_data()
1676 /* For each port, did anything change? If so, set that bit in buf. */ in xhci_hub_status_data()
1678 temp = readl(ports[i]->addr); in xhci_hub_status_data()
1681 retval = -ENODEV; in xhci_hub_status_data()
1684 trace_xhci_hub_status_data(ports[i], temp); in xhci_hub_status_data()
1687 (bus_state->port_c_suspend & 1 << i) || in xhci_hub_status_data()
1688 (ports[i]->resume_timestamp && time_after_eq( in xhci_hub_status_data()
1689 jiffies, ports[i]->resume_timestamp))) { in xhci_hub_status_data()
1700 __func__, hcd->self.busnum); in xhci_hub_status_data()
1701 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_hub_status_data()
1703 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_hub_status_data()
1716 struct xhci_port **ports; in xhci_bus_suspend() local
1721 ports = rhub->ports; in xhci_bus_suspend()
1722 max_ports = rhub->num_ports; in xhci_bus_suspend()
1723 bus_state = &rhub->bus_state; in xhci_bus_suspend()
1724 wake_enabled = hcd->self.root_hub->do_remote_wakeup; in xhci_bus_suspend()
1726 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1729 if (bus_state->resuming_ports || /* USB2 */ in xhci_bus_suspend()
1730 bus_state->port_remote_wakeup) { /* USB3 */ in xhci_bus_suspend()
1731 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1733 hcd->self.busnum); in xhci_bus_suspend()
1734 return -EBUSY; in xhci_bus_suspend()
1738 * Prepare ports for suspend, but don't write anything before all ports in xhci_bus_suspend()
1741 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1743 while (port_index--) { in xhci_bus_suspend()
1747 t1 = readl(ports[port_index]->addr); in xhci_bus_suspend()
1755 if ((hcd->speed >= HCD_USB3) && retries-- && in xhci_bus_suspend()
1757 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1759 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1760 xhci_dbg(xhci, "port %d-%d polling in bus suspend, waiting\n", in xhci_bus_suspend()
1761 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1764 /* bail out if port detected a over-current condition */ in xhci_bus_suspend()
1766 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1767 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1768 xhci_dbg(xhci, "Bus suspend bailout, port over-current detected\n"); in xhci_bus_suspend()
1769 return -EBUSY; in xhci_bus_suspend()
1771 /* suspend ports in U0, or bail out for new connect changes */ in xhci_bus_suspend()
1774 bus_state->bus_suspended = 0; in xhci_bus_suspend()
1775 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1777 return -EBUSY; in xhci_bus_suspend()
1779 xhci_dbg(xhci, "port %d-%d not suspended\n", in xhci_bus_suspend()
1780 hcd->self.busnum, port_index + 1); in xhci_bus_suspend()
1783 set_bit(port_index, &bus_state->bus_suspended); in xhci_bus_suspend()
1798 if ((xhci->quirks & XHCI_U2_DISABLE_WAKE) && in xhci_bus_suspend()
1799 (hcd->speed < HCD_USB3)) { in xhci_bus_suspend()
1800 if (usb_amd_pt_check_port(hcd->self.controller, in xhci_bus_suspend()
1812 /* write port settings, stopping and suspending ports if needed */ in xhci_bus_suspend()
1814 while (port_index--) { in xhci_bus_suspend()
1817 if (test_bit(port_index, &bus_state->bus_suspended)) { in xhci_bus_suspend()
1818 int slot_id = ports[port_index]->slot_id; in xhci_bus_suspend()
1820 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1822 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_suspend()
1825 writel(portsc_buf[port_index], ports[port_index]->addr); in xhci_bus_suspend()
1827 hcd->state = HC_STATE_SUSPENDED; in xhci_bus_suspend()
1828 bus_state->next_statechange = jiffies + msecs_to_jiffies(10); in xhci_bus_suspend()
1829 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_suspend()
1831 if (bus_state->bus_suspended) in xhci_bus_suspend()
1838 * Workaround for missing Cold Attach Status (CAS) if device re-plugged in S3.
1840 * See Intel 100/c230 series PCH specification update Doc #332692-006 Errata #8
1846 portsc = readl(port->addr); in xhci_port_missing_cas_quirk()
1848 /* if any of these are set we are not stuck */ in xhci_port_missing_cas_quirk()
1859 writel(portsc, port->addr); in xhci_port_missing_cas_quirk()
1861 readl(port->addr); in xhci_port_missing_cas_quirk()
1875 struct xhci_port **ports; in xhci_bus_resume() local
1878 ports = rhub->ports; in xhci_bus_resume()
1879 max_ports = rhub->num_ports; in xhci_bus_resume()
1880 bus_state = &rhub->bus_state; in xhci_bus_resume()
1882 if (time_before(jiffies, bus_state->next_statechange)) in xhci_bus_resume()
1885 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1887 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1888 return -ESHUTDOWN; in xhci_bus_resume()
1892 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1894 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1896 /* bus specific resume for ports we suspended at bus_suspend */ in xhci_bus_resume()
1897 if (hcd->speed >= HCD_USB3) in xhci_bus_resume()
1903 while (port_index--) { in xhci_bus_resume()
1904 portsc = readl(ports[port_index]->addr); in xhci_bus_resume()
1906 /* warm reset CAS limited ports stuck in polling/compliance */ in xhci_bus_resume()
1907 if ((xhci->quirks & XHCI_MISSING_CAS) && in xhci_bus_resume()
1908 (hcd->speed >= HCD_USB3) && in xhci_bus_resume()
1909 xhci_port_missing_cas_quirk(ports[port_index])) { in xhci_bus_resume()
1910 xhci_dbg(xhci, "reset stuck port %d-%d\n", in xhci_bus_resume()
1911 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1912 clear_bit(port_index, &bus_state->bus_suspended); in xhci_bus_resume()
1916 if (test_bit(port_index, &bus_state->bus_suspended)) in xhci_bus_resume()
1929 &bus_state->bus_suspended); in xhci_bus_resume()
1932 /* disable wake for all ports, write new link state if needed */ in xhci_bus_resume()
1934 writel(portsc, ports[port_index]->addr); in xhci_bus_resume()
1938 if (hcd->speed < HCD_USB3) { in xhci_bus_resume()
1939 if (bus_state->bus_suspended) { in xhci_bus_resume()
1940 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1942 spin_lock_irqsave(&xhci->lock, flags); in xhci_bus_resume()
1944 for_each_set_bit(port_index, &bus_state->bus_suspended, in xhci_bus_resume()
1947 xhci_test_and_clear_bit(xhci, ports[port_index], in xhci_bus_resume()
1949 xhci_set_link_state(xhci, ports[port_index], XDEV_U0); in xhci_bus_resume()
1954 for_each_set_bit(port_index, &bus_state->bus_suspended, BITS_PER_LONG) { in xhci_bus_resume()
1955 sret = xhci_handshake(ports[port_index]->addr, PORT_PLC, in xhci_bus_resume()
1958 xhci_warn(xhci, "port %d-%d resume PLC timeout\n", in xhci_bus_resume()
1959 hcd->self.busnum, port_index + 1); in xhci_bus_resume()
1962 xhci_test_and_clear_bit(xhci, ports[port_index], PORT_PLC); in xhci_bus_resume()
1963 if (ports[port_index]->slot_id) in xhci_bus_resume()
1964 xhci_ring_device(xhci, ports[port_index]->slot_id); in xhci_bus_resume()
1966 (void) readl(&xhci->op_regs->command); in xhci_bus_resume()
1968 bus_state->next_statechange = jiffies + msecs_to_jiffies(5); in xhci_bus_resume()
1969 /* re-enable irqs */ in xhci_bus_resume()
1970 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1972 writel(temp, &xhci->op_regs->command); in xhci_bus_resume()
1973 temp = readl(&xhci->op_regs->command); in xhci_bus_resume()
1975 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_bus_resume()
1984 return rhub->bus_state.resuming_ports; /* USB2 ports only */ in xhci_get_resuming_ports()