usb/host/ehci.h

111 struct ehci_hcd {			/* one per controller */  struct
113 	enum ehci_hrtimer_event	next_hrtimer_event;
114 	unsigned		enabled_hrtimer_events;
115 	ktime_t			hr_timeouts[EHCI_HRTIMER_NUM_EVENTS];
116 	struct hrtimer		hrtimer;
118 	int			PSS_poll_count;
119 	int			ASS_poll_count;
120 	int			died_poll_count;
123 	struct ehci_caps __iomem *caps;
124 	struct ehci_regs __iomem *regs;
125 	struct ehci_dbg_port __iomem *debug;
127 	__u32			hcs_params;	/* cached register copy */
128 	spinlock_t		lock;
129 	enum ehci_rh_state	rh_state;
132 	bool			scanning:1;
133 	bool			need_rescan:1;
134 	bool			intr_unlinking:1;
135 	bool			iaa_in_progress:1;
136 	bool			async_unlinking:1;
137 	bool			shutdown:1;
138 	struct ehci_qh		*qh_scan_next;
141 	struct ehci_qh		*async;
142 	struct ehci_qh		*dummy;		/* For AMD quirk use */
143 	struct list_head	async_unlink;
144 	struct list_head	async_idle;
145 	unsigned		async_unlink_cycle;
146 	unsigned		async_count;	/* async activity count */
147 	__hc32			old_current;	/* Test for QH becoming */
148 	__hc32			old_token;	/*  inactive during unlink */
152 	unsigned		periodic_size;
153 	__hc32			*periodic;	/* hw periodic table */
154 	dma_addr_t		periodic_dma;
155 	struct list_head	intr_qh_list;
156 	unsigned		i_thresh;	/* uframes HC might cache */
158 	union ehci_shadow	*pshadow;	/* mirror hw periodic table */
159 	struct list_head	intr_unlink_wait;
160 	struct list_head	intr_unlink;
161 	unsigned		intr_unlink_wait_cycle;
162 	unsigned		intr_unlink_cycle;
163 	unsigned		now_frame;	/* frame from HC hardware */
164 	unsigned		last_iso_frame;	/* last frame scanned for iso */
165 	unsigned		intr_count;	/* intr activity count */
166 	unsigned		isoc_count;	/* isoc activity count */
167 	unsigned		periodic_count;	/* periodic activity count */
168 	unsigned		uframe_periodic_max; /* max periodic time per uframe */
172 	struct list_head	cached_itd_list;
173 	struct ehci_itd		*last_itd_to_free;
174 	struct list_head	cached_sitd_list;
175 	struct ehci_sitd	*last_sitd_to_free;
178 	unsigned long		reset_done[EHCI_MAX_ROOT_PORTS];
181 	unsigned long		bus_suspended;		/* which ports were
183 	unsigned long		companion_ports;	/* which ports are
185 	unsigned long		owned_ports;		/* which ports are
187 	unsigned long		port_c_suspend;		/* which ports have
189 	unsigned long		suspended_ports;	/* which ports are
191 	unsigned long		resuming_ports;		/* which ports have
195 	struct dma_pool		*qh_pool;	/* qh per active urb */
196 	struct dma_pool		*qtd_pool;	/* one or more per qh */
197 	struct dma_pool		*itd_pool;	/* itd per iso urb */
198 	struct dma_pool		*sitd_pool;	/* sitd per split iso urb */
200 	unsigned		random_frame;
201 	unsigned long		next_statechange;
202 	ktime_t			last_periodic_enable;
203 	u32			command;
206 	unsigned		no_selective_suspend:1;
207 	unsigned		has_fsl_port_bug:1; /* FreeScale */
208 	unsigned		has_fsl_hs_errata:1;	/* Freescale HS quirk */
209 	unsigned		has_fsl_susp_errata:1;	/* NXP SUSP quirk */
210 	unsigned		has_ci_pec_bug:1;	/* ChipIdea PEC bug */
211 	unsigned		big_endian_mmio:1;
212 	unsigned		big_endian_desc:1;
213 	unsigned		big_endian_capbase:1;
214 	unsigned		has_amcc_usb23:1;
215 	unsigned		need_io_watchdog:1;
216 	unsigned		amd_pll_fix:1;
217 	unsigned		use_dummy_qh:1;	/* AMD Frame List table quirk*/
218 	unsigned		has_synopsys_hc_bug:1; /* Synopsys HC */
219 	unsigned		frame_index_bug:1; /* MosChip (AKA NetMos) */
220 	unsigned		need_oc_pp_cycle:1; /* MPC834X port power */
221 	unsigned		imx28_write_fix:1; /* For Freescale i.MX28 */
222 	unsigned		spurious_oc:1;
223 	unsigned		is_aspeed:1;
224 	unsigned		zx_wakeup_clear_needed:1;
233 	__hc32			*ohci_hcctrl_reg;
234 	unsigned		has_hostpc:1;
235 	unsigned		has_tdi_phy_lpm:1;
236 	unsigned		has_ppcd:1; /* support per-port change bits */
237 	u8			sbrn;		/* packed release number */
241 	struct ehci_stats	stats;
266 static inline struct ehci_hcd *hcd_to_ehci(struct usb_hcd *hcd)  in hcd_to_ehci()  argument