Lines Matching +full:wakeup +full:- +full:threshold
1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2000-2004 by David Brownell
15 #include "pci-quirks.h"
19 static const char hcd_name[] = "ehci-pci";
27 /*-------------------------------------------------------------------------*/
31 return pdev->vendor == PCI_VENDOR_ID_INTEL && in is_intel_quark_x1000()
32 pdev->device == PCI_DEVICE_ID_INTEL_QUARK_X1000_SOC; in is_intel_quark_x1000()
54 * 0x84 is the offset of in/out threshold register,
59 /* Maximum usable threshold value is 0x7f dwords for both IN and OUT */
62 /* called after powerup, by probe or system-pm "wakeup" */
71 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */ in ehci_pci_reinit()
76 /* Reset the threshold limit */ in ehci_pci_reinit()
79 * For the Intel QUARK X1000, raise the I/O threshold to the in ehci_pci_reinit()
83 ehci->regs->intel_quark_x1000_insnreg01); in ehci_pci_reinit()
93 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); in ehci_pci_setup()
97 ehci->caps = hcd->regs; in ehci_pci_setup()
101 * allocated. Thus, any vendor-specific workarounds based on in ehci_pci_setup()
108 switch (pdev->vendor) { in ehci_pci_setup()
111 if (pdev->device == 0x01b5) { in ehci_pci_setup()
113 ehci->big_endian_mmio = 1; in ehci_pci_setup()
125 switch (pdev->device) { in ehci_pci_setup()
130 if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(31)) < 0) in ehci_pci_setup()
139 if (pdev->revision < 0xa4) in ehci_pci_setup()
140 ehci->no_selective_suspend = 1; in ehci_pci_setup()
145 if (pdev->device == PCI_DEVICE_ID_INTEL_CE4100_USB) in ehci_pci_setup()
146 hcd->has_tt = 1; in ehci_pci_setup()
149 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) in ehci_pci_setup()
150 hcd->has_tt = 1; in ehci_pci_setup()
155 ehci->amd_pll_fix = 1; in ehci_pci_setup()
157 if (pdev->device == 0x7463) { in ehci_pci_setup()
159 retval = -EIO; in ehci_pci_setup()
164 * EHCI controller on AMD SB700/SB800/Hudson-2/3 platforms may in ehci_pci_setup()
166 * there is NULL pointer with T-bit set to 1 in the frame list in ehci_pci_setup()
170 if (pdev->device == 0x7808) { in ehci_pci_setup()
171 ehci->use_dummy_qh = 1; in ehci_pci_setup()
172 ehci_info(ehci, "applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround\n"); in ehci_pci_setup()
176 if (pdev->device == 0x3104 && (pdev->revision & 0xf0) == 0x60) { in ehci_pci_setup()
192 ehci->amd_pll_fix = 1; in ehci_pci_setup()
195 * EHCI controller on AMD SB700/SB800/Hudson-2/3 platforms may in ehci_pci_setup()
197 * there is NULL pointer with T-bit set to 1 in the frame list in ehci_pci_setup()
201 if (pdev->device == 0x4396) { in ehci_pci_setup()
202 ehci->use_dummy_qh = 1; in ehci_pci_setup()
203 ehci_info(ehci, "applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround\n"); in ehci_pci_setup()
208 if ((pdev->device == 0x4386 || pdev->device == 0x4396) && in ehci_pci_setup()
217 /* MosChip frame-index-register bug */ in ehci_pci_setup()
218 ehci_info(ehci, "applying MosChip frame-index workaround\n"); in ehci_pci_setup()
219 ehci->frame_index_bug = 1; in ehci_pci_setup()
223 if (pdev->device == 0xa239) { in ehci_pci_setup()
225 ehci->has_synopsys_hc_bug = 1; in ehci_pci_setup()
229 if (pdev->device == PCI_DEVICE_ID_ASPEED_EHCI) { in ehci_pci_setup()
231 ehci->is_aspeed = 1; in ehci_pci_setup()
235 if (pdev->device == 0x3104 && (pdev->revision & 0xf0) == 0x90) in ehci_pci_setup()
236 ehci->zx_wakeup_clear_needed = 1; in ehci_pci_setup()
247 &ehci->caps->hcs_params); in ehci_pci_setup()
250 ehci->debug = hcd->regs + temp; in ehci_pci_setup()
251 temp = ehci_readl(ehci, &ehci->debug->control); in ehci_pci_setup()
256 ehci->debug = NULL; in ehci_pci_setup()
265 switch (pdev->vendor) { in ehci_pci_setup()
269 ehci->need_io_watchdog = 0; in ehci_pci_setup()
272 switch (pdev->device) { in ehci_pci_setup()
280 ehci->has_ppcd = 0; in ehci_pci_setup()
281 ehci->command &= ~CMD_PPCEE; in ehci_pci_setup()
288 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); in ehci_pci_setup()
290 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { in ehci_pci_setup()
293 HCS_N_CC(ehci->hcs_params), in ehci_pci_setup()
294 HCS_N_PCC(ehci->hcs_params), in ehci_pci_setup()
295 HCS_N_PORTS(ehci->hcs_params)); in ehci_pci_setup()
297 switch (pdev->vendor) { in ehci_pci_setup()
300 temp |= (ehci->hcs_params & ~0xf); in ehci_pci_setup()
301 ehci->hcs_params = temp; in ehci_pci_setup()
310 if (pdev->vendor == PCI_VENDOR_ID_STMICRO in ehci_pci_setup()
311 && pdev->device == PCI_DEVICE_ID_STMICRO_USB_HOST) in ehci_pci_setup()
313 else if (pdev->vendor == PCI_VENDOR_ID_HUAWEI in ehci_pci_setup()
314 && pdev->device == 0xa239) in ehci_pci_setup()
317 pci_read_config_byte(pdev, 0x60, &ehci->sbrn); in ehci_pci_setup()
324 if (!device_can_wakeup(&pdev->dev)) { in ehci_pci_setup()
329 dev_warn(&pdev->dev, "Enabling legacy PCI PM\n"); in ehci_pci_setup()
330 device_set_wakeup_capable(&pdev->dev, 1); in ehci_pci_setup()
335 if (ehci->no_selective_suspend && device_can_wakeup(&pdev->dev)) in ehci_pci_setup()
336 ehci_warn(ehci, "selective suspend/wakeup unavailable\n"); in ehci_pci_setup()
344 /*-------------------------------------------------------------------------*/
351 * to handle powerdown and wakeup, and currently also on
353 * the right sort of wakeup.
360 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); in ehci_pci_resume()
380 /*-------------------------------------------------------------------------*/
385 return -ENODEV; in ehci_pci_probe()
426 return -ENODEV; in ehci_pci_init()