Lines Matching +full:zynqmp +full:- +full:reset

1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-xilinx.c - Xilinx DWC3 controller specific glue driver
15 #include <linux/dma-mapping.h>
19 #include <linux/reset.h>
22 #include <linux/firmware/xlnx-zynqmp.h>
27 /* USB phy reset mask register */
55 * Enable or disable ULPI PHY reset from USB Controller. in dwc3_xlnx_mask_phy_rst()
56 * This does not actually reset the phy, but just controls in dwc3_xlnx_mask_phy_rst()
57 * whether USB controller can or cannot reset ULPI PHY. in dwc3_xlnx_mask_phy_rst()
59 reg = readl(priv_data->regs + XLNX_USB_PHY_RST_EN); in dwc3_xlnx_mask_phy_rst()
66 writel(reg, priv_data->regs + XLNX_USB_PHY_RST_EN); in dwc3_xlnx_mask_phy_rst()
71 struct device *dev = priv_data->dev; in dwc3_xlnx_init_versal()
77 return dev_err_probe(dev, PTR_ERR(crst), "failed to get reset signal\n"); in dwc3_xlnx_init_versal()
81 /* Assert and De-assert reset */ in dwc3_xlnx_init_versal()
84 dev_err_probe(dev, ret, "failed to assert Reset\n"); in dwc3_xlnx_init_versal()
90 dev_err_probe(dev, ret, "failed to De-assert Reset\n"); in dwc3_xlnx_init_versal()
101 struct device *dev = priv_data->dev; in dwc3_xlnx_init_zynqmp()
107 priv_data->usb3_phy = devm_phy_optional_get(dev, "usb3-phy"); in dwc3_xlnx_init_zynqmp()
108 if (IS_ERR(priv_data->usb3_phy)) { in dwc3_xlnx_init_zynqmp()
109 ret = PTR_ERR(priv_data->usb3_phy); in dwc3_xlnx_init_zynqmp()
118 * unless a core reset is performed (they should be set properly in dwc3_xlnx_init_zynqmp()
119 * by the first-stage boot loader, but may be reverted by a core in dwc3_xlnx_init_zynqmp()
120 * reset). They may also break the configuration if USB3 is actually in dwc3_xlnx_init_zynqmp()
121 * in use but the usb3-phy entry is missing from the device tree. in dwc3_xlnx_init_zynqmp()
124 if (!priv_data->usb3_phy) in dwc3_xlnx_init_zynqmp()
131 "failed to get core reset signal\n"); in dwc3_xlnx_init_zynqmp()
139 "failed to get hibernation reset signal\n"); in dwc3_xlnx_init_zynqmp()
147 "failed to get APB reset signal\n"); in dwc3_xlnx_init_zynqmp()
153 dev_err(dev, "Failed to assert core reset\n"); in dwc3_xlnx_init_zynqmp()
159 dev_err(dev, "Failed to assert hibernation reset\n"); in dwc3_xlnx_init_zynqmp()
165 dev_err(dev, "Failed to assert APB reset\n"); in dwc3_xlnx_init_zynqmp()
169 ret = phy_init(priv_data->usb3_phy); in dwc3_xlnx_init_zynqmp()
171 phy_exit(priv_data->usb3_phy); in dwc3_xlnx_init_zynqmp()
177 dev_err(dev, "Failed to release APB reset\n"); in dwc3_xlnx_init_zynqmp()
182 writel(FPD_POWER_PRSNT_OPTION, priv_data->regs + XLNX_USB_FPD_POWER_PRSNT); in dwc3_xlnx_init_zynqmp()
185 writel(PIPE_CLK_SELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK); in dwc3_xlnx_init_zynqmp()
189 dev_err(dev, "Failed to release core reset\n"); in dwc3_xlnx_init_zynqmp()
195 dev_err(dev, "Failed to release hibernation reset\n"); in dwc3_xlnx_init_zynqmp()
199 ret = phy_power_on(priv_data->usb3_phy); in dwc3_xlnx_init_zynqmp()
201 phy_exit(priv_data->usb3_phy); in dwc3_xlnx_init_zynqmp()
206 /* ulpi reset via gpio-modepin or gpio-framework driver */ in dwc3_xlnx_init_zynqmp()
207 reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); in dwc3_xlnx_init_zynqmp()
210 "Failed to request reset GPIO\n"); in dwc3_xlnx_init_zynqmp()
214 /* Toggle ulpi to reset the phy. */ in dwc3_xlnx_init_zynqmp()
226 if (of_dma_is_coherent(dev->of_node) || device_iommu_mapped(dev)) { in dwc3_xlnx_init_zynqmp()
227 reg = readl(priv_data->regs + XLNX_USB_TRAFFIC_ROUTE_CONFIG); in dwc3_xlnx_init_zynqmp()
229 writel(reg, priv_data->regs + XLNX_USB_TRAFFIC_ROUTE_CONFIG); in dwc3_xlnx_init_zynqmp()
238 .compatible = "xlnx,zynqmp-dwc3",
242 .compatible = "xlnx,versal-dwc3",
251 struct device_node *np = dev->of_node, *dwc3_np; in dwc3_set_swnode()
257 ret = -ENODEV; in dwc3_set_swnode()
264 props[prop_idx++] = PROPERTY_ENTRY_U16("snps,gsbuscfg0-reqinfo", in dwc3_set_swnode()
277 struct device *dev = &pdev->dev; in dwc3_xlnx_probe()
278 struct device_node *np = dev->of_node; in dwc3_xlnx_probe()
285 return -ENOMEM; in dwc3_xlnx_probe()
291 match = of_match_node(dwc3_xlnx_of_match, pdev->dev.of_node); in dwc3_xlnx_probe()
293 priv_data->pltfm_init = match->data; in dwc3_xlnx_probe()
294 priv_data->regs = regs; in dwc3_xlnx_probe()
295 priv_data->dev = dev; in dwc3_xlnx_probe()
299 ret = devm_clk_bulk_get_all(priv_data->dev, &priv_data->clks); in dwc3_xlnx_probe()
303 priv_data->num_clocks = ret; in dwc3_xlnx_probe()
305 ret = clk_bulk_prepare_enable(priv_data->num_clocks, priv_data->clks); in dwc3_xlnx_probe()
309 ret = priv_data->pltfm_init(priv_data); in dwc3_xlnx_probe()
338 clk_bulk_disable_unprepare(priv_data->num_clocks, priv_data->clks); in dwc3_xlnx_probe()
346 struct device *dev = &pdev->dev; in dwc3_xlnx_remove()
350 clk_bulk_disable_unprepare(priv_data->num_clocks, priv_data->clks); in dwc3_xlnx_remove()
351 priv_data->num_clocks = 0; in dwc3_xlnx_remove()
361 clk_bulk_disable(priv_data->num_clocks, priv_data->clks); in dwc3_xlnx_runtime_suspend()
370 return clk_bulk_enable(priv_data->num_clocks, priv_data->clks); in dwc3_xlnx_runtime_resume()
385 phy_exit(priv_data->usb3_phy); in dwc3_xlnx_suspend()
388 clk_bulk_disable(priv_data->num_clocks, priv_data->clks); in dwc3_xlnx_suspend()
398 ret = clk_bulk_enable(priv_data->num_clocks, priv_data->clks); in dwc3_xlnx_resume()
402 ret = phy_init(priv_data->usb3_phy); in dwc3_xlnx_resume()
406 ret = phy_power_on(priv_data->usb3_phy); in dwc3_xlnx_resume()
408 phy_exit(priv_data->usb3_phy); in dwc3_xlnx_resume()
425 .name = "dwc3-xilinx",