Lines Matching +full:reset +full:- +full:phy +full:- +full:on +full:- +full:wake
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * platform.c - DesignWare HS OTG Controller platform driver
13 #include <linux/dma-mapping.h>
17 #include <linux/phy/phy.h>
18 #include <linux/platform_data/s3c-hsotg.h>
19 #include <linux/reset.h>
39 * ------------------------------
41 * HST DEV any : ---
44 * DEV HST any : ---
56 hsotg->dr_mode = usb_get_dr_mode(hsotg->dev); in dwc2_get_dr_mode()
57 if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN) in dwc2_get_dr_mode()
58 hsotg->dr_mode = USB_DR_MODE_OTG; in dwc2_get_dr_mode()
60 mode = hsotg->dr_mode; in dwc2_get_dr_mode()
64 dev_err(hsotg->dev, in dwc2_get_dr_mode()
66 return -EINVAL; in dwc2_get_dr_mode()
71 dev_err(hsotg->dev, in dwc2_get_dr_mode()
73 return -EINVAL; in dwc2_get_dr_mode()
83 if (mode != hsotg->dr_mode) { in dwc2_get_dr_mode()
84 dev_warn(hsotg->dev, in dwc2_get_dr_mode()
88 hsotg->dr_mode = mode; in dwc2_get_dr_mode()
96 struct platform_device *pdev = to_platform_device(hsotg->dev); in __dwc2_lowlevel_hw_enable()
99 ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies), in __dwc2_lowlevel_hw_enable()
100 hsotg->supplies); in __dwc2_lowlevel_hw_enable()
104 if (hsotg->utmi_clk) { in __dwc2_lowlevel_hw_enable()
105 ret = clk_prepare_enable(hsotg->utmi_clk); in __dwc2_lowlevel_hw_enable()
110 if (hsotg->clk) { in __dwc2_lowlevel_hw_enable()
111 ret = clk_prepare_enable(hsotg->clk); in __dwc2_lowlevel_hw_enable()
116 if (hsotg->uphy) { in __dwc2_lowlevel_hw_enable()
117 ret = usb_phy_init(hsotg->uphy); in __dwc2_lowlevel_hw_enable()
118 } else if (hsotg->plat && hsotg->plat->phy_init) { in __dwc2_lowlevel_hw_enable()
119 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type); in __dwc2_lowlevel_hw_enable()
121 ret = phy_init(hsotg->phy); in __dwc2_lowlevel_hw_enable()
123 ret = phy_power_on(hsotg->phy); in __dwc2_lowlevel_hw_enable()
125 phy_exit(hsotg->phy); in __dwc2_lowlevel_hw_enable()
135 if (hsotg->clk) in __dwc2_lowlevel_hw_enable()
136 clk_disable_unprepare(hsotg->clk); in __dwc2_lowlevel_hw_enable()
139 if (hsotg->utmi_clk) in __dwc2_lowlevel_hw_enable()
140 clk_disable_unprepare(hsotg->utmi_clk); in __dwc2_lowlevel_hw_enable()
143 regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); in __dwc2_lowlevel_hw_enable()
149 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
153 * low-level USB platform resources (phy, clock, regulators)
160 hsotg->ll_hw_enabled = true; in dwc2_lowlevel_hw_enable()
166 struct platform_device *pdev = to_platform_device(hsotg->dev); in __dwc2_lowlevel_hw_disable()
169 if (hsotg->uphy) { in __dwc2_lowlevel_hw_disable()
170 usb_phy_shutdown(hsotg->uphy); in __dwc2_lowlevel_hw_disable()
171 } else if (hsotg->plat && hsotg->plat->phy_exit) { in __dwc2_lowlevel_hw_disable()
172 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type); in __dwc2_lowlevel_hw_disable()
174 ret = phy_power_off(hsotg->phy); in __dwc2_lowlevel_hw_disable()
176 ret = phy_exit(hsotg->phy); in __dwc2_lowlevel_hw_disable()
181 if (hsotg->clk) in __dwc2_lowlevel_hw_disable()
182 clk_disable_unprepare(hsotg->clk); in __dwc2_lowlevel_hw_disable()
184 if (hsotg->utmi_clk) in __dwc2_lowlevel_hw_disable()
185 clk_disable_unprepare(hsotg->utmi_clk); in __dwc2_lowlevel_hw_disable()
187 return regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); in __dwc2_lowlevel_hw_disable()
191 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
195 * low-level USB platform resources (phy, clock, regulators)
202 hsotg->ll_hw_enabled = false; in dwc2_lowlevel_hw_disable()
215 hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2"); in dwc2_lowlevel_hw_init()
216 if (IS_ERR(hsotg->reset)) in dwc2_lowlevel_hw_init()
217 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->reset), in dwc2_lowlevel_hw_init()
218 "error getting reset control\n"); in dwc2_lowlevel_hw_init()
220 reset_control_deassert(hsotg->reset); in dwc2_lowlevel_hw_init()
221 ret = devm_add_action_or_reset(hsotg->dev, dwc2_reset_control_assert, in dwc2_lowlevel_hw_init()
222 hsotg->reset); in dwc2_lowlevel_hw_init()
226 hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, "dwc2-ecc"); in dwc2_lowlevel_hw_init()
227 if (IS_ERR(hsotg->reset_ecc)) in dwc2_lowlevel_hw_init()
228 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->reset_ecc), in dwc2_lowlevel_hw_init()
229 "error getting reset control for ecc\n"); in dwc2_lowlevel_hw_init()
231 reset_control_deassert(hsotg->reset_ecc); in dwc2_lowlevel_hw_init()
232 ret = devm_add_action_or_reset(hsotg->dev, dwc2_reset_control_assert, in dwc2_lowlevel_hw_init()
233 hsotg->reset_ecc); in dwc2_lowlevel_hw_init()
238 * Attempt to find a generic PHY, then look for an old style in dwc2_lowlevel_hw_init()
239 * USB PHY and then fall back to pdata in dwc2_lowlevel_hw_init()
241 hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy"); in dwc2_lowlevel_hw_init()
242 if (IS_ERR(hsotg->phy)) { in dwc2_lowlevel_hw_init()
243 ret = PTR_ERR(hsotg->phy); in dwc2_lowlevel_hw_init()
245 case -ENODEV: in dwc2_lowlevel_hw_init()
246 case -ENOSYS: in dwc2_lowlevel_hw_init()
247 hsotg->phy = NULL; in dwc2_lowlevel_hw_init()
250 return dev_err_probe(hsotg->dev, ret, "error getting phy\n"); in dwc2_lowlevel_hw_init()
254 if (!hsotg->phy) { in dwc2_lowlevel_hw_init()
255 hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2); in dwc2_lowlevel_hw_init()
256 if (IS_ERR(hsotg->uphy)) { in dwc2_lowlevel_hw_init()
257 ret = PTR_ERR(hsotg->uphy); in dwc2_lowlevel_hw_init()
259 case -ENODEV: in dwc2_lowlevel_hw_init()
260 case -ENXIO: in dwc2_lowlevel_hw_init()
261 hsotg->uphy = NULL; in dwc2_lowlevel_hw_init()
264 return dev_err_probe(hsotg->dev, ret, "error getting usb phy\n"); in dwc2_lowlevel_hw_init()
269 hsotg->plat = dev_get_platdata(hsotg->dev); in dwc2_lowlevel_hw_init()
272 hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg"); in dwc2_lowlevel_hw_init()
273 if (IS_ERR(hsotg->clk)) in dwc2_lowlevel_hw_init()
274 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->clk), "cannot get otg clock\n"); in dwc2_lowlevel_hw_init()
276 hsotg->utmi_clk = devm_clk_get_optional(hsotg->dev, "utmi"); in dwc2_lowlevel_hw_init()
277 if (IS_ERR(hsotg->utmi_clk)) in dwc2_lowlevel_hw_init()
278 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->utmi_clk), in dwc2_lowlevel_hw_init()
282 for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++) in dwc2_lowlevel_hw_init()
283 hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i]; in dwc2_lowlevel_hw_init()
285 ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies), in dwc2_lowlevel_hw_init()
286 hsotg->supplies); in dwc2_lowlevel_hw_init()
288 return dev_err_probe(hsotg->dev, ret, "failed to request supplies\n"); in dwc2_lowlevel_hw_init()
294 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
301 * stops device processing. Any resources used on behalf of this device are
310 gr = &hsotg->gr_backup; in dwc2_driver_remove()
313 if (hsotg->hibernated) { in dwc2_driver_remove()
314 if (gr->gotgctl & GOTGCTL_CURMODE_HOST) in dwc2_driver_remove()
320 dev_err(hsotg->dev, in dwc2_driver_remove()
325 if (hsotg->in_ppd) { in dwc2_driver_remove()
328 dev_err(hsotg->dev, in dwc2_driver_remove()
333 if (hsotg->params.power_down == DWC2_POWER_DOWN_PARAM_NONE && in dwc2_driver_remove()
334 hsotg->bus_suspended && !hsotg->params.no_clock_gating) { in dwc2_driver_remove()
342 if (hsotg->hcd_enabled) in dwc2_driver_remove()
344 if (hsotg->gadget_enabled) in dwc2_driver_remove()
349 if (hsotg->params.activate_stm_id_vb_detection) in dwc2_driver_remove()
350 regulator_disable(hsotg->usb33d); in dwc2_driver_remove()
352 if (hsotg->ll_hw_enabled) in dwc2_driver_remove()
357 * dwc2_driver_shutdown() - Called on device shutdown
364 * at shutdown-time which may bring the system clock below the threshold
365 * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
373 synchronize_irq(hsotg->irq); in dwc2_driver_shutdown()
377 * dwc2_check_core_endianness() - Returns true if core and AHB have
385 snpsid = ioread32(hsotg->regs + GSNPSID); in dwc2_check_core_endianness()
394 * dwc2_check_core_version() - Check core version
401 struct dwc2_hw_params *hw = &hsotg->hw_params; in dwc2_check_core_version()
409 hw->snpsid = dwc2_readl(hsotg, GSNPSID); in dwc2_check_core_version()
410 if ((hw->snpsid & GSNPSID_ID_MASK) != DWC2_OTG_ID && in dwc2_check_core_version()
411 (hw->snpsid & GSNPSID_ID_MASK) != DWC2_FS_IOT_ID && in dwc2_check_core_version()
412 (hw->snpsid & GSNPSID_ID_MASK) != DWC2_HS_IOT_ID) { in dwc2_check_core_version()
413 dev_err(hsotg->dev, "Bad value for GSNPSID: 0x%08x\n", in dwc2_check_core_version()
414 hw->snpsid); in dwc2_check_core_version()
415 return -ENODEV; in dwc2_check_core_version()
418 dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n", in dwc2_check_core_version()
419 hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf, in dwc2_check_core_version()
420 hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid); in dwc2_check_core_version()
425 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
434 * structure on subsequent calls to driver methods for this device.
442 hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL); in dwc2_driver_probe()
444 return -ENOMEM; in dwc2_driver_probe()
446 hsotg->dev = &dev->dev; in dwc2_driver_probe()
451 if (!dev->dev.dma_mask) in dwc2_driver_probe()
452 dev->dev.dma_mask = &dev->dev.coherent_dma_mask; in dwc2_driver_probe()
453 retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32)); in dwc2_driver_probe()
455 dev_err(&dev->dev, "can't set coherent DMA mask: %d\n", retval); in dwc2_driver_probe()
459 hsotg->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res); in dwc2_driver_probe()
460 if (IS_ERR(hsotg->regs)) in dwc2_driver_probe()
461 return PTR_ERR(hsotg->regs); in dwc2_driver_probe()
463 dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n", in dwc2_driver_probe()
464 (unsigned long)res->start, hsotg->regs); in dwc2_driver_probe()
470 spin_lock_init(&hsotg->lock); in dwc2_driver_probe()
472 hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus"); in dwc2_driver_probe()
473 if (IS_ERR(hsotg->vbus_supply)) { in dwc2_driver_probe()
474 retval = PTR_ERR(hsotg->vbus_supply); in dwc2_driver_probe()
475 hsotg->vbus_supply = NULL; in dwc2_driver_probe()
476 if (retval != -ENODEV) in dwc2_driver_probe()
484 hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg); in dwc2_driver_probe()
490 hsotg->need_phy_for_wake = in dwc2_driver_probe()
491 of_property_read_bool(dev->dev.of_node, in dwc2_driver_probe()
492 "snps,need-phy-for-wake"); in dwc2_driver_probe()
503 * Reset before dwc2_get_hwparams() then it could get power-on real in dwc2_driver_probe()
504 * reset value form registers. in dwc2_driver_probe()
515 hsotg->irq = platform_get_irq(dev, 0); in dwc2_driver_probe()
516 if (hsotg->irq < 0) { in dwc2_driver_probe()
517 retval = hsotg->irq; in dwc2_driver_probe()
521 dev_dbg(hsotg->dev, "registering common handler for irq%d\n", in dwc2_driver_probe()
522 hsotg->irq); in dwc2_driver_probe()
523 retval = devm_request_irq(hsotg->dev, hsotg->irq, in dwc2_driver_probe()
525 dev_name(hsotg->dev), hsotg); in dwc2_driver_probe()
540 if (hsotg->params.activate_stm_id_vb_detection) { in dwc2_driver_probe()
543 hsotg->usb33d = devm_regulator_get(hsotg->dev, "usb33d"); in dwc2_driver_probe()
544 if (IS_ERR(hsotg->usb33d)) { in dwc2_driver_probe()
545 retval = PTR_ERR(hsotg->usb33d); in dwc2_driver_probe()
546 dev_err_probe(hsotg->dev, retval, "failed to request usb33d supply\n"); in dwc2_driver_probe()
549 retval = regulator_enable(hsotg->usb33d); in dwc2_driver_probe()
551 dev_err_probe(hsotg->dev, retval, "failed to enable usb33d supply\n"); in dwc2_driver_probe()
566 dev_err_probe(hsotg->dev, retval, "failed to initialize dual-role\n"); in dwc2_driver_probe()
570 if (hsotg->dr_mode != USB_DR_MODE_HOST) { in dwc2_driver_probe()
574 hsotg->gadget_enabled = 1; in dwc2_driver_probe()
578 * If we need PHY for wakeup we must be wakeup capable. in dwc2_driver_probe()
579 * When we have a device that can wake without the PHY we in dwc2_driver_probe()
582 if (hsotg->need_phy_for_wake) in dwc2_driver_probe()
583 device_set_wakeup_capable(&dev->dev, true); in dwc2_driver_probe()
585 hsotg->reset_phy_on_wake = in dwc2_driver_probe()
586 of_property_read_bool(dev->dev.of_node, in dwc2_driver_probe()
587 "snps,reset-phy-on-wake"); in dwc2_driver_probe()
588 if (hsotg->reset_phy_on_wake && !hsotg->phy) { in dwc2_driver_probe()
589 dev_warn(hsotg->dev, in dwc2_driver_probe()
590 "Quirk reset-phy-on-wake only supports generic PHYs\n"); in dwc2_driver_probe()
591 hsotg->reset_phy_on_wake = false; in dwc2_driver_probe()
594 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { in dwc2_driver_probe()
597 if (hsotg->gadget_enabled) in dwc2_driver_probe()
601 hsotg->hcd_enabled = 1; in dwc2_driver_probe()
605 hsotg->hibernated = 0; in dwc2_driver_probe()
609 /* Gadget code manages lowlevel hw on its own */ in dwc2_driver_probe()
610 if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) in dwc2_driver_probe()
616 if (hsotg->gadget_enabled) { in dwc2_driver_probe()
617 retval = usb_add_gadget_udc(hsotg->dev, &hsotg->gadget); in dwc2_driver_probe()
619 hsotg->gadget.udc = NULL; in dwc2_driver_probe()
631 if (hsotg->hcd_enabled) in dwc2_driver_probe()
638 if (hsotg->params.activate_stm_id_vb_detection) in dwc2_driver_probe()
639 regulator_disable(hsotg->usb33d); in dwc2_driver_probe()
641 if (hsotg->ll_hw_enabled) in dwc2_driver_probe()
657 if (dwc2->params.activate_stm_id_vb_detection) { in dwc2_suspend()
667 spin_lock_irqsave(&dwc2->lock, flags); in dwc2_suspend()
678 spin_unlock_irqrestore(&dwc2->lock, flags); in dwc2_suspend()
685 regulator_disable(dwc2->usb33d); in dwc2_suspend()
688 if (dwc2->ll_hw_enabled && in dwc2_suspend()
691 dwc2->phy_off_for_suspend = true; in dwc2_suspend()
702 if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) { in dwc2_resume()
707 dwc2->phy_off_for_suspend = false; in dwc2_resume()
709 if (dwc2->params.activate_stm_id_vb_detection) { in dwc2_resume()
713 ret = regulator_enable(dwc2->usb33d); in dwc2_resume()
725 spin_lock_irqsave(&dwc2->lock, flags); in dwc2_resume()
731 spin_unlock_irqrestore(&dwc2->lock, flags); in dwc2_resume()
734 if (!dwc2->role_sw) { in dwc2_resume()