192 #define desc_eof(a)        (le16_to_cpu((a).status) & BIT2)
1934 	if (status & BIT2) {  in cts_change()
2204 		wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */  in isr_txeom()
3804 	wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT2));  in enable_loopback()
3853 	wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */  in rx_stop()
3878 	wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */  in rx_start()
3900 			wr_reg32(info, RDCSR, (BIT2 + BIT0));  in rx_start()
3903 			wr_reg32(info, RDCSR, (BIT6 + BIT2 + BIT0));  in rx_start()
3920 			 (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2));  in tx_start()
3949 		wr_reg32(info, TDCSR, BIT2 + BIT0);  in tx_start()
3964 	wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */  in tx_stop()
4169 	val = BIT2;  in sync_mode()
4306 		val |= BIT2;	/* 001, rxclk = TXC Input */  in sync_mode()
4417 	if (status & BIT2)  in get_gtsignals()
4459 		val |= BIT2;  in msc_set_vcr()
4478 		val |= BIT2;  in set_gtsignals()
4480 		val &= ~BIT2;  in set_gtsignals()