Lines Matching +full:flow +full:- +full:controlled

1 // SPDX-License-Identifier: GPL-2.0
74 #define VT8500_CS8 (1 << 2) /* 8-bit data length (vs. 7-bit) */
83 #define VT8500_SWRTSCTS (1 << 11) /* Software-controlled RTS/CTS */
86 * Capability flags (driver-internal)
106 * have been allocated as we can't use pdev->id in
114 writel(val, port->membase + off); in vt8500_write()
119 return readl(port->membase + off); in vt8500_read()
128 vt8500_port->ier &= ~TX_FIFO_INTS; in vt8500_stop_tx()
129 vt8500_write(port, vt8500_port->ier, VT8500_URIER); in vt8500_stop_tx()
138 vt8500_port->ier &= ~RX_FIFO_INTS; in vt8500_stop_rx()
139 vt8500_write(port, vt8500_port->ier, VT8500_URIER); in vt8500_stop_rx()
148 vt8500_port->ier |= TCTS; in vt8500_enable_ms()
149 vt8500_write(port, vt8500_port->ier, VT8500_URIER); in vt8500_enable_ms()
154 struct tty_port *tport = &port->state->port; in handle_rx()
160 port->icount.overrun++; in handle_rx()
169 c = readw(port->membase + VT8500_RXFIFO) & 0x3ff; in handle_rx()
172 c &= ~port->read_status_mask; in handle_rx()
175 port->icount.frame++; in handle_rx()
178 port->icount.parity++; in handle_rx()
181 port->icount.rx++; in handle_rx()
203 writeb(ch, port->membase + VT8500_TXFIFO)); in handle_tx()
212 vt8500_port->ier &= ~TX_FIFO_INTS; in vt8500_start_tx()
213 vt8500_write(port, vt8500_port->ier, VT8500_URIER); in vt8500_start_tx()
215 vt8500_port->ier |= TX_FIFO_INTS; in vt8500_start_tx()
216 vt8500_write(port, vt8500_port->ier, VT8500_URIER); in vt8500_start_tx()
221 port->icount.cts++; in handle_delta_cts()
222 wake_up_interruptible(&port->state->port.delta_msr_wait); in handle_delta_cts()
286 div = ((vt8500_port->clk_predivisor - 1) & 0xf) << 16; in vt8500_set_baud_rate()
287 div |= (uart_get_divisor(port, baud) - 1) & 0x3ff; in vt8500_set_baud_rate()
290 baud = port->uartclk / 16 / ((div & 0x3ff) + 1); in vt8500_set_baud_rate()
292 while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops) in vt8500_set_baud_rate()
309 snprintf(vt8500_port->name, sizeof(vt8500_port->name), in vt8500_startup()
310 "vt8500_serial%d", port->line); in vt8500_startup()
312 ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH, in vt8500_startup()
313 vt8500_port->name, port); in vt8500_startup()
327 vt8500_port->ier = 0; in vt8500_shutdown()
330 vt8500_write(&vt8500_port->uart, 0, VT8500_URIER); in vt8500_shutdown()
331 vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR); in vt8500_shutdown()
332 free_irq(port->irq, port); in vt8500_shutdown()
354 lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR); in vt8500_set_termios()
356 if (termios->c_cflag & PARENB) { in vt8500_set_termios()
358 termios->c_cflag &= ~CMSPAR; in vt8500_set_termios()
359 if (termios->c_cflag & PARODD) in vt8500_set_termios()
365 switch (termios->c_cflag & CSIZE) { in vt8500_set_termios()
371 termios->c_cflag &= ~CSIZE; in vt8500_set_termios()
372 termios->c_cflag |= CS8; in vt8500_set_termios()
378 if (termios->c_cflag & CSTOPB) in vt8500_set_termios()
382 if (vt8500_port->vt8500_uart_flags & VT8500_HAS_SWRTSCTS_SWITCH) in vt8500_set_termios()
386 vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR); in vt8500_set_termios()
389 port->read_status_mask = 0; in vt8500_set_termios()
390 if (termios->c_iflag & IGNPAR) in vt8500_set_termios()
391 port->read_status_mask = FER | PER; in vt8500_set_termios()
393 uart_update_timeout(port, termios->c_cflag, baud); in vt8500_set_termios()
396 vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR); in vt8500_set_termios()
397 while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc) in vt8500_set_termios()
398 && --loops) in vt8500_set_termios()
401 /* Every possible FIFO-related interrupt */ in vt8500_set_termios()
402 vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS; in vt8500_set_termios()
405 * CTS flow control in vt8500_set_termios()
407 if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag)) in vt8500_set_termios()
408 vt8500_port->ier |= TCTS; in vt8500_set_termios()
410 vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR); in vt8500_set_termios()
411 vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER); in vt8500_set_termios()
420 return vt8500_port->name; in vt8500_type()
434 port->type = PORT_VT8500; in vt8500_config_port()
440 if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500)) in vt8500_verify_port()
441 return -EINVAL; in vt8500_verify_port()
442 if (unlikely(port->irq != ser->irq)) in vt8500_verify_port()
443 return -EINVAL; in vt8500_verify_port()
460 if (--tmout == 0) in wait_for_xmitr()
469 writeb(c, port->membase + VT8500_TXFIFO); in vt8500_console_putchar()
475 struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index]; in vt8500_console_write()
478 BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr); in vt8500_console_write()
480 ier = vt8500_read(&vt8500_port->uart, VT8500_URIER); in vt8500_console_write()
481 vt8500_write(&vt8500_port->uart, VT8500_URIER, 0); in vt8500_console_write()
483 uart_console_write(&vt8500_port->uart, s, count, in vt8500_console_write()
490 wait_for_xmitr(&vt8500_port->uart); in vt8500_console_write()
491 vt8500_write(&vt8500_port->uart, VT8500_URIER, ier); in vt8500_console_write()
500 int flow = 'n'; in vt8500_console_setup() local
502 if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0)) in vt8500_console_setup()
503 return -ENXIO; in vt8500_console_setup()
505 vt8500_port = vt8500_uart_ports[co->index]; in vt8500_console_setup()
508 return -ENODEV; in vt8500_console_setup()
511 uart_parse_options(options, &baud, &parity, &bits, &flow); in vt8500_console_setup()
513 return uart_set_options(&vt8500_port->uart, in vt8500_console_setup()
514 co, baud, parity, bits, flow); in vt8500_console_setup()
523 .index = -1,
551 if (--tmout == 0) in vt8500_put_poll_char()
595 { .compatible = "via,vt8500-uart", .data = &vt8500_flags},
596 { .compatible = "wm,wm8880-uart", .data = &wm8880_flags},
604 struct device_node *np = pdev->dev.of_node; in vt8500_serial_probe()
610 flags = of_device_get_match_data(&pdev->dev); in vt8500_serial_probe()
612 return -EINVAL; in vt8500_serial_probe()
621 port = -1; in vt8500_serial_probe()
623 port = -1; in vt8500_serial_probe()
633 return -ENODEV; in vt8500_serial_probe()
637 /* port already in use - shouldn't really happen */ in vt8500_serial_probe()
638 return -EBUSY; in vt8500_serial_probe()
641 vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port), in vt8500_serial_probe()
644 return -ENOMEM; in vt8500_serial_probe()
646 vt8500_port->uart.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &mmres); in vt8500_serial_probe()
647 if (IS_ERR(vt8500_port->uart.membase)) in vt8500_serial_probe()
648 return PTR_ERR(vt8500_port->uart.membase); in vt8500_serial_probe()
650 vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0); in vt8500_serial_probe()
651 if (IS_ERR(vt8500_port->clk)) { in vt8500_serial_probe()
652 dev_err(&pdev->dev, "failed to get clock\n"); in vt8500_serial_probe()
653 return -EINVAL; in vt8500_serial_probe()
656 ret = clk_prepare_enable(vt8500_port->clk); in vt8500_serial_probe()
658 dev_err(&pdev->dev, "failed to enable clock\n"); in vt8500_serial_probe()
662 vt8500_port->vt8500_uart_flags = *flags; in vt8500_serial_probe()
663 vt8500_port->clk_predivisor = DIV_ROUND_CLOSEST( in vt8500_serial_probe()
664 clk_get_rate(vt8500_port->clk), in vt8500_serial_probe()
667 vt8500_port->uart.type = PORT_VT8500; in vt8500_serial_probe()
668 vt8500_port->uart.iotype = UPIO_MEM; in vt8500_serial_probe()
669 vt8500_port->uart.mapbase = mmres->start; in vt8500_serial_probe()
670 vt8500_port->uart.irq = irq; in vt8500_serial_probe()
671 vt8500_port->uart.fifosize = 16; in vt8500_serial_probe()
672 vt8500_port->uart.ops = &vt8500_uart_pops; in vt8500_serial_probe()
673 vt8500_port->uart.line = port; in vt8500_serial_probe()
674 vt8500_port->uart.dev = &pdev->dev; in vt8500_serial_probe()
675 vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; in vt8500_serial_probe()
676 vt8500_port->uart.has_sysrq = IS_ENABLED(CONFIG_SERIAL_VT8500_CONSOLE); in vt8500_serial_probe()
678 /* Serial core uses the magic "16" everywhere - adjust for it */ in vt8500_serial_probe()
679 vt8500_port->uart.uartclk = 16 * clk_get_rate(vt8500_port->clk) / in vt8500_serial_probe()
680 vt8500_port->clk_predivisor / in vt8500_serial_probe()
683 snprintf(vt8500_port->name, sizeof(vt8500_port->name), in vt8500_serial_probe()
684 "VT8500 UART%d", pdev->id); in vt8500_serial_probe()
688 uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart); in vt8500_serial_probe()