Lines Matching +full:sync +full:- +full:flag
1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
28 #define FLAG 0x7e macro
82 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
98 #define SYNC_ENAB 0 /* Sync Modes Enable */
103 #define MONSYNC 0 /* 8 Bit Sync character */
104 #define BISYNC 0x10 /* 16 bit sync character */
105 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
106 #define EXTSYNC 0x30 /* External Sync Mode */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
128 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
130 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
133 #define AUTO_TxFLAG 1 /* Automatic Tx SDLC Flag */
156 #define BIT6 1 /* 6 bit/8bit sync */
158 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */
159 #define MARKIDLE 8 /* Mark/flag on idle */
206 #define SYNCIE 0x10 /* Sync/hunt IE */
217 #define SYNC 0x10 /* Sync/hunt */ macro
239 /* Read Register 2 (channel b only) - Interrupt vector */
277 #define ZS_CLEARERR(channel) do { sbus_writeb(ERR_RES, &channel->control); \
280 #define ZS_CLEARSTAT(channel) do { sbus_writeb(RES_EXT_INT, &channel->control); \
283 #define ZS_CLEARFIFO(channel) do { sbus_readb(&channel->data); \
285 sbus_readb(&channel->data); \
287 sbus_readb(&channel->data); \