Lines Matching +full:control +full:- +full:channel
1 // SPDX-License-Identifier: GPL-2.0
48 /* On 32-bit sparcs we need to delay after register accesses
50 * On 64-bit sparc we only need to flush single writes to ensure
56 #define ZS_WSYNC(channel) do { } while (0) argument
61 readb(&((__channel)->control))
105 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase))
108 #define ZS_IS_KEYB(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_KEYB)
109 #define ZS_IS_MOUSE(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_MOUSE)
110 #define ZS_IS_CONS(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CONS)
111 #define ZS_IS_KGDB(UP) ((UP)->flags & SUNZILOG_FLAG_IS_KGDB)
112 #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & SUNZILOG_FLAG_MODEM_STATUS)
113 #define ZS_IS_CHANNEL_A(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CHANNEL_A)
114 #define ZS_REGS_HELD(UP) ((UP)->flags & SUNZILOG_FLAG_REGS_HELD)
115 #define ZS_TX_STOPPED(UP) ((UP)->flags & SUNZILOG_FLAG_TX_STOPPED)
116 #define ZS_TX_ACTIVE(UP) ((UP)->flags & SUNZILOG_FLAG_TX_ACTIVE)
121 * flip-flops which implement the settle time we do in software.
126 static unsigned char read_zsreg(struct zilog_channel __iomem *channel, in read_zsreg() argument
131 writeb(reg, &channel->control); in read_zsreg()
133 retval = readb(&channel->control); in read_zsreg()
139 static void write_zsreg(struct zilog_channel __iomem *channel, in write_zsreg() argument
142 writeb(reg, &channel->control); in write_zsreg()
144 writeb(value, &channel->control); in write_zsreg()
148 static void sunzilog_clear_fifo(struct zilog_channel __iomem *channel) in sunzilog_clear_fifo() argument
155 regval = readb(&channel->control); in sunzilog_clear_fifo()
160 regval = read_zsreg(channel, R1); in sunzilog_clear_fifo()
161 readb(&channel->data); in sunzilog_clear_fifo()
165 writeb(ERR_RES, &channel->control); in sunzilog_clear_fifo()
167 ZS_WSYNC(channel); in sunzilog_clear_fifo()
175 static int __load_zsregs(struct zilog_channel __iomem *channel, unsigned char *regs) in __load_zsregs() argument
183 unsigned char stat = read_zsreg(channel, R1); in __load_zsregs()
189 writeb(ERR_RES, &channel->control); in __load_zsregs()
191 ZS_WSYNC(channel); in __load_zsregs()
193 sunzilog_clear_fifo(channel); in __load_zsregs()
196 write_zsreg(channel, R1, in __load_zsregs()
200 write_zsreg(channel, R4, regs[R4]); in __load_zsregs()
202 /* Set misc. TX/RX control bits. */ in __load_zsregs()
203 write_zsreg(channel, R10, regs[R10]); in __load_zsregs()
206 write_zsreg(channel, R3, regs[R3] & ~RxENAB); in __load_zsregs()
207 write_zsreg(channel, R5, regs[R5] & ~TxENAB); in __load_zsregs()
210 write_zsreg(channel, R6, regs[R6]); in __load_zsregs()
211 write_zsreg(channel, R7, regs[R7]); in __load_zsregs()
214 * master interrupt control (R9). We make sure this is setup in __load_zsregs()
219 write_zsreg(channel, R14, regs[R14] & ~BRENAB); in __load_zsregs()
221 /* Clock mode control. */ in __load_zsregs()
222 write_zsreg(channel, R11, regs[R11]); in __load_zsregs()
225 write_zsreg(channel, R12, regs[R12]); in __load_zsregs()
226 write_zsreg(channel, R13, regs[R13]); in __load_zsregs()
229 write_zsreg(channel, R14, regs[R14]); in __load_zsregs()
231 /* External status interrupt control. */ in __load_zsregs()
232 write_zsreg(channel, R15, (regs[R15] | WR7pEN) & ~FIFOEN); in __load_zsregs()
235 r15 = read_zsreg(channel, R15); in __load_zsregs()
237 write_zsreg(channel, R7, regs[R7p]); in __load_zsregs()
239 /* External status interrupt and FIFO control. */ in __load_zsregs()
240 write_zsreg(channel, R15, regs[R15] & ~WR7pEN); in __load_zsregs()
249 write_zsreg(channel, R0, RES_EXT_INT); /* First Latch */ in __load_zsregs()
250 write_zsreg(channel, R0, RES_EXT_INT); /* Second Latch */ in __load_zsregs()
253 write_zsreg(channel, R3, regs[R3]); in __load_zsregs()
254 write_zsreg(channel, R5, regs[R5]); in __load_zsregs()
257 write_zsreg(channel, R1, regs[R1]); in __load_zsregs()
262 /* Reprogram the Zilog channel HW registers with the copies found in the
269 struct zilog_channel __iomem *channel) in sunzilog_maybe_update_regs() argument
273 up->flags |= SUNZILOG_FLAG_REGS_HELD; in sunzilog_maybe_update_regs()
275 __load_zsregs(channel, up->curregs); in sunzilog_maybe_update_regs()
282 unsigned int cur_cflag = up->cflag; in sunzilog_change_mouse_baud()
285 up->cflag &= ~CBAUD; in sunzilog_change_mouse_baud()
286 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud); in sunzilog_change_mouse_baud()
289 up->curregs[R12] = (brg & 0xff); in sunzilog_change_mouse_baud()
290 up->curregs[R13] = (brg >> 8) & 0xff; in sunzilog_change_mouse_baud()
291 sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(&up->port)); in sunzilog_change_mouse_baud()
298 /* Stop-A is handled by drivers/char/keyboard.c now. */ in sunzilog_kbdms_receive_chars()
300 if (up->serio_open) in sunzilog_kbdms_receive_chars()
301 serio_interrupt(&up->serio, ch, 0); in sunzilog_kbdms_receive_chars()
315 if (up->serio_open) in sunzilog_kbdms_receive_chars()
316 serio_interrupt(&up->serio, ch, 0); in sunzilog_kbdms_receive_chars()
325 struct zilog_channel __iomem *channel) in sunzilog_receive_chars() argument
330 if (up->port.state != NULL) /* Unopened serial console */ in sunzilog_receive_chars()
331 port = &up->port.state->port; in sunzilog_receive_chars()
335 r1 = read_zsreg(channel, R1); in sunzilog_receive_chars()
337 writeb(ERR_RES, &channel->control); in sunzilog_receive_chars()
339 ZS_WSYNC(channel); in sunzilog_receive_chars()
342 ch = readb(&channel->control); in sunzilog_receive_chars()
354 ch = readb(&channel->data); in sunzilog_receive_chars()
357 ch &= up->parity_mask; in sunzilog_receive_chars()
366 up->port.icount.rx++; in sunzilog_receive_chars()
370 up->port.icount.brk++; in sunzilog_receive_chars()
371 if (uart_handle_break(&up->port)) in sunzilog_receive_chars()
375 up->port.icount.parity++; in sunzilog_receive_chars()
377 up->port.icount.frame++; in sunzilog_receive_chars()
379 up->port.icount.overrun++; in sunzilog_receive_chars()
380 r1 &= up->port.read_status_mask; in sunzilog_receive_chars()
388 if (uart_handle_sysrq_char(&up->port, ch) || !port) in sunzilog_receive_chars()
391 if (up->port.ignore_status_mask == 0xff || in sunzilog_receive_chars()
392 (r1 & up->port.ignore_status_mask) == 0) { in sunzilog_receive_chars()
403 struct zilog_channel __iomem *channel) in sunzilog_status_handle() argument
407 status = readb(&channel->control); in sunzilog_status_handle()
410 writeb(RES_EXT_INT, &channel->control); in sunzilog_status_handle()
412 ZS_WSYNC(channel); in sunzilog_status_handle()
422 status = readb(&channel->control); in sunzilog_status_handle()
434 up->port.icount.dsr++; in sunzilog_status_handle()
440 if ((status ^ up->prev_status) ^ DCD) in sunzilog_status_handle()
441 uart_handle_dcd_change(&up->port, in sunzilog_status_handle()
443 if ((status ^ up->prev_status) ^ CTS) in sunzilog_status_handle()
444 uart_handle_cts_change(&up->port, in sunzilog_status_handle()
447 wake_up_interruptible(&up->port.state->port.delta_msr_wait); in sunzilog_status_handle()
450 up->prev_status = status; in sunzilog_status_handle()
454 struct zilog_channel __iomem *channel) in sunzilog_transmit_chars() argument
460 unsigned char status = readb(&channel->control); in sunzilog_transmit_chars()
469 * to poll on enough port->xmit space becoming free. -DaveM in sunzilog_transmit_chars()
475 up->flags &= ~SUNZILOG_FLAG_TX_ACTIVE; in sunzilog_transmit_chars()
478 __load_zsregs(channel, up->curregs); in sunzilog_transmit_chars()
479 up->flags &= ~SUNZILOG_FLAG_REGS_HELD; in sunzilog_transmit_chars()
483 up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; in sunzilog_transmit_chars()
487 if (up->port.x_char) { in sunzilog_transmit_chars()
488 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; in sunzilog_transmit_chars()
489 writeb(up->port.x_char, &channel->data); in sunzilog_transmit_chars()
491 ZS_WSYNC(channel); in sunzilog_transmit_chars()
493 up->port.icount.tx++; in sunzilog_transmit_chars()
494 up->port.x_char = 0; in sunzilog_transmit_chars()
498 if (up->port.state == NULL) in sunzilog_transmit_chars()
500 tport = &up->port.state->port; in sunzilog_transmit_chars()
502 if (uart_tx_stopped(&up->port)) in sunzilog_transmit_chars()
505 if (!uart_fifo_get(&up->port, &ch)) in sunzilog_transmit_chars()
508 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; in sunzilog_transmit_chars()
509 writeb(ch, &channel->data); in sunzilog_transmit_chars()
511 ZS_WSYNC(channel); in sunzilog_transmit_chars()
513 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in sunzilog_transmit_chars()
514 uart_write_wakeup(&up->port); in sunzilog_transmit_chars()
519 writeb(RES_Tx_P, &channel->control); in sunzilog_transmit_chars()
521 ZS_WSYNC(channel); in sunzilog_transmit_chars()
529 struct zilog_channel __iomem *channel in sunzilog_interrupt() local
530 = ZILOG_CHANNEL_FROM_PORT(&up->port); in sunzilog_interrupt()
534 uart_port_lock(&up->port); in sunzilog_interrupt()
535 r3 = read_zsreg(channel, R3); in sunzilog_interrupt()
537 /* Channel A */ in sunzilog_interrupt()
540 writeb(RES_H_IUS, &channel->control); in sunzilog_interrupt()
542 ZS_WSYNC(channel); in sunzilog_interrupt()
545 port = sunzilog_receive_chars(up, channel); in sunzilog_interrupt()
547 sunzilog_status_handle(up, channel); in sunzilog_interrupt()
549 sunzilog_transmit_chars(up, channel); in sunzilog_interrupt()
551 uart_port_unlock(&up->port); in sunzilog_interrupt()
556 /* Channel B */ in sunzilog_interrupt()
557 up = up->next; in sunzilog_interrupt()
558 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in sunzilog_interrupt()
560 uart_port_lock(&up->port); in sunzilog_interrupt()
563 writeb(RES_H_IUS, &channel->control); in sunzilog_interrupt()
565 ZS_WSYNC(channel); in sunzilog_interrupt()
568 port = sunzilog_receive_chars(up, channel); in sunzilog_interrupt()
570 sunzilog_status_handle(up, channel); in sunzilog_interrupt()
572 sunzilog_transmit_chars(up, channel); in sunzilog_interrupt()
574 uart_port_unlock(&up->port); in sunzilog_interrupt()
579 up = up->next; in sunzilog_interrupt()
590 struct zilog_channel __iomem *channel; in sunzilog_read_channel_status() local
593 channel = ZILOG_CHANNEL_FROM_PORT(port); in sunzilog_read_channel_status()
594 status = readb(&channel->control); in sunzilog_read_channel_status()
645 struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); in sunzilog_set_mctrl() local
660 up->curregs[R5] |= set_bits; in sunzilog_set_mctrl()
661 up->curregs[R5] &= ~clear_bits; in sunzilog_set_mctrl()
662 write_zsreg(channel, R5, up->curregs[R5]); in sunzilog_set_mctrl()
671 up->flags |= SUNZILOG_FLAG_TX_STOPPED; in sunzilog_stop_tx()
679 struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); in sunzilog_start_tx() local
682 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; in sunzilog_start_tx()
683 up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; in sunzilog_start_tx()
685 status = readb(&channel->control); in sunzilog_start_tx()
692 /* Send the first character to jump-start the TX done in sunzilog_start_tx()
695 if (port->x_char) { in sunzilog_start_tx()
696 writeb(port->x_char, &channel->data); in sunzilog_start_tx()
698 ZS_WSYNC(channel); in sunzilog_start_tx()
700 port->icount.tx++; in sunzilog_start_tx()
701 port->x_char = 0; in sunzilog_start_tx()
703 struct tty_port *tport = &port->state->port; in sunzilog_start_tx()
706 if (!uart_fifo_get(&up->port, &ch)) in sunzilog_start_tx()
708 writeb(ch, &channel->data); in sunzilog_start_tx()
710 ZS_WSYNC(channel); in sunzilog_start_tx()
712 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in sunzilog_start_tx()
713 uart_write_wakeup(&up->port); in sunzilog_start_tx()
721 struct zilog_channel __iomem *channel; in sunzilog_stop_rx() local
726 channel = ZILOG_CHANNEL_FROM_PORT(port); in sunzilog_stop_rx()
729 up->curregs[R1] &= ~RxINT_MASK; in sunzilog_stop_rx()
730 sunzilog_maybe_update_regs(up, channel); in sunzilog_stop_rx()
738 struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); in sunzilog_enable_ms() local
741 new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); in sunzilog_enable_ms()
742 if (new_reg != up->curregs[R15]) { in sunzilog_enable_ms()
743 up->curregs[R15] = new_reg; in sunzilog_enable_ms()
746 write_zsreg(channel, R15, up->curregs[R15] & ~WR7pEN); in sunzilog_enable_ms()
755 struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); in sunzilog_break_ctl() local
768 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; in sunzilog_break_ctl()
769 if (new_reg != up->curregs[R5]) { in sunzilog_break_ctl()
770 up->curregs[R5] = new_reg; in sunzilog_break_ctl()
773 write_zsreg(channel, R5, up->curregs[R5]); in sunzilog_break_ctl()
781 struct zilog_channel __iomem *channel; in __sunzilog_startup() local
783 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __sunzilog_startup()
784 up->prev_status = readb(&channel->control); in __sunzilog_startup()
787 up->curregs[R3] |= RxENAB; in __sunzilog_startup()
788 up->curregs[R5] |= TxENAB; in __sunzilog_startup()
790 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __sunzilog_startup()
791 sunzilog_maybe_update_regs(up, channel); in __sunzilog_startup()
809 * The test for ZS_IS_CONS is explained by the following e-mail:
814 * On Sun, Dec 08, 2002 at 02:43:36AM -0500, Pete Zaitcev wrote:
830 * do the normal software shutdown - ie, free irqs etc)
836 struct zilog_channel __iomem *channel; in sunzilog_shutdown() local
844 channel = ZILOG_CHANNEL_FROM_PORT(port); in sunzilog_shutdown()
847 up->curregs[R3] &= ~RxENAB; in sunzilog_shutdown()
848 up->curregs[R5] &= ~TxENAB; in sunzilog_shutdown()
851 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in sunzilog_shutdown()
852 up->curregs[R5] &= ~SND_BRK; in sunzilog_shutdown()
853 sunzilog_maybe_update_regs(up, channel); in sunzilog_shutdown()
866 up->curregs[R10] = NRZ; in sunzilog_convert_to_zs()
867 up->curregs[R11] = TCBR | RCBR; in sunzilog_convert_to_zs()
870 up->curregs[R4] &= ~XCLK_MASK; in sunzilog_convert_to_zs()
871 up->curregs[R4] |= X16CLK; in sunzilog_convert_to_zs()
872 up->curregs[R12] = brg & 0xff; in sunzilog_convert_to_zs()
873 up->curregs[R13] = (brg >> 8) & 0xff; in sunzilog_convert_to_zs()
874 up->curregs[R14] = BRSRC | BRENAB; in sunzilog_convert_to_zs()
877 up->curregs[R3] &= ~RxN_MASK; in sunzilog_convert_to_zs()
878 up->curregs[R5] &= ~TxN_MASK; in sunzilog_convert_to_zs()
881 up->curregs[R3] |= Rx5; in sunzilog_convert_to_zs()
882 up->curregs[R5] |= Tx5; in sunzilog_convert_to_zs()
883 up->parity_mask = 0x1f; in sunzilog_convert_to_zs()
886 up->curregs[R3] |= Rx6; in sunzilog_convert_to_zs()
887 up->curregs[R5] |= Tx6; in sunzilog_convert_to_zs()
888 up->parity_mask = 0x3f; in sunzilog_convert_to_zs()
891 up->curregs[R3] |= Rx7; in sunzilog_convert_to_zs()
892 up->curregs[R5] |= Tx7; in sunzilog_convert_to_zs()
893 up->parity_mask = 0x7f; in sunzilog_convert_to_zs()
897 up->curregs[R3] |= Rx8; in sunzilog_convert_to_zs()
898 up->curregs[R5] |= Tx8; in sunzilog_convert_to_zs()
899 up->parity_mask = 0xff; in sunzilog_convert_to_zs()
902 up->curregs[R4] &= ~0x0c; in sunzilog_convert_to_zs()
904 up->curregs[R4] |= SB2; in sunzilog_convert_to_zs()
906 up->curregs[R4] |= SB1; in sunzilog_convert_to_zs()
908 up->curregs[R4] |= PAR_ENAB; in sunzilog_convert_to_zs()
910 up->curregs[R4] &= ~PAR_ENAB; in sunzilog_convert_to_zs()
912 up->curregs[R4] |= PAR_EVEN; in sunzilog_convert_to_zs()
914 up->curregs[R4] &= ~PAR_EVEN; in sunzilog_convert_to_zs()
916 up->port.read_status_mask = Rx_OVR; in sunzilog_convert_to_zs()
918 up->port.read_status_mask |= CRC_ERR | PAR_ERR; in sunzilog_convert_to_zs()
920 up->port.read_status_mask |= BRK_ABRT; in sunzilog_convert_to_zs()
922 up->port.ignore_status_mask = 0; in sunzilog_convert_to_zs()
924 up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; in sunzilog_convert_to_zs()
926 up->port.ignore_status_mask |= BRK_ABRT; in sunzilog_convert_to_zs()
928 up->port.ignore_status_mask |= Rx_OVR; in sunzilog_convert_to_zs()
932 up->port.ignore_status_mask = 0xff; in sunzilog_convert_to_zs()
947 uart_port_lock_irqsave(&up->port, &flags); in sunzilog_set_termios()
951 sunzilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); in sunzilog_set_termios()
953 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in sunzilog_set_termios()
954 up->flags |= SUNZILOG_FLAG_MODEM_STATUS; in sunzilog_set_termios()
956 up->flags &= ~SUNZILOG_FLAG_MODEM_STATUS; in sunzilog_set_termios()
958 up->cflag = termios->c_cflag; in sunzilog_set_termios()
962 uart_update_timeout(port, termios->c_cflag, baud); in sunzilog_set_termios()
964 uart_port_unlock_irqrestore(&up->port, flags); in sunzilog_set_termios()
971 return (up->flags & SUNZILOG_FLAG_ESCC) ? "zs (ESCC)" : "zs"; in sunzilog_type()
994 return -EINVAL; in sunzilog_verify_port()
1003 struct zilog_channel __iomem *channel in sunzilog_get_poll_char() local
1004 = ZILOG_CHANNEL_FROM_PORT(&up->port); in sunzilog_get_poll_char()
1007 r1 = read_zsreg(channel, R1); in sunzilog_get_poll_char()
1009 writeb(ERR_RES, &channel->control); in sunzilog_get_poll_char()
1011 ZS_WSYNC(channel); in sunzilog_get_poll_char()
1014 ch = readb(&channel->control); in sunzilog_get_poll_char()
1026 ch = readb(&channel->data); in sunzilog_get_poll_char()
1029 ch &= up->parity_mask; in sunzilog_get_poll_char()
1039 sunzilog_putchar(&up->port, ch); in sunzilog_put_poll_char()
1089 return -ENOMEM; in sunzilog_alloc_tables()
1094 spin_lock_init(&up->port.lock); in sunzilog_alloc_tables()
1099 if (i < num_channels - 1) in sunzilog_alloc_tables()
1100 up->next = up + 1; in sunzilog_alloc_tables()
1102 up->next = NULL; in sunzilog_alloc_tables()
1110 return -ENOMEM; in sunzilog_alloc_tables()
1127 struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); in sunzilog_putchar() local
1131 * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM in sunzilog_putchar()
1134 unsigned char val = readb(&channel->control); in sunzilog_putchar()
1140 } while (--loops); in sunzilog_putchar()
1142 writeb(ch, &channel->data); in sunzilog_putchar()
1144 ZS_WSYNC(channel); in sunzilog_putchar()
1153 struct uart_sunzilog_port *up = serio->port_data; in sunzilog_serio_write()
1158 sunzilog_putchar(&up->port, ch); in sunzilog_serio_write()
1167 struct uart_sunzilog_port *up = serio->port_data; in sunzilog_serio_open()
1172 if (!up->serio_open) { in sunzilog_serio_open()
1173 up->serio_open = 1; in sunzilog_serio_open()
1176 ret = -EBUSY; in sunzilog_serio_open()
1184 struct uart_sunzilog_port *up = serio->port_data; in sunzilog_serio_close()
1188 up->serio_open = 0; in sunzilog_serio_close()
1198 struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; in sunzilog_console_write()
1202 if (up->port.sysrq || oops_in_progress) in sunzilog_console_write()
1203 locked = uart_port_trylock_irqsave(&up->port, &flags); in sunzilog_console_write()
1205 uart_port_lock_irqsave(&up->port, &flags); in sunzilog_console_write()
1207 uart_console_write(&up->port, s, count, sunzilog_putchar); in sunzilog_console_write()
1211 uart_port_unlock_irqrestore(&up->port, flags); in sunzilog_console_write()
1216 struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; in sunzilog_console_setup()
1220 if (up->port.type != PORT_SUNZILOG) in sunzilog_console_setup()
1221 return -EINVAL; in sunzilog_console_setup()
1224 (sunzilog_reg.minor - 64) + con->index, con->index); in sunzilog_console_setup()
1227 sunserial_console_termios(con, up->port.dev->of_node); in sunzilog_console_setup()
1229 /* Firmware console speed is limited to 150-->38400 baud so in sunzilog_console_setup()
1232 switch (con->cflag & CBAUD) { in sunzilog_console_setup()
1246 uart_port_lock_irqsave(&up->port, &flags); in sunzilog_console_setup()
1248 up->curregs[R15] |= BRKIE; in sunzilog_console_setup()
1249 sunzilog_convert_to_zs(up, con->cflag, 0, brg); in sunzilog_console_setup()
1251 sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); in sunzilog_console_setup()
1254 uart_port_unlock_irqrestore(&up->port, flags); in sunzilog_console_setup()
1265 .index = -1,
1282 if (up->flags & SUNZILOG_FLAG_CONS_KEYB) { in sunzilog_init_kbdms()
1283 up->cflag = B1200 | CS8 | CLOCAL | CREAD; in sunzilog_init_kbdms()
1286 up->cflag = B4800 | CS8 | CLOCAL | CREAD; in sunzilog_init_kbdms()
1290 up->curregs[R15] |= BRKIE; in sunzilog_init_kbdms()
1292 sunzilog_convert_to_zs(up, up->cflag, 0, brg); in sunzilog_init_kbdms()
1293 sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); in sunzilog_init_kbdms()
1300 struct serio *serio = &up->serio; in sunzilog_register_serio()
1302 serio->port_data = up; in sunzilog_register_serio()
1304 serio->id.type = SERIO_RS232; in sunzilog_register_serio()
1305 if (up->flags & SUNZILOG_FLAG_CONS_KEYB) { in sunzilog_register_serio()
1306 serio->id.proto = SERIO_SUNKBD; in sunzilog_register_serio()
1307 strscpy(serio->name, "zskbd", sizeof(serio->name)); in sunzilog_register_serio()
1309 serio->id.proto = SERIO_SUN; in sunzilog_register_serio()
1310 serio->id.extra = 1; in sunzilog_register_serio()
1311 strscpy(serio->name, "zsms", sizeof(serio->name)); in sunzilog_register_serio()
1313 strscpy(serio->phys, in sunzilog_register_serio()
1314 ((up->flags & SUNZILOG_FLAG_CONS_KEYB) ? in sunzilog_register_serio()
1316 sizeof(serio->phys)); in sunzilog_register_serio()
1318 serio->write = sunzilog_serio_write; in sunzilog_register_serio()
1319 serio->open = sunzilog_serio_open; in sunzilog_register_serio()
1320 serio->close = sunzilog_serio_close; in sunzilog_register_serio()
1321 serio->dev.parent = up->port.dev; in sunzilog_register_serio()
1329 struct zilog_channel __iomem *channel; in sunzilog_init_hw() local
1333 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in sunzilog_init_hw()
1335 uart_port_lock_irqsave(&up->port, &flags); in sunzilog_init_hw()
1337 write_zsreg(channel, R9, FHWRES); in sunzilog_init_hw()
1339 (void) read_zsreg(channel, R0); in sunzilog_init_hw()
1342 if (up->flags & (SUNZILOG_FLAG_CONS_KEYB | in sunzilog_init_hw()
1344 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in sunzilog_init_hw()
1345 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in sunzilog_init_hw()
1346 up->curregs[R3] = RxENAB | Rx8; in sunzilog_init_hw()
1347 up->curregs[R5] = TxENAB | Tx8; in sunzilog_init_hw()
1348 up->curregs[R6] = 0x00; /* SDLC Address */ in sunzilog_init_hw()
1349 up->curregs[R7] = 0x7E; /* SDLC Flag */ in sunzilog_init_hw()
1350 up->curregs[R9] = NV; in sunzilog_init_hw()
1351 up->curregs[R7p] = 0x00; in sunzilog_init_hw()
1354 if (up->flags & SUNZILOG_FLAG_ISR_HANDLER) in sunzilog_init_hw()
1355 up->curregs[R9] |= MIE; in sunzilog_init_hw()
1356 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_init_hw()
1359 up->parity_mask = 0xff; in sunzilog_init_hw()
1360 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in sunzilog_init_hw()
1361 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in sunzilog_init_hw()
1362 up->curregs[R3] = RxENAB | Rx8; in sunzilog_init_hw()
1363 up->curregs[R5] = TxENAB | Tx8; in sunzilog_init_hw()
1364 up->curregs[R6] = 0x00; /* SDLC Address */ in sunzilog_init_hw()
1365 up->curregs[R7] = 0x7E; /* SDLC Flag */ in sunzilog_init_hw()
1366 up->curregs[R9] = NV; in sunzilog_init_hw()
1367 up->curregs[R10] = NRZ; in sunzilog_init_hw()
1368 up->curregs[R11] = TCBR | RCBR; in sunzilog_init_hw()
1371 up->curregs[R12] = (brg & 0xff); in sunzilog_init_hw()
1372 up->curregs[R13] = (brg >> 8) & 0xff; in sunzilog_init_hw()
1373 up->curregs[R14] = BRSRC | BRENAB; in sunzilog_init_hw()
1374 up->curregs[R15] = FIFOEN; /* Use FIFO if on ESCC */ in sunzilog_init_hw()
1375 up->curregs[R7p] = TxFIFO_LVL | RxFIFO_LVL; in sunzilog_init_hw()
1376 if (__load_zsregs(channel, up->curregs)) { in sunzilog_init_hw()
1377 up->flags |= SUNZILOG_FLAG_ESCC; in sunzilog_init_hw()
1380 if (up->flags & SUNZILOG_FLAG_ISR_HANDLER) in sunzilog_init_hw()
1381 up->curregs[R9] |= MIE; in sunzilog_init_hw()
1382 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_init_hw()
1385 uart_port_unlock_irqrestore(&up->port, flags); in sunzilog_init_hw()
1388 if (up->flags & (SUNZILOG_FLAG_CONS_KEYB | in sunzilog_init_hw()
1405 if (of_property_present(op->dev.of_node, "keyboard")) in zs_probe()
1414 sunzilog_chip_regs[inst] = of_ioremap(&op->resource[0], 0, in zs_probe()
1418 return -ENOMEM; in zs_probe()
1423 zilog_irq = op->archdata.irqs[0]; in zs_probe()
1427 /* Channel A */ in zs_probe()
1428 up[0].port.mapbase = op->resource[0].start + 0x00; in zs_probe()
1429 up[0].port.membase = (void __iomem *) &rp->channelA; in zs_probe()
1431 up[0].port.irq = op->archdata.irqs[0]; in zs_probe()
1438 up[0].port.dev = &op->dev; in zs_probe()
1445 /* Channel B */ in zs_probe()
1446 up[1].port.mapbase = op->resource[0].start + 0x04; in zs_probe()
1447 up[1].port.membase = (void __iomem *) &rp->channelB; in zs_probe()
1449 up[1].port.irq = op->archdata.irqs[0]; in zs_probe()
1456 up[1].port.dev = &op->dev; in zs_probe()
1464 if (sunserial_console_match(SUNZILOG_CONSOLE(), op->dev.of_node, in zs_probe()
1467 up->flags |= SUNZILOG_FLAG_IS_CONS; in zs_probe()
1470 of_iounmap(&op->resource[0], in zs_probe()
1474 if (sunserial_console_match(SUNZILOG_CONSOLE(), op->dev.of_node, in zs_probe()
1477 up->flags |= SUNZILOG_FLAG_IS_CONS; in zs_probe()
1481 of_iounmap(&op->resource[0], in zs_probe()
1489 dev_name(&op->dev), in zs_probe()
1491 op->archdata.irqs[0], sunzilog_type(&up[0].port)); in zs_probe()
1494 dev_name(&op->dev), in zs_probe()
1496 op->archdata.irqs[0], sunzilog_type(&up[1].port)); in zs_probe()
1509 serio_unregister_port(&up->serio); in zs_remove_one()
1512 uart_remove_one_port(&sunzilog_reg, &up->port); in zs_remove_one()
1524 of_iounmap(&op->resource[0], regs, sizeof(struct zilog_layout)); in zs_remove()
1562 uart_chip_count = num_sunzilog - num_keybms; in sunzilog_init()
1583 struct zilog_channel __iomem *channel; in sunzilog_init() local
1586 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in sunzilog_init()
1587 up->flags |= SUNZILOG_FLAG_ISR_HANDLER; in sunzilog_init()
1588 up->curregs[R9] |= MIE; in sunzilog_init()
1589 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_init()
1590 up = up->next; in sunzilog_init()
1620 struct zilog_channel __iomem *channel; in sunzilog_exit() local
1623 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in sunzilog_exit()
1624 up->flags &= ~SUNZILOG_FLAG_ISR_HANDLER; in sunzilog_exit()
1625 up->curregs[R9] &= ~MIE; in sunzilog_exit()
1626 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_exit()
1627 up = up->next; in sunzilog_exit()