Lines Matching +full:exynos5433 +full:- +full:uart
1 // SPDX-License-Identifier: GPL-2.0
5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
12 * UERSTAT register in the UART blocks, and keeps marking some of the
21 * BJD, 04-Nov-2004
28 #include <linux/dma-mapping.h>
48 /* UART name and device definitions */
91 /* uart port features */
165 #define portaddr(port, reg) ((port)->membase + (reg))
167 ((unsigned long *)(unsigned long)((port)->membase + (reg)))
171 switch (port->iotype) { in rd_reg()
186 switch (port->iotype) { in wr_reg()
198 /* Byte-order aware bit setting/clearing functions. */
235 return to_platform_device(port->dev)->name; in s3c24xx_serial_portname()
252 while (--count && !s3c24xx_serial_txempty_nofifo(port)) in s3c24xx_serial_rx_enable()
263 ourport->rx_enabled = 1; in s3c24xx_serial_rx_enable()
279 ourport->rx_enabled = 0; in s3c24xx_serial_rx_disable()
286 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_stop_tx()
290 if (!ourport->tx_enabled) in s3c24xx_serial_stop_tx()
293 switch (ourport->info->type) { in s3c24xx_serial_stop_tx()
301 disable_irq_nosync(ourport->tx_irq); in s3c24xx_serial_stop_tx()
305 if (dma && dma->tx_chan && ourport->tx_in_progress == S3C24XX_TX_DMA) { in s3c24xx_serial_stop_tx()
306 dmaengine_pause(dma->tx_chan); in s3c24xx_serial_stop_tx()
307 dmaengine_tx_status(dma->tx_chan, dma->tx_cookie, &state); in s3c24xx_serial_stop_tx()
308 dmaengine_terminate_all(dma->tx_chan); in s3c24xx_serial_stop_tx()
309 dma_sync_single_for_cpu(dma->tx_chan->device->dev, in s3c24xx_serial_stop_tx()
310 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_stop_tx()
312 async_tx_ack(dma->tx_desc); in s3c24xx_serial_stop_tx()
313 count = dma->tx_bytes_requested - state.residue; in s3c24xx_serial_stop_tx()
317 ourport->tx_enabled = 0; in s3c24xx_serial_stop_tx()
318 ourport->tx_in_progress = 0; in s3c24xx_serial_stop_tx()
320 if (port->flags & UPF_CONS_FLOW) in s3c24xx_serial_stop_tx()
323 ourport->tx_mode = 0; in s3c24xx_serial_stop_tx()
331 struct uart_port *port = &ourport->port; in s3c24xx_serial_tx_dma_complete()
332 struct tty_port *tport = &port->state->port; in s3c24xx_serial_tx_dma_complete()
333 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_tx_dma_complete()
338 dmaengine_tx_status(dma->tx_chan, dma->tx_cookie, &state); in s3c24xx_serial_tx_dma_complete()
339 count = dma->tx_bytes_requested - state.residue; in s3c24xx_serial_tx_dma_complete()
340 async_tx_ack(dma->tx_desc); in s3c24xx_serial_tx_dma_complete()
342 dma_sync_single_for_cpu(dma->tx_chan->device->dev, in s3c24xx_serial_tx_dma_complete()
343 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_tx_dma_complete()
349 ourport->tx_in_progress = 0; in s3c24xx_serial_tx_dma_complete()
351 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in s3c24xx_serial_tx_dma_complete()
360 const struct uart_port *port = &ourport->port; in enable_tx_dma()
364 switch (ourport->info->type) { in enable_tx_dma()
372 disable_irq_nosync(ourport->tx_irq); in enable_tx_dma()
383 ourport->tx_mode = S3C24XX_TX_DMA; in enable_tx_dma()
388 const struct uart_port *port = &ourport->port; in enable_tx_pio()
392 ourport->tx_in_progress = S3C24XX_TX_PIO; in enable_tx_pio()
403 switch (ourport->info->type) { in enable_tx_pio()
413 enable_irq(ourport->tx_irq); in enable_tx_pio()
417 ourport->tx_mode = S3C24XX_TX_PIO; in enable_tx_pio()
423 if (ourport->info->type == TYPE_APPLE_S5L) in enable_tx_pio()
429 if (ourport->tx_mode != S3C24XX_TX_PIO) in s3c24xx_serial_start_tx_pio()
436 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_start_tx_dma()
438 if (ourport->tx_mode != S3C24XX_TX_DMA) in s3c24xx_serial_start_tx_dma()
441 dma->tx_size = count & ~(dma_get_cache_alignment() - 1); in s3c24xx_serial_start_tx_dma()
442 dma->tx_transfer_addr = dma->tx_addr + tail; in s3c24xx_serial_start_tx_dma()
444 dma_sync_single_for_device(dma->tx_chan->device->dev, in s3c24xx_serial_start_tx_dma()
445 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_start_tx_dma()
448 dma->tx_desc = dmaengine_prep_slave_single(dma->tx_chan, in s3c24xx_serial_start_tx_dma()
449 dma->tx_transfer_addr, dma->tx_size, in s3c24xx_serial_start_tx_dma()
451 if (!dma->tx_desc) { in s3c24xx_serial_start_tx_dma()
452 dev_err(ourport->port.dev, "Unable to get desc for Tx\n"); in s3c24xx_serial_start_tx_dma()
453 return -EIO; in s3c24xx_serial_start_tx_dma()
456 dma->tx_desc->callback = s3c24xx_serial_tx_dma_complete; in s3c24xx_serial_start_tx_dma()
457 dma->tx_desc->callback_param = ourport; in s3c24xx_serial_start_tx_dma()
458 dma->tx_bytes_requested = dma->tx_size; in s3c24xx_serial_start_tx_dma()
460 ourport->tx_in_progress = S3C24XX_TX_DMA; in s3c24xx_serial_start_tx_dma()
461 dma->tx_cookie = dmaengine_submit(dma->tx_desc); in s3c24xx_serial_start_tx_dma()
462 dma_async_issue_pending(dma->tx_chan); in s3c24xx_serial_start_tx_dma()
468 struct uart_port *port = &ourport->port; in s3c24xx_serial_start_next_tx()
469 struct tty_port *tport = &port->state->port; in s3c24xx_serial_start_next_tx()
473 count = kfifo_out_linear(&tport->xmit_fifo, &tail, UART_XMIT_SIZE); in s3c24xx_serial_start_next_tx()
480 if (!ourport->dma || !ourport->dma->tx_chan || in s3c24xx_serial_start_next_tx()
481 count < ourport->min_dma_size || in s3c24xx_serial_start_next_tx()
482 tail & (dma_get_cache_alignment() - 1)) in s3c24xx_serial_start_next_tx()
491 struct tty_port *tport = &port->state->port; in s3c24xx_serial_start_tx()
493 if (!ourport->tx_enabled) { in s3c24xx_serial_start_tx()
494 if (port->flags & UPF_CONS_FLOW) in s3c24xx_serial_start_tx()
497 ourport->tx_enabled = 1; in s3c24xx_serial_start_tx()
498 if (!ourport->dma || !ourport->dma->tx_chan) in s3c24xx_serial_start_tx()
502 if (ourport->dma && ourport->dma->tx_chan) { in s3c24xx_serial_start_tx()
503 if (!kfifo_is_empty(&tport->xmit_fifo) && in s3c24xx_serial_start_tx()
504 !ourport->tx_in_progress) in s3c24xx_serial_start_tx()
512 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_uart_copy_rx_to_tty()
518 dma_sync_single_for_cpu(dma->rx_chan->device->dev, dma->rx_addr, in s3c24xx_uart_copy_rx_to_tty()
519 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_uart_copy_rx_to_tty()
521 ourport->port.icount.rx += count; in s3c24xx_uart_copy_rx_to_tty()
523 dev_err(ourport->port.dev, "No tty port\n"); in s3c24xx_uart_copy_rx_to_tty()
527 ((unsigned char *)(ourport->dma->rx_buf)), count); in s3c24xx_uart_copy_rx_to_tty()
530 dev_err(ourport->port.dev, "RxData copy to tty layer failed\n"); in s3c24xx_uart_copy_rx_to_tty()
537 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_stop_rx()
538 struct tty_port *t = &port->state->port; in s3c24xx_serial_stop_rx()
543 if (ourport->rx_enabled) { in s3c24xx_serial_stop_rx()
544 dev_dbg(port->dev, "stopping rx\n"); in s3c24xx_serial_stop_rx()
545 switch (ourport->info->type) { in s3c24xx_serial_stop_rx()
556 disable_irq_nosync(ourport->rx_irq); in s3c24xx_serial_stop_rx()
559 ourport->rx_enabled = 0; in s3c24xx_serial_stop_rx()
561 if (dma && dma->rx_chan) { in s3c24xx_serial_stop_rx()
562 dmaengine_pause(dma->tx_chan); in s3c24xx_serial_stop_rx()
563 dma_status = dmaengine_tx_status(dma->rx_chan, in s3c24xx_serial_stop_rx()
564 dma->rx_cookie, &state); in s3c24xx_serial_stop_rx()
567 received = dma->rx_bytes_requested - state.residue; in s3c24xx_serial_stop_rx()
568 dmaengine_terminate_all(dma->rx_chan); in s3c24xx_serial_stop_rx()
577 return to_ourport(port)->info; in s3c24xx_port_to_info()
585 if (port->dev == NULL) in s3c24xx_port_to_cfg()
589 return ourport->cfg; in s3c24xx_port_to_cfg()
595 const struct s3c24xx_uart_info *info = ourport->info; in s3c24xx_serial_rx_fifocnt()
597 if (ufstat & info->rx_fifofull) in s3c24xx_serial_rx_fifocnt()
598 return ourport->port.fifosize; in s3c24xx_serial_rx_fifocnt()
600 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; in s3c24xx_serial_rx_fifocnt()
607 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_dma_complete()
609 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_rx_dma_complete()
610 struct tty_port *t = &port->state->port; in s3c24xx_serial_rx_dma_complete()
611 struct tty_struct *tty = tty_port_tty_get(&ourport->port.state->port); in s3c24xx_serial_rx_dma_complete()
617 dmaengine_tx_status(dma->rx_chan, dma->rx_cookie, &state); in s3c24xx_serial_rx_dma_complete()
618 received = dma->rx_bytes_requested - state.residue; in s3c24xx_serial_rx_dma_complete()
619 async_tx_ack(dma->rx_desc); in s3c24xx_serial_rx_dma_complete()
638 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c64xx_start_rx_dma()
640 dma_sync_single_for_device(dma->rx_chan->device->dev, dma->rx_addr, in s3c64xx_start_rx_dma()
641 dma->rx_size, DMA_FROM_DEVICE); in s3c64xx_start_rx_dma()
643 dma->rx_desc = dmaengine_prep_slave_single(dma->rx_chan, in s3c64xx_start_rx_dma()
644 dma->rx_addr, dma->rx_size, DMA_DEV_TO_MEM, in s3c64xx_start_rx_dma()
646 if (!dma->rx_desc) { in s3c64xx_start_rx_dma()
647 dev_err(ourport->port.dev, "Unable to get desc for Rx\n"); in s3c64xx_start_rx_dma()
651 dma->rx_desc->callback = s3c24xx_serial_rx_dma_complete; in s3c64xx_start_rx_dma()
652 dma->rx_desc->callback_param = ourport; in s3c64xx_start_rx_dma()
653 dma->rx_bytes_requested = dma->rx_size; in s3c64xx_start_rx_dma()
655 dma->rx_cookie = dmaengine_submit(dma->rx_desc); in s3c64xx_start_rx_dma()
656 dma_async_issue_pending(dma->rx_chan); in s3c64xx_start_rx_dma()
659 /* ? - where has parity gone?? */
664 struct uart_port *port = &ourport->port; in enable_rx_dma()
682 ourport->rx_mode = S3C24XX_RX_DMA; in enable_rx_dma()
687 struct uart_port *port = &ourport->port; in enable_rx_pio()
696 if (ourport->info->type != TYPE_APPLE_S5L) { in enable_rx_pio()
706 ourport->rx_mode = S3C24XX_RX_PIO; in enable_rx_pio()
713 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_chars_dma()
714 struct s3c24xx_uart_dma *dma = ourport->dma; in s3c24xx_serial_rx_chars_dma()
715 struct tty_struct *tty = tty_port_tty_get(&ourport->port.state->port); in s3c24xx_serial_rx_chars_dma()
716 struct tty_port *t = &port->state->port; in s3c24xx_serial_rx_chars_dma()
728 if (ourport->rx_mode == S3C24XX_RX_PIO) in s3c24xx_serial_rx_chars_dma()
733 if (ourport->rx_mode == S3C24XX_RX_DMA) { in s3c24xx_serial_rx_chars_dma()
734 dmaengine_pause(dma->rx_chan); in s3c24xx_serial_rx_chars_dma()
735 dmaengine_tx_status(dma->rx_chan, dma->rx_cookie, &state); in s3c24xx_serial_rx_chars_dma()
736 dmaengine_terminate_all(dma->rx_chan); in s3c24xx_serial_rx_chars_dma()
737 received = dma->rx_bytes_requested - state.residue; in s3c24xx_serial_rx_chars_dma()
760 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_drain_fifo()
761 unsigned int max_count = port->fifosize; in s3c24xx_serial_rx_drain_fifo()
766 while (max_count-- > 0) { in s3c24xx_serial_rx_drain_fifo()
777 fifocnt--; in s3c24xx_serial_rx_drain_fifo()
782 if (port->flags & UPF_CONS_FLOW) { in s3c24xx_serial_rx_drain_fifo()
785 if (ourport->rx_enabled) { in s3c24xx_serial_rx_drain_fifo()
787 ourport->rx_enabled = 0; in s3c24xx_serial_rx_drain_fifo()
795 ourport->rx_enabled = 1; in s3c24xx_serial_rx_drain_fifo()
805 port->icount.rx++; in s3c24xx_serial_rx_drain_fifo()
808 dev_dbg(port->dev, in s3c24xx_serial_rx_drain_fifo()
814 dev_dbg(port->dev, "break!\n"); in s3c24xx_serial_rx_drain_fifo()
815 port->icount.brk++; in s3c24xx_serial_rx_drain_fifo()
821 port->icount.frame++; in s3c24xx_serial_rx_drain_fifo()
823 port->icount.overrun++; in s3c24xx_serial_rx_drain_fifo()
825 uerstat &= port->read_status_mask; in s3c24xx_serial_rx_drain_fifo()
843 tty_flip_buffer_push(&port->state->port); in s3c24xx_serial_rx_drain_fifo()
848 struct uart_port *port = &ourport->port; in s3c24xx_serial_rx_chars_pio()
859 if (ourport->dma && ourport->dma->rx_chan) in s3c24xx_serial_rx_irq()
866 struct uart_port *port = &ourport->port; in s3c24xx_serial_tx_chars()
867 struct tty_port *tport = &port->state->port; in s3c24xx_serial_tx_chars()
870 count = kfifo_out_linear(&tport->xmit_fifo, &tail, UART_XMIT_SIZE); in s3c24xx_serial_tx_chars()
872 if (ourport->dma && ourport->dma->tx_chan && in s3c24xx_serial_tx_chars()
873 count >= ourport->min_dma_size) { in s3c24xx_serial_tx_chars()
874 int align = dma_get_cache_alignment() - in s3c24xx_serial_tx_chars()
875 (tail & (dma_get_cache_alignment() - 1)); in s3c24xx_serial_tx_chars()
876 if (count - align >= ourport->min_dma_size) { in s3c24xx_serial_tx_chars()
877 dma_count = count - align; in s3c24xx_serial_tx_chars()
883 if (port->x_char) { in s3c24xx_serial_tx_chars()
884 wr_reg(port, S3C2410_UTXH, port->x_char); in s3c24xx_serial_tx_chars()
885 port->icount.tx++; in s3c24xx_serial_tx_chars()
886 port->x_char = 0; in s3c24xx_serial_tx_chars()
890 /* if there isn't anything more to transmit, or the uart is now in s3c24xx_serial_tx_chars()
891 * stopped, disable the uart and exit in s3c24xx_serial_tx_chars()
894 if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)) { in s3c24xx_serial_tx_chars()
901 if (count > port->fifosize) { in s3c24xx_serial_tx_chars()
902 count = port->fifosize; in s3c24xx_serial_tx_chars()
906 while (!(rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull)) { in s3c24xx_serial_tx_chars()
913 count--; in s3c24xx_serial_tx_chars()
921 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in s3c24xx_serial_tx_chars()
924 if (kfifo_is_empty(&tport->xmit_fifo)) in s3c24xx_serial_tx_chars()
930 struct uart_port *port = &ourport->port; in s3c24xx_serial_tx_irq()
944 const struct uart_port *port = &ourport->port; in s3c64xx_serial_handle_irq()
963 const struct uart_port *port = &ourport->port; in apple_serial_handle_irq()
989 if ((ufstat & info->tx_fifomask) || in s3c24xx_serial_tx_empty()
990 (ufstat & info->tx_fifofull)) in s3c24xx_serial_tx_empty()
1050 struct s3c24xx_uart_dma *dma = p->dma; in s3c24xx_serial_request_dma()
1056 dma->rx_conf.direction = DMA_DEV_TO_MEM; in s3c24xx_serial_request_dma()
1057 dma->rx_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; in s3c24xx_serial_request_dma()
1058 dma->rx_conf.src_addr = p->port.mapbase + S3C2410_URXH; in s3c24xx_serial_request_dma()
1059 dma->rx_conf.src_maxburst = 1; in s3c24xx_serial_request_dma()
1061 dma->tx_conf.direction = DMA_MEM_TO_DEV; in s3c24xx_serial_request_dma()
1062 dma->tx_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; in s3c24xx_serial_request_dma()
1063 dma->tx_conf.dst_addr = p->port.mapbase + S3C2410_UTXH; in s3c24xx_serial_request_dma()
1064 dma->tx_conf.dst_maxburst = 1; in s3c24xx_serial_request_dma()
1066 dma->rx_chan = dma_request_chan(p->port.dev, "rx"); in s3c24xx_serial_request_dma()
1068 if (IS_ERR(dma->rx_chan)) { in s3c24xx_serial_request_dma()
1070 ret = PTR_ERR(dma->rx_chan); in s3c24xx_serial_request_dma()
1074 ret = dma_get_slave_caps(dma->rx_chan, &dma_caps); in s3c24xx_serial_request_dma()
1078 ret = -EOPNOTSUPP; in s3c24xx_serial_request_dma()
1082 dmaengine_slave_config(dma->rx_chan, &dma->rx_conf); in s3c24xx_serial_request_dma()
1084 dma->tx_chan = dma_request_chan(p->port.dev, "tx"); in s3c24xx_serial_request_dma()
1085 if (IS_ERR(dma->tx_chan)) { in s3c24xx_serial_request_dma()
1087 ret = PTR_ERR(dma->tx_chan); in s3c24xx_serial_request_dma()
1091 ret = dma_get_slave_caps(dma->tx_chan, &dma_caps); in s3c24xx_serial_request_dma()
1095 ret = -EOPNOTSUPP; in s3c24xx_serial_request_dma()
1099 dmaengine_slave_config(dma->tx_chan, &dma->tx_conf); in s3c24xx_serial_request_dma()
1102 dma->rx_size = PAGE_SIZE; in s3c24xx_serial_request_dma()
1104 dma->rx_buf = kmalloc(dma->rx_size, GFP_KERNEL); in s3c24xx_serial_request_dma()
1105 if (!dma->rx_buf) { in s3c24xx_serial_request_dma()
1106 ret = -ENOMEM; in s3c24xx_serial_request_dma()
1110 dma->rx_addr = dma_map_single(dma->rx_chan->device->dev, dma->rx_buf, in s3c24xx_serial_request_dma()
1111 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_serial_request_dma()
1112 if (dma_mapping_error(dma->rx_chan->device->dev, dma->rx_addr)) { in s3c24xx_serial_request_dma()
1114 ret = -EIO; in s3c24xx_serial_request_dma()
1119 dma->tx_addr = dma_map_single(dma->tx_chan->device->dev, in s3c24xx_serial_request_dma()
1120 p->port.state->port.xmit_buf, in s3c24xx_serial_request_dma()
1123 if (dma_mapping_error(dma->tx_chan->device->dev, dma->tx_addr)) { in s3c24xx_serial_request_dma()
1125 ret = -EIO; in s3c24xx_serial_request_dma()
1132 dma_unmap_single(dma->rx_chan->device->dev, dma->rx_addr, in s3c24xx_serial_request_dma()
1133 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_serial_request_dma()
1135 kfree(dma->rx_buf); in s3c24xx_serial_request_dma()
1137 dma_release_channel(dma->tx_chan); in s3c24xx_serial_request_dma()
1139 dma_release_channel(dma->rx_chan); in s3c24xx_serial_request_dma()
1142 dev_warn(p->port.dev, "%s, DMA will not be used\n", reason); in s3c24xx_serial_request_dma()
1148 struct s3c24xx_uart_dma *dma = p->dma; in s3c24xx_serial_release_dma()
1150 if (dma->rx_chan) { in s3c24xx_serial_release_dma()
1151 dmaengine_terminate_all(dma->rx_chan); in s3c24xx_serial_release_dma()
1152 dma_unmap_single(dma->rx_chan->device->dev, dma->rx_addr, in s3c24xx_serial_release_dma()
1153 dma->rx_size, DMA_FROM_DEVICE); in s3c24xx_serial_release_dma()
1154 kfree(dma->rx_buf); in s3c24xx_serial_release_dma()
1155 dma_release_channel(dma->rx_chan); in s3c24xx_serial_release_dma()
1156 dma->rx_chan = NULL; in s3c24xx_serial_release_dma()
1159 if (dma->tx_chan) { in s3c24xx_serial_release_dma()
1160 dmaengine_terminate_all(dma->tx_chan); in s3c24xx_serial_release_dma()
1161 dma_unmap_single(dma->tx_chan->device->dev, dma->tx_addr, in s3c24xx_serial_release_dma()
1163 dma_release_channel(dma->tx_chan); in s3c24xx_serial_release_dma()
1164 dma->tx_chan = NULL; in s3c24xx_serial_release_dma()
1172 ourport->tx_enabled = 0; in s3c64xx_serial_shutdown()
1173 ourport->tx_mode = 0; in s3c64xx_serial_shutdown()
1174 ourport->rx_enabled = 0; in s3c64xx_serial_shutdown()
1176 free_irq(port->irq, ourport); in s3c64xx_serial_shutdown()
1181 if (ourport->dma) in s3c64xx_serial_shutdown()
1184 ourport->tx_in_progress = 0; in s3c64xx_serial_shutdown()
1202 free_irq(port->irq, ourport); in apple_s5l_serial_shutdown()
1204 ourport->tx_enabled = 0; in apple_s5l_serial_shutdown()
1205 ourport->tx_mode = 0; in apple_s5l_serial_shutdown()
1206 ourport->rx_enabled = 0; in apple_s5l_serial_shutdown()
1208 if (ourport->dma) in apple_s5l_serial_shutdown()
1211 ourport->tx_in_progress = 0; in apple_s5l_serial_shutdown()
1222 if (ourport->dma) { in s3c64xx_serial_startup()
1225 devm_kfree(port->dev, ourport->dma); in s3c64xx_serial_startup()
1226 ourport->dma = NULL; in s3c64xx_serial_startup()
1230 ret = request_irq(port->irq, s3c64xx_serial_handle_irq, IRQF_SHARED, in s3c64xx_serial_startup()
1233 dev_err(port->dev, "cannot get irq %d\n", port->irq); in s3c64xx_serial_startup()
1238 ourport->rx_enabled = 1; in s3c64xx_serial_startup()
1239 ourport->tx_enabled = 0; in s3c64xx_serial_startup()
1268 ret = request_irq(port->irq, apple_serial_handle_irq, 0, in apple_s5l_serial_startup()
1271 dev_err(port->dev, "cannot get irq %d\n", port->irq); in apple_s5l_serial_startup()
1276 ourport->rx_enabled = 1; in apple_s5l_serial_startup()
1277 ourport->tx_enabled = 0; in apple_s5l_serial_startup()
1305 ourport->pm_level = level; in s3c24xx_serial_pm()
1309 while (--timeout && !s3c24xx_serial_txempty_nofifo(port)) in s3c24xx_serial_pm()
1312 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_pm()
1313 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_pm()
1315 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_pm()
1319 clk_prepare_enable(ourport->clk); in s3c24xx_serial_pm()
1321 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_pm()
1322 clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_pm()
1325 dev_err(port->dev, "s3c24xx_serial: unknown pm %d\n", level); in s3c24xx_serial_pm()
1349 if (info->num_clks == 1) in s3c24xx_serial_getsource()
1353 ucon &= info->clksel_mask; in s3c24xx_serial_getsource()
1354 return ucon >> info->clksel_shift; in s3c24xx_serial_getsource()
1362 if (info->num_clks == 1) in s3c24xx_serial_setsource()
1366 if ((ucon & info->clksel_mask) >> info->clksel_shift == clk_sel) in s3c24xx_serial_setsource()
1369 ucon &= ~info->clksel_mask; in s3c24xx_serial_setsource()
1370 ucon |= clk_sel << info->clksel_shift; in s3c24xx_serial_setsource()
1378 const struct s3c24xx_uart_info *info = ourport->info; in s3c24xx_serial_getclk()
1383 int calc_deviation, deviation = (1 << 30) - 1; in s3c24xx_serial_getclk()
1386 for (cnt = 0; cnt < info->num_clks; cnt++) { in s3c24xx_serial_getclk()
1388 if (ourport->cfg->clk_sel && in s3c24xx_serial_getclk()
1389 !(ourport->cfg->clk_sel & (1 << cnt))) in s3c24xx_serial_getclk()
1393 clk = clk_get(ourport->port.dev, clkname); in s3c24xx_serial_getclk()
1399 dev_err(ourport->port.dev, in s3c24xx_serial_getclk()
1405 if (ourport->info->has_divslot) { in s3c24xx_serial_getclk()
1422 quot--; in s3c24xx_serial_getclk()
1424 calc_deviation = abs(req_baud - baud); in s3c24xx_serial_getclk()
1475 struct clk *clk = ERR_PTR(-EINVAL); in s3c24xx_serial_set_termios()
1485 termios->c_cflag &= ~(HUPCL | CMSPAR); in s3c24xx_serial_set_termios()
1486 termios->c_cflag |= CLOCAL; in s3c24xx_serial_set_termios()
1494 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) in s3c24xx_serial_set_termios()
1495 quot = port->custom_divisor; in s3c24xx_serial_set_termios()
1501 if (ourport->baudclk != clk) { in s3c24xx_serial_set_termios()
1506 if (!IS_ERR(ourport->baudclk)) { in s3c24xx_serial_set_termios()
1507 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_set_termios()
1508 ourport->baudclk = ERR_PTR(-EINVAL); in s3c24xx_serial_set_termios()
1511 ourport->baudclk = clk; in s3c24xx_serial_set_termios()
1512 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0; in s3c24xx_serial_set_termios()
1515 if (ourport->info->has_divslot) { in s3c24xx_serial_set_termios()
1516 unsigned int div = ourport->baudclk_rate / baud; in s3c24xx_serial_set_termios()
1518 if (cfg->has_fracval) { in s3c24xx_serial_set_termios()
1520 dev_dbg(port->dev, "fracval = %04x\n", udivslot); in s3c24xx_serial_set_termios()
1523 dev_dbg(port->dev, "udivslot = %04x (div %d)\n", in s3c24xx_serial_set_termios()
1528 switch (termios->c_cflag & CSIZE) { in s3c24xx_serial_set_termios()
1530 dev_dbg(port->dev, "config: 5bits/char\n"); in s3c24xx_serial_set_termios()
1534 dev_dbg(port->dev, "config: 6bits/char\n"); in s3c24xx_serial_set_termios()
1538 dev_dbg(port->dev, "config: 7bits/char\n"); in s3c24xx_serial_set_termios()
1543 dev_dbg(port->dev, "config: 8bits/char\n"); in s3c24xx_serial_set_termios()
1549 ulcon |= (cfg->ulcon & S3C2410_LCON_IRM); in s3c24xx_serial_set_termios()
1551 if (termios->c_cflag & CSTOPB) in s3c24xx_serial_set_termios()
1554 if (termios->c_cflag & PARENB) { in s3c24xx_serial_set_termios()
1555 if (termios->c_cflag & PARODD) in s3c24xx_serial_set_termios()
1565 dev_dbg(port->dev, in s3c24xx_serial_set_termios()
1572 port->status &= ~UPSTAT_AUTOCTS; in s3c24xx_serial_set_termios()
1575 if (termios->c_cflag & CRTSCTS) { in s3c24xx_serial_set_termios()
1579 port->status = UPSTAT_AUTOCTS; in s3c24xx_serial_set_termios()
1585 if (ourport->info->has_divslot) in s3c24xx_serial_set_termios()
1588 dev_dbg(port->dev, in s3c24xx_serial_set_termios()
1589 "uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n", in s3c24xx_serial_set_termios()
1595 * Update the per-port timeout. in s3c24xx_serial_set_termios()
1597 uart_update_timeout(port, termios->c_cflag, baud); in s3c24xx_serial_set_termios()
1602 port->read_status_mask = S3C2410_UERSTAT_OVERRUN; in s3c24xx_serial_set_termios()
1603 if (termios->c_iflag & INPCK) in s3c24xx_serial_set_termios()
1604 port->read_status_mask |= S3C2410_UERSTAT_FRAME | in s3c24xx_serial_set_termios()
1609 port->ignore_status_mask = 0; in s3c24xx_serial_set_termios()
1610 if (termios->c_iflag & IGNPAR) in s3c24xx_serial_set_termios()
1611 port->ignore_status_mask |= S3C2410_UERSTAT_OVERRUN; in s3c24xx_serial_set_termios()
1612 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR) in s3c24xx_serial_set_termios()
1613 port->ignore_status_mask |= S3C2410_UERSTAT_FRAME; in s3c24xx_serial_set_termios()
1618 if ((termios->c_cflag & CREAD) == 0) in s3c24xx_serial_set_termios()
1619 port->ignore_status_mask |= RXSTAT_DUMMY_READ; in s3c24xx_serial_set_termios()
1628 switch (ourport->info->type) { in s3c24xx_serial_type()
1643 port->type = info->port_type; in s3c24xx_serial_config_port()
1654 if (ser->type != PORT_UNKNOWN && ser->type != info->port_type) in s3c24xx_serial_verify_port()
1655 return -EINVAL; in s3c24xx_serial_verify_port()
1746 spin_lock_init(&port->lock); in s3c24xx_serial_init_port_default()
1748 port->uartclk = 0; in s3c24xx_serial_init_port_default()
1749 port->fifosize = 16; in s3c24xx_serial_init_port_default()
1750 port->flags = UPF_BOOT_AUTOCONF; in s3c24xx_serial_init_port_default()
1751 port->line = index; in s3c24xx_serial_init_port_default()
1765 ucon &= (info->clksel_mask | info->ucon_mask); in s3c24xx_serial_resetport()
1766 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); in s3c24xx_serial_resetport()
1769 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); in s3c24xx_serial_resetport()
1770 wr_regl(port, S3C2410_UFCON, cfg->ufcon); in s3c24xx_serial_resetport()
1778 struct device *dev = ourport->port.dev; in s3c24xx_serial_enable_baudclk()
1779 const struct s3c24xx_uart_info *info = ourport->info; in s3c24xx_serial_enable_baudclk()
1785 clk_sel = ourport->cfg->clk_sel ? : info->def_clk_sel; in s3c24xx_serial_enable_baudclk()
1786 for (clk_num = 0; clk_num < info->num_clks; clk_num++) { in s3c24xx_serial_enable_baudclk()
1801 ourport->baudclk = clk; in s3c24xx_serial_enable_baudclk()
1802 ourport->baudclk_rate = clk_get_rate(clk); in s3c24xx_serial_enable_baudclk()
1803 s3c24xx_serial_setsource(&ourport->port, clk_num); in s3c24xx_serial_enable_baudclk()
1808 return -EINVAL; in s3c24xx_serial_enable_baudclk()
1819 struct uart_port *port = &ourport->port; in s3c24xx_serial_init_port()
1820 const struct s3c2410_uartcfg *cfg = ourport->cfg; in s3c24xx_serial_init_port()
1825 return -ENODEV; in s3c24xx_serial_init_port()
1827 if (port->mapbase != 0) in s3c24xx_serial_init_port()
1828 return -EINVAL; in s3c24xx_serial_init_port()
1831 port->dev = &platdev->dev; in s3c24xx_serial_init_port()
1833 port->uartclk = 1; in s3c24xx_serial_init_port()
1835 if (cfg->uart_flags & UPF_CONS_FLOW) { in s3c24xx_serial_init_port()
1836 dev_dbg(port->dev, "enabling flow control\n"); in s3c24xx_serial_init_port()
1837 port->flags |= UPF_CONS_FLOW; in s3c24xx_serial_init_port()
1840 /* sort our the physical and virtual addresses for each UART */ in s3c24xx_serial_init_port()
1844 dev_err(port->dev, "failed to find memory resource for uart\n"); in s3c24xx_serial_init_port()
1845 return -EINVAL; in s3c24xx_serial_init_port()
1848 dev_dbg(port->dev, "resource %pR)\n", res); in s3c24xx_serial_init_port()
1850 port->membase = devm_ioremap_resource(port->dev, res); in s3c24xx_serial_init_port()
1851 if (IS_ERR(port->membase)) { in s3c24xx_serial_init_port()
1852 dev_err(port->dev, "failed to remap controller address\n"); in s3c24xx_serial_init_port()
1853 return -EBUSY; in s3c24xx_serial_init_port()
1856 port->mapbase = res->start; in s3c24xx_serial_init_port()
1859 port->irq = 0; in s3c24xx_serial_init_port()
1861 port->irq = ret; in s3c24xx_serial_init_port()
1862 ourport->rx_irq = ret; in s3c24xx_serial_init_port()
1863 ourport->tx_irq = ret + 1; in s3c24xx_serial_init_port()
1870 if (platdev->dev.of_node && of_find_property(platdev->dev.of_node, in s3c24xx_serial_init_port()
1872 ourport->dma = devm_kzalloc(port->dev, in s3c24xx_serial_init_port()
1873 sizeof(*ourport->dma), in s3c24xx_serial_init_port()
1875 if (!ourport->dma) { in s3c24xx_serial_init_port()
1876 ret = -ENOMEM; in s3c24xx_serial_init_port()
1881 ourport->clk = clk_get(&platdev->dev, "uart"); in s3c24xx_serial_init_port()
1882 if (IS_ERR(ourport->clk)) { in s3c24xx_serial_init_port()
1884 dev_name(&platdev->dev)); in s3c24xx_serial_init_port()
1885 ret = PTR_ERR(ourport->clk); in s3c24xx_serial_init_port()
1889 ret = clk_prepare_enable(ourport->clk); in s3c24xx_serial_init_port()
1891 pr_err("uart: clock failed to prepare+enable: %d\n", ret); in s3c24xx_serial_init_port()
1892 clk_put(ourport->clk); in s3c24xx_serial_init_port()
1898 pr_warn("uart: failed to enable baudclk\n"); in s3c24xx_serial_init_port()
1901 switch (ourport->info->type) { in s3c24xx_serial_init_port()
1923 dev_dbg(port->dev, "port: map=%pa, mem=%p, irq=%d (%d,%d), clock=%u\n", in s3c24xx_serial_init_port()
1924 &port->mapbase, port->membase, port->irq, in s3c24xx_serial_init_port()
1925 ourport->rx_irq, ourport->tx_irq, port->uartclk); in s3c24xx_serial_init_port()
1927 /* reset the fifos (and setup the uart) */ in s3c24xx_serial_init_port()
1933 port->mapbase = 0; in s3c24xx_serial_init_port()
1944 if (dev_of_node(&pdev->dev)) in s3c24xx_get_driver_data()
1945 return of_device_get_match_data(&pdev->dev); in s3c24xx_get_driver_data()
1948 platform_get_device_id(pdev)->driver_data; in s3c24xx_get_driver_data()
1953 struct device_node *np = pdev->dev.of_node; in s3c24xx_serial_probe()
1965 dev_err(&pdev->dev, "serial%d out of range\n", index); in s3c24xx_serial_probe()
1966 return -EINVAL; in s3c24xx_serial_probe()
1972 ourport->drv_data = s3c24xx_get_driver_data(pdev); in s3c24xx_serial_probe()
1973 if (!ourport->drv_data) { in s3c24xx_serial_probe()
1974 dev_err(&pdev->dev, "could not find driver data\n"); in s3c24xx_serial_probe()
1975 return -ENODEV; in s3c24xx_serial_probe()
1978 ourport->baudclk = ERR_PTR(-EINVAL); in s3c24xx_serial_probe()
1979 ourport->info = &ourport->drv_data->info; in s3c24xx_serial_probe()
1980 ourport->cfg = (dev_get_platdata(&pdev->dev)) ? in s3c24xx_serial_probe()
1981 dev_get_platdata(&pdev->dev) : in s3c24xx_serial_probe()
1982 &ourport->drv_data->def_cfg; in s3c24xx_serial_probe()
1984 switch (ourport->info->type) { in s3c24xx_serial_probe()
1986 ourport->port.ops = &s3c64xx_serial_ops; in s3c24xx_serial_probe()
1989 ourport->port.ops = &apple_s5l_serial_ops; in s3c24xx_serial_probe()
1993 ourport->port.iotype = ourport->info->iotype; in s3c24xx_serial_probe()
1996 fifosize_prop = of_property_read_u32(np, "samsung,uart-fifosize", in s3c24xx_serial_probe()
1997 &ourport->port.fifosize); in s3c24xx_serial_probe()
1999 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { in s3c24xx_serial_probe()
2002 ourport->port.iotype = UPIO_MEM; in s3c24xx_serial_probe()
2005 ourport->port.iotype = UPIO_MEM32; in s3c24xx_serial_probe()
2008 dev_warn(&pdev->dev, "unsupported reg-io-width (%d)\n", in s3c24xx_serial_probe()
2010 return -EINVAL; in s3c24xx_serial_probe()
2016 if (ourport->drv_data->fifosize[index]) in s3c24xx_serial_probe()
2017 ourport->port.fifosize = ourport->drv_data->fifosize[index]; in s3c24xx_serial_probe()
2018 else if (ourport->info->fifosize) in s3c24xx_serial_probe()
2019 ourport->port.fifosize = ourport->info->fifosize; in s3c24xx_serial_probe()
2022 ourport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SAMSUNG_CONSOLE); in s3c24xx_serial_probe()
2028 ourport->min_dma_size = max_t(int, ourport->port.fifosize, in s3c24xx_serial_probe()
2031 dev_dbg(&pdev->dev, "%s: initialising port %p...\n", __func__, ourport); in s3c24xx_serial_probe()
2040 pr_err("Failed to register Samsung UART driver\n"); in s3c24xx_serial_probe()
2045 dev_dbg(&pdev->dev, "%s: adding port\n", __func__); in s3c24xx_serial_probe()
2046 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); in s3c24xx_serial_probe()
2047 platform_set_drvdata(pdev, &ourport->port); in s3c24xx_serial_probe()
2051 * so that a potential re-enablement through the pm-callback overlaps in s3c24xx_serial_probe()
2054 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_probe()
2055 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_probe()
2056 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_probe()
2065 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); in s3c24xx_serial_remove()
2073 /* UART power management code */
2091 clk_prepare_enable(ourport->clk); in s3c24xx_serial_resume()
2092 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume()
2093 clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_resume()
2095 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume()
2096 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_resume()
2097 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume()
2112 switch (ourport->info->type) { in s3c24xx_serial_resume_noirq()
2116 if (ourport->tx_enabled) in s3c24xx_serial_resume_noirq()
2118 if (ourport->rx_enabled) in s3c24xx_serial_resume_noirq()
2120 clk_prepare_enable(ourport->clk); in s3c24xx_serial_resume_noirq()
2121 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume_noirq()
2122 clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2124 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume_noirq()
2125 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2126 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume_noirq()
2133 ret = clk_prepare_enable(ourport->clk); in s3c24xx_serial_resume_noirq()
2138 if (!IS_ERR(ourport->baudclk)) { in s3c24xx_serial_resume_noirq()
2139 ret = clk_prepare_enable(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2142 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume_noirq()
2154 if (ourport->tx_enabled) in s3c24xx_serial_resume_noirq()
2156 if (ourport->rx_enabled) in s3c24xx_serial_resume_noirq()
2163 if (!IS_ERR(ourport->baudclk)) in s3c24xx_serial_resume_noirq()
2164 clk_disable_unprepare(ourport->baudclk); in s3c24xx_serial_resume_noirq()
2165 clk_disable_unprepare(ourport->clk); in s3c24xx_serial_resume_noirq()
2200 /* fifo mode - check amount of data in fifo registers... */ in s3c24xx_serial_console_txrdy()
2203 return !(ufstat & info->tx_fifofull); in s3c24xx_serial_console_txrdy()
2206 /* in non-fifo mode, we go and use the tx buffer empty */ in s3c24xx_serial_console_txrdy()
2221 * Console polling routines for writing and reading from the uart while
2276 if (cons_uart->sysrq) in s3c24xx_serial_console_write()
2340 clk = clk_get(port->dev, clk_name); in s3c24xx_serial_get_options()
2347 dev_dbg(port->dev, "calculated baud %d\n", *baud); in s3c24xx_serial_get_options()
2363 if (co->index == -1 || co->index >= UART_NR) in s3c24xx_serial_console_setup()
2364 co->index = 0; in s3c24xx_serial_console_setup()
2366 port = &s3c24xx_serial_ports[co->index].port; in s3c24xx_serial_console_setup()
2370 if (port->mapbase == 0x0) in s3c24xx_serial_console_setup()
2371 return -ENODEV; in s3c24xx_serial_console_setup()
2376 * Check whether an invalid uart number has been specified, and in s3c24xx_serial_console_setup()
2385 dev_dbg(port->dev, "baud %d\n", baud); in s3c24xx_serial_console_setup()
2394 .index = -1,
2404 .name = "Samsung S3C6400 UART",
2434 .name = "Samsung S5PV210 UART",
2464 .name = "Samsung Exynos UART", \
2503 .name = "Google GS101 UART",
2524 /* samsung,uart-fifosize must be specified in the device tree. */
2543 .name = "Apple S5L UART",
2573 .name = "Axis ARTPEC-8 UART",
2603 .name = "s3c6400-uart",
2606 .name = "s5pv210-uart",
2609 .name = "exynos4210-uart",
2612 .name = "exynos5433-uart",
2615 .name = "s5l-uart",
2618 .name = "exynos850-uart",
2621 .name = "artpec8-uart",
2624 .name = "gs101-uart",
2633 { .compatible = "samsung,s3c6400-uart",
2635 { .compatible = "samsung,s5pv210-uart",
2637 { .compatible = "samsung,exynos4210-uart",
2639 { .compatible = "samsung,exynos5433-uart",
2641 { .compatible = "apple,s5l-uart",
2643 { .compatible = "samsung,exynos850-uart",
2645 { .compatible = "axis,artpec8-uart",
2647 { .compatible = "google,gs101-uart",
2659 .name = "samsung-uart",
2696 switch (port->iotype) { in wr_reg_barrier()
2713 while (!(readl(port->membase + S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXFE)) in samsung_early_busyuart()
2719 const struct samsung_early_console_data *data = port->private_data; in samsung_early_busyuart_fifo()
2721 while (readl(port->membase + S3C2410_UFSTAT) & data->txfull_mask) in samsung_early_busyuart_fifo()
2727 if (readl(port->membase + S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) in samsung_early_putc()
2738 struct earlycon_device *dev = con->data; in samsung_early_write()
2740 uart_console_write(&dev->port, s, n, samsung_early_putc); in samsung_early_write()
2745 struct earlycon_device *dev = con->data; in samsung_early_read()
2746 const struct samsung_early_console_data *data = dev->port.private_data; in samsung_early_read()
2751 ufstat = rd_regl(&dev->port, S3C2410_UFSTAT); in samsung_early_read()
2752 if (!(ufstat & data->rxfifo_mask)) in samsung_early_read()
2754 ch = rd_reg(&dev->port, S3C2410_URXH); in samsung_early_read()
2767 if (!device->port.membase) in samsung_early_console_setup()
2768 return -ENODEV; in samsung_early_console_setup()
2770 device->con->write = samsung_early_write; in samsung_early_console_setup()
2771 device->con->read = samsung_early_read; in samsung_early_console_setup()
2790 device->port.private_data = &s3c2440_early_console_data; in s3c2440_early_console_setup()
2794 OF_EARLYCON_DECLARE(s3c6400, "samsung,s3c6400-uart",
2806 device->port.private_data = &s5pv210_early_console_data; in s5pv210_early_console_setup()
2810 OF_EARLYCON_DECLARE(s5pv210, "samsung,s5pv210-uart",
2812 OF_EARLYCON_DECLARE(exynos4210, "samsung,exynos4210-uart",
2814 OF_EARLYCON_DECLARE(artpec8, "axis,artpec8-uart",
2821 device->port.iotype = UPIO_MEM32; in gs101_early_console_setup()
2826 OF_EARLYCON_DECLARE(gs101, "google,gs101-uart", gs101_early_console_setup);
2832 /* Apple A7-A11 requires MMIO32 register accesses. */ in apple_s5l_early_console_setup()
2833 device->port.iotype = UPIO_MEM32; in apple_s5l_early_console_setup()
2836 device->port.private_data = &s3c2410_early_console_data; in apple_s5l_early_console_setup()
2840 __set_fixmap(FIX_EARLYCON_MEM_BASE, device->port.mapbase, in apple_s5l_early_console_setup()
2846 OF_EARLYCON_DECLARE(s5l, "apple,s5l-uart", apple_s5l_early_console_setup);
2849 MODULE_ALIAS("platform:samsung-uart");