Lines Matching refs:uap
80 #define pmz_debug(fmt, arg...) pr_debug("ttyPZ%d: " fmt, uap->port.line, ## arg)
81 #define pmz_error(fmt, arg...) pr_err("ttyPZ%d: " fmt, uap->port.line, ## arg)
82 #define pmz_info(fmt, arg...) pr_info("ttyPZ%d: " fmt, uap->port.line, ## arg)
105 static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs) in pmz_load_zsregs() argument
111 unsigned char stat = read_zsreg(uap, R1); in pmz_load_zsregs()
117 ZS_CLEARERR(uap); in pmz_load_zsregs()
118 zssync(uap); in pmz_load_zsregs()
119 ZS_CLEARFIFO(uap); in pmz_load_zsregs()
120 zssync(uap); in pmz_load_zsregs()
121 ZS_CLEARERR(uap); in pmz_load_zsregs()
124 write_zsreg(uap, R1, in pmz_load_zsregs()
128 write_zsreg(uap, R4, regs[R4]); in pmz_load_zsregs()
131 write_zsreg(uap, R10, regs[R10]); in pmz_load_zsregs()
134 write_zsreg(uap, R3, regs[R3] & ~RxENABLE); in pmz_load_zsregs()
135 write_zsreg(uap, R5, regs[R5] & ~TxENABLE); in pmz_load_zsregs()
138 write_zsreg(uap, R15, regs[R15] | EN85C30); in pmz_load_zsregs()
139 write_zsreg(uap, R7, regs[R7P]); in pmz_load_zsregs()
142 write_zsreg(uap, R15, regs[R15] & ~EN85C30); in pmz_load_zsregs()
145 write_zsreg(uap, R6, regs[R6]); in pmz_load_zsregs()
146 write_zsreg(uap, R7, regs[R7]); in pmz_load_zsregs()
149 write_zsreg(uap, R14, regs[R14] & ~BRENAB); in pmz_load_zsregs()
152 write_zsreg(uap, R11, regs[R11]); in pmz_load_zsregs()
155 write_zsreg(uap, R12, regs[R12]); in pmz_load_zsregs()
156 write_zsreg(uap, R13, regs[R13]); in pmz_load_zsregs()
159 write_zsreg(uap, R14, regs[R14]); in pmz_load_zsregs()
162 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs()
163 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs()
166 write_zsreg(uap, R3, regs[R3]); in pmz_load_zsregs()
167 write_zsreg(uap, R5, regs[R5]); in pmz_load_zsregs()
170 write_zsreg(uap, R1, regs[R1]); in pmz_load_zsregs()
173 write_zsreg(uap, R9, regs[R9]); in pmz_load_zsregs()
184 static void pmz_maybe_update_regs(struct uart_pmac_port *uap) in pmz_maybe_update_regs() argument
186 if (!ZS_REGS_HELD(uap)) { in pmz_maybe_update_regs()
187 if (ZS_TX_ACTIVE(uap)) { in pmz_maybe_update_regs()
188 uap->flags |= PMACZILOG_FLAG_REGS_HELD; in pmz_maybe_update_regs()
191 pmz_load_zsregs(uap, uap->curregs); in pmz_maybe_update_regs()
196 static void pmz_interrupt_control(struct uart_pmac_port *uap, int enable) in pmz_interrupt_control() argument
199 uap->curregs[1] |= INT_ALL_Rx | TxINT_ENAB; in pmz_interrupt_control()
200 if (!ZS_IS_EXTCLK(uap)) in pmz_interrupt_control()
201 uap->curregs[1] |= EXT_INT_ENAB; in pmz_interrupt_control()
203 uap->curregs[1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in pmz_interrupt_control()
205 write_zsreg(uap, R1, uap->curregs[1]); in pmz_interrupt_control()
208 static bool pmz_receive_chars(struct uart_pmac_port *uap) in pmz_receive_chars() argument
209 __must_hold(&uap->port.lock) in pmz_receive_chars()
215 if (uap->port.state == NULL) { in pmz_receive_chars()
217 (void)read_zsdata(uap); in pmz_receive_chars()
220 port = &uap->port.state->port; in pmz_receive_chars()
225 r1 = read_zsreg(uap, R1); in pmz_receive_chars()
226 ch = read_zsdata(uap); in pmz_receive_chars()
229 write_zsreg(uap, R0, ERR_RES); in pmz_receive_chars()
230 zssync(uap); in pmz_receive_chars()
233 ch &= uap->parity_mask; in pmz_receive_chars()
234 if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) { in pmz_receive_chars()
235 uap->flags &= ~PMACZILOG_FLAG_BREAK; in pmz_receive_chars()
242 uap->port.sysrq = jiffies + HZ*5; in pmz_receive_chars()
246 if (uap->port.sysrq) { in pmz_receive_chars()
248 uart_port_unlock(&uap->port); in pmz_receive_chars()
249 swallow = uart_handle_sysrq_char(&uap->port, ch); in pmz_receive_chars()
250 uart_port_lock(&uap->port); in pmz_receive_chars()
261 uap->port.icount.rx++; in pmz_receive_chars()
267 uap->port.icount.brk++; in pmz_receive_chars()
268 if (uart_handle_break(&uap->port)) in pmz_receive_chars()
272 uap->port.icount.parity++; in pmz_receive_chars()
274 uap->port.icount.frame++; in pmz_receive_chars()
276 uap->port.icount.overrun++; in pmz_receive_chars()
277 r1 &= uap->port.read_status_mask; in pmz_receive_chars()
286 if (uap->port.ignore_status_mask == 0xff || in pmz_receive_chars()
287 (r1 & uap->port.ignore_status_mask) == 0) { in pmz_receive_chars()
293 ch = read_zsreg(uap, R0); in pmz_receive_chars()
301 static void pmz_status_handle(struct uart_pmac_port *uap) in pmz_status_handle() argument
305 status = read_zsreg(uap, R0); in pmz_status_handle()
306 write_zsreg(uap, R0, RES_EXT_INT); in pmz_status_handle()
307 zssync(uap); in pmz_status_handle()
309 if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) { in pmz_status_handle()
311 uap->port.icount.dsr++; in pmz_status_handle()
318 if ((status ^ uap->prev_status) & DCD) in pmz_status_handle()
319 uart_handle_dcd_change(&uap->port, in pmz_status_handle()
321 if ((status ^ uap->prev_status) & CTS) in pmz_status_handle()
322 uart_handle_cts_change(&uap->port, in pmz_status_handle()
325 wake_up_interruptible(&uap->port.state->port.delta_msr_wait); in pmz_status_handle()
329 uap->flags |= PMACZILOG_FLAG_BREAK; in pmz_status_handle()
331 uap->prev_status = status; in pmz_status_handle()
334 static void pmz_transmit_chars(struct uart_pmac_port *uap) in pmz_transmit_chars() argument
339 if (ZS_IS_CONS(uap)) { in pmz_transmit_chars()
340 unsigned char status = read_zsreg(uap, R0); in pmz_transmit_chars()
354 uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE; in pmz_transmit_chars()
356 if (ZS_REGS_HELD(uap)) { in pmz_transmit_chars()
357 pmz_load_zsregs(uap, uap->curregs); in pmz_transmit_chars()
358 uap->flags &= ~PMACZILOG_FLAG_REGS_HELD; in pmz_transmit_chars()
361 if (ZS_TX_STOPPED(uap)) { in pmz_transmit_chars()
362 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED; in pmz_transmit_chars()
374 if (!ZS_IS_OPEN(uap)) in pmz_transmit_chars()
377 if (uap->port.x_char) { in pmz_transmit_chars()
378 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; in pmz_transmit_chars()
379 write_zsdata(uap, uap->port.x_char); in pmz_transmit_chars()
380 zssync(uap); in pmz_transmit_chars()
381 uap->port.icount.tx++; in pmz_transmit_chars()
382 uap->port.x_char = 0; in pmz_transmit_chars()
386 if (uap->port.state == NULL) in pmz_transmit_chars()
388 tport = &uap->port.state->port; in pmz_transmit_chars()
390 uart_write_wakeup(&uap->port); in pmz_transmit_chars()
393 if (uart_tx_stopped(&uap->port)) in pmz_transmit_chars()
396 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; in pmz_transmit_chars()
397 WARN_ON(!uart_fifo_get(&uap->port, &ch)); in pmz_transmit_chars()
398 write_zsdata(uap, ch); in pmz_transmit_chars()
399 zssync(uap); in pmz_transmit_chars()
402 uart_write_wakeup(&uap->port); in pmz_transmit_chars()
407 write_zsreg(uap, R0, RES_Tx_P); in pmz_transmit_chars()
408 zssync(uap); in pmz_transmit_chars()
414 struct uart_pmac_port *uap = dev_id; in pmz_interrupt() local
421 uap_a = pmz_get_port_A(uap); in pmz_interrupt()
447 tty_flip_buffer_push(&uap->port.state->port); in pmz_interrupt()
472 tty_flip_buffer_push(&uap->port.state->port); in pmz_interrupt()
481 static inline u8 pmz_peek_status(struct uart_pmac_port *uap) in pmz_peek_status() argument
486 uart_port_lock_irqsave(&uap->port, &flags); in pmz_peek_status()
487 status = read_zsreg(uap, R0); in pmz_peek_status()
488 uart_port_unlock_irqrestore(&uap->port, flags); in pmz_peek_status()
515 struct uart_pmac_port *uap = to_pmz(port); in pmz_set_mctrl() local
519 if (ZS_IS_IRDA(uap)) in pmz_set_mctrl()
522 if (!(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap))) in pmz_set_mctrl()
527 if (ZS_IS_INTMODEM(uap)) { in pmz_set_mctrl()
539 uap->curregs[R5] |= set_bits; in pmz_set_mctrl()
540 uap->curregs[R5] &= ~clear_bits; in pmz_set_mctrl()
542 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_set_mctrl()
544 set_bits, clear_bits, uap->curregs[R5]); in pmz_set_mctrl()
545 zssync(uap); in pmz_set_mctrl()
555 struct uart_pmac_port *uap = to_pmz(port); in pmz_get_mctrl() local
559 status = read_zsreg(uap, R0); in pmz_get_mctrl()
588 struct uart_pmac_port *uap = to_pmz(port); in pmz_start_tx() local
591 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; in pmz_start_tx()
592 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED; in pmz_start_tx()
594 status = read_zsreg(uap, R0); in pmz_start_tx()
604 write_zsdata(uap, port->x_char); in pmz_start_tx()
605 zssync(uap); in pmz_start_tx()
612 if (!uart_fifo_get(&uap->port, &ch)) in pmz_start_tx()
614 write_zsdata(uap, ch); in pmz_start_tx()
615 zssync(uap); in pmz_start_tx()
618 uart_write_wakeup(&uap->port); in pmz_start_tx()
630 struct uart_pmac_port *uap = to_pmz(port); in pmz_stop_rx() local
633 uap->curregs[R1] &= ~RxINT_MASK; in pmz_stop_rx()
634 pmz_maybe_update_regs(uap); in pmz_stop_rx()
643 struct uart_pmac_port *uap = to_pmz(port); in pmz_enable_ms() local
646 if (ZS_IS_IRDA(uap)) in pmz_enable_ms()
648 new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE); in pmz_enable_ms()
649 if (new_reg != uap->curregs[R15]) { in pmz_enable_ms()
650 uap->curregs[R15] = new_reg; in pmz_enable_ms()
653 write_zsreg(uap, R15, uap->curregs[R15]); in pmz_enable_ms()
663 struct uart_pmac_port *uap = to_pmz(port); in pmz_break_ctl() local
676 new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits; in pmz_break_ctl()
677 if (new_reg != uap->curregs[R5]) { in pmz_break_ctl()
678 uap->curregs[R5] = new_reg; in pmz_break_ctl()
679 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_break_ctl()
693 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state) in pmz_set_scc_power() argument
700 PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1); in pmz_set_scc_power()
702 if (ZS_IS_INTMODEM(uap)) { in pmz_set_scc_power()
704 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1); in pmz_set_scc_power()
712 if (ZS_IS_INTMODEM(uap)) { in pmz_set_scc_power()
714 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0); in pmz_set_scc_power()
717 pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0); in pmz_set_scc_power()
724 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state) in pmz_set_scc_power() argument
751 static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap) in pmz_fix_zero_bug_scc() argument
753 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB); in pmz_fix_zero_bug_scc()
754 zssync(uap); in pmz_fix_zero_bug_scc()
756 write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV); in pmz_fix_zero_bug_scc()
757 zssync(uap); in pmz_fix_zero_bug_scc()
759 write_zsreg(uap, 4, X1CLK | MONSYNC); in pmz_fix_zero_bug_scc()
760 write_zsreg(uap, 3, Rx8); in pmz_fix_zero_bug_scc()
761 write_zsreg(uap, 5, Tx8 | RTS); in pmz_fix_zero_bug_scc()
762 write_zsreg(uap, 9, NV); /* Didn't we already do this? */ in pmz_fix_zero_bug_scc()
763 write_zsreg(uap, 11, RCBR | TCBR); in pmz_fix_zero_bug_scc()
764 write_zsreg(uap, 12, 0); in pmz_fix_zero_bug_scc()
765 write_zsreg(uap, 13, 0); in pmz_fix_zero_bug_scc()
766 write_zsreg(uap, 14, (LOOPBAK | BRSRC)); in pmz_fix_zero_bug_scc()
767 write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB)); in pmz_fix_zero_bug_scc()
768 write_zsreg(uap, 3, Rx8 | RxENABLE); in pmz_fix_zero_bug_scc()
769 write_zsreg(uap, 0, RES_EXT_INT); in pmz_fix_zero_bug_scc()
770 write_zsreg(uap, 0, RES_EXT_INT); in pmz_fix_zero_bug_scc()
771 write_zsreg(uap, 0, RES_EXT_INT); /* to kill some time */ in pmz_fix_zero_bug_scc()
778 write_zsreg(uap, 9, NV); in pmz_fix_zero_bug_scc()
779 write_zsreg(uap, 4, X16CLK | SB_MASK); in pmz_fix_zero_bug_scc()
780 write_zsreg(uap, 3, Rx8); in pmz_fix_zero_bug_scc()
782 while (read_zsreg(uap, 0) & Rx_CH_AV) { in pmz_fix_zero_bug_scc()
783 (void)read_zsreg(uap, 8); in pmz_fix_zero_bug_scc()
784 write_zsreg(uap, 0, RES_EXT_INT); in pmz_fix_zero_bug_scc()
785 write_zsreg(uap, 0, ERR_RES); in pmz_fix_zero_bug_scc()
795 static int __pmz_startup(struct uart_pmac_port *uap) in __pmz_startup() argument
799 memset(&uap->curregs, 0, sizeof(uap->curregs)); in __pmz_startup()
802 pwr_delay = pmz_set_scc_power(uap, 1); in __pmz_startup()
805 pmz_fix_zero_bug_scc(uap); in __pmz_startup()
808 uap->curregs[R9] = 0; in __pmz_startup()
809 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB); in __pmz_startup()
810 zssync(uap); in __pmz_startup()
812 write_zsreg(uap, 9, 0); in __pmz_startup()
813 zssync(uap); in __pmz_startup()
816 write_zsreg(uap, R1, 0); in __pmz_startup()
817 write_zsreg(uap, R0, ERR_RES); in __pmz_startup()
818 write_zsreg(uap, R0, ERR_RES); in __pmz_startup()
819 write_zsreg(uap, R0, RES_H_IUS); in __pmz_startup()
820 write_zsreg(uap, R0, RES_H_IUS); in __pmz_startup()
823 uap->curregs[R4] = X16CLK | SB1; in __pmz_startup()
824 uap->curregs[R3] = Rx8; in __pmz_startup()
825 uap->curregs[R5] = Tx8 | RTS; in __pmz_startup()
826 if (!ZS_IS_IRDA(uap)) in __pmz_startup()
827 uap->curregs[R5] |= DTR; in __pmz_startup()
828 uap->curregs[R12] = 0; in __pmz_startup()
829 uap->curregs[R13] = 0; in __pmz_startup()
830 uap->curregs[R14] = BRENAB; in __pmz_startup()
833 uap->curregs[R15] = BRKIE; in __pmz_startup()
836 uap->curregs[R9] |= NV | MIE; in __pmz_startup()
838 pmz_load_zsregs(uap, uap->curregs); in __pmz_startup()
841 write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE); in __pmz_startup()
842 write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE); in __pmz_startup()
845 uap->prev_status = read_zsreg(uap, R0); in __pmz_startup()
850 static void pmz_irda_reset(struct uart_pmac_port *uap) in pmz_irda_reset() argument
854 uart_port_lock_irqsave(&uap->port, &flags); in pmz_irda_reset()
855 uap->curregs[R5] |= DTR; in pmz_irda_reset()
856 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_irda_reset()
857 zssync(uap); in pmz_irda_reset()
858 uart_port_unlock_irqrestore(&uap->port, flags); in pmz_irda_reset()
861 uart_port_lock_irqsave(&uap->port, &flags); in pmz_irda_reset()
862 uap->curregs[R5] &= ~DTR; in pmz_irda_reset()
863 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_irda_reset()
864 zssync(uap); in pmz_irda_reset()
865 uart_port_unlock_irqrestore(&uap->port, flags); in pmz_irda_reset()
875 struct uart_pmac_port *uap = to_pmz(port); in pmz_startup() local
879 uap->flags |= PMACZILOG_FLAG_IS_OPEN; in pmz_startup()
884 if (!ZS_IS_CONS(uap)) { in pmz_startup()
886 pwr_delay = __pmz_startup(uap); in pmz_startup()
889 sprintf(uap->irq_name, PMACZILOG_NAME"%d", uap->port.line); in pmz_startup()
890 if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED, in pmz_startup()
891 uap->irq_name, uap)) { in pmz_startup()
893 pmz_set_scc_power(uap, 0); in pmz_startup()
906 if (ZS_IS_IRDA(uap)) in pmz_startup()
907 pmz_irda_reset(uap); in pmz_startup()
911 pmz_interrupt_control(uap, 1); in pmz_startup()
919 struct uart_pmac_port *uap = to_pmz(port); in pmz_shutdown() local
925 pmz_interrupt_control(uap, 0); in pmz_shutdown()
927 if (!ZS_IS_CONS(uap)) { in pmz_shutdown()
929 uap->curregs[R3] &= ~RxENABLE; in pmz_shutdown()
930 uap->curregs[R5] &= ~TxENABLE; in pmz_shutdown()
933 uap->curregs[R5] &= ~SND_BRK; in pmz_shutdown()
934 pmz_maybe_update_regs(uap); in pmz_shutdown()
940 free_irq(uap->port.irq, uap); in pmz_shutdown()
944 uap->flags &= ~PMACZILOG_FLAG_IS_OPEN; in pmz_shutdown()
946 if (!ZS_IS_CONS(uap)) in pmz_shutdown()
947 pmz_set_scc_power(uap, 0); /* Shut the chip down */ in pmz_shutdown()
955 static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag, in pmz_convert_to_zs() argument
964 if (baud >= 115200 && ZS_IS_IRDA(uap)) { in pmz_convert_to_zs()
965 uap->curregs[R4] = X1CLK; in pmz_convert_to_zs()
966 uap->curregs[R11] = RCTRxCP | TCTRxCP; in pmz_convert_to_zs()
967 uap->curregs[R14] = 0; /* BRG off */ in pmz_convert_to_zs()
968 uap->curregs[R12] = 0; in pmz_convert_to_zs()
969 uap->curregs[R13] = 0; in pmz_convert_to_zs()
970 uap->flags |= PMACZILOG_FLAG_IS_EXTCLK; in pmz_convert_to_zs()
974 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
975 uap->curregs[R11] = 0; in pmz_convert_to_zs()
976 uap->curregs[R14] = 0; in pmz_convert_to_zs()
979 uap->curregs[R4] = X32CLK; in pmz_convert_to_zs()
980 uap->curregs[R11] = 0; in pmz_convert_to_zs()
981 uap->curregs[R14] = 0; in pmz_convert_to_zs()
984 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
985 uap->curregs[R11] = TCBR | RCBR; in pmz_convert_to_zs()
987 uap->curregs[R12] = (brg & 255); in pmz_convert_to_zs()
988 uap->curregs[R13] = ((brg >> 8) & 255); in pmz_convert_to_zs()
989 uap->curregs[R14] = BRENAB; in pmz_convert_to_zs()
991 uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK; in pmz_convert_to_zs()
995 uap->curregs[3] &= ~RxN_MASK; in pmz_convert_to_zs()
996 uap->curregs[5] &= ~TxN_MASK; in pmz_convert_to_zs()
1000 uap->curregs[3] |= Rx5; in pmz_convert_to_zs()
1001 uap->curregs[5] |= Tx5; in pmz_convert_to_zs()
1002 uap->parity_mask = 0x1f; in pmz_convert_to_zs()
1005 uap->curregs[3] |= Rx6; in pmz_convert_to_zs()
1006 uap->curregs[5] |= Tx6; in pmz_convert_to_zs()
1007 uap->parity_mask = 0x3f; in pmz_convert_to_zs()
1010 uap->curregs[3] |= Rx7; in pmz_convert_to_zs()
1011 uap->curregs[5] |= Tx7; in pmz_convert_to_zs()
1012 uap->parity_mask = 0x7f; in pmz_convert_to_zs()
1016 uap->curregs[3] |= Rx8; in pmz_convert_to_zs()
1017 uap->curregs[5] |= Tx8; in pmz_convert_to_zs()
1018 uap->parity_mask = 0xff; in pmz_convert_to_zs()
1021 uap->curregs[4] &= ~(SB_MASK); in pmz_convert_to_zs()
1023 uap->curregs[4] |= SB2; in pmz_convert_to_zs()
1025 uap->curregs[4] |= SB1; in pmz_convert_to_zs()
1027 uap->curregs[4] |= PAR_ENAB; in pmz_convert_to_zs()
1029 uap->curregs[4] &= ~PAR_ENAB; in pmz_convert_to_zs()
1031 uap->curregs[4] |= PAR_EVEN; in pmz_convert_to_zs()
1033 uap->curregs[4] &= ~PAR_EVEN; in pmz_convert_to_zs()
1035 uap->port.read_status_mask = Rx_OVR; in pmz_convert_to_zs()
1037 uap->port.read_status_mask |= CRC_ERR | PAR_ERR; in pmz_convert_to_zs()
1039 uap->port.read_status_mask |= BRK_ABRT; in pmz_convert_to_zs()
1041 uap->port.ignore_status_mask = 0; in pmz_convert_to_zs()
1043 uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR; in pmz_convert_to_zs()
1045 uap->port.ignore_status_mask |= BRK_ABRT; in pmz_convert_to_zs()
1047 uap->port.ignore_status_mask |= Rx_OVR; in pmz_convert_to_zs()
1051 uap->port.ignore_status_mask = 0xff; in pmz_convert_to_zs()
1058 static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud) in pmz_irda_setup() argument
1103 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0 in pmz_irda_setup()
1104 || (read_zsreg(uap, R1) & ALL_SNT) == 0) { in pmz_irda_setup()
1114 (void)read_zsdata(uap); in pmz_irda_setup()
1115 (void)read_zsdata(uap); in pmz_irda_setup()
1116 (void)read_zsdata(uap); in pmz_irda_setup()
1118 while (read_zsreg(uap, R0) & Rx_CH_AV) { in pmz_irda_setup()
1119 read_zsdata(uap); in pmz_irda_setup()
1128 uap->curregs[R5] |= DTR; in pmz_irda_setup()
1129 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_irda_setup()
1130 zssync(uap); in pmz_irda_setup()
1134 pmz_convert_to_zs(uap, CS8, 0, 19200); in pmz_irda_setup()
1135 pmz_load_zsregs(uap, uap->curregs); in pmz_irda_setup()
1139 write_zsdata(uap, 1); in pmz_irda_setup()
1141 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) { in pmz_irda_setup()
1148 version = read_zsdata(uap); in pmz_irda_setup()
1156 write_zsdata(uap, cmdbyte); in pmz_irda_setup()
1158 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) { in pmz_irda_setup()
1165 t = read_zsdata(uap); in pmz_irda_setup()
1172 (void)read_zsdata(uap); in pmz_irda_setup()
1173 (void)read_zsdata(uap); in pmz_irda_setup()
1174 (void)read_zsdata(uap); in pmz_irda_setup()
1178 uap->curregs[R5] &= ~DTR; in pmz_irda_setup()
1179 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_irda_setup()
1180 zssync(uap); in pmz_irda_setup()
1182 (void)read_zsdata(uap); in pmz_irda_setup()
1183 (void)read_zsdata(uap); in pmz_irda_setup()
1184 (void)read_zsdata(uap); in pmz_irda_setup()
1191 struct uart_pmac_port *uap = to_pmz(port); in __pmz_set_termios() local
1201 if (ZS_IS_IRDA(uap)) { in __pmz_set_termios()
1206 pmz_irda_setup(uap, &baud); in __pmz_set_termios()
1208 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud); in __pmz_set_termios()
1209 pmz_load_zsregs(uap, uap->curregs); in __pmz_set_termios()
1210 zssync(uap); in __pmz_set_termios()
1213 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud); in __pmz_set_termios()
1215 if (UART_ENABLE_MS(&uap->port, termios->c_cflag)) { in __pmz_set_termios()
1216 uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE; in __pmz_set_termios()
1217 uap->flags |= PMACZILOG_FLAG_MODEM_STATUS; in __pmz_set_termios()
1219 uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE); in __pmz_set_termios()
1220 uap->flags &= ~PMACZILOG_FLAG_MODEM_STATUS; in __pmz_set_termios()
1224 pmz_maybe_update_regs(uap); in __pmz_set_termios()
1233 struct uart_pmac_port *uap = to_pmz(port); in pmz_set_termios() local
1239 pmz_interrupt_control(uap, 0); in pmz_set_termios()
1245 if (ZS_IS_OPEN(uap)) in pmz_set_termios()
1246 pmz_interrupt_control(uap, 1); in pmz_set_termios()
1253 struct uart_pmac_port *uap = to_pmz(port); in pmz_type() local
1255 if (ZS_IS_IRDA(uap)) in pmz_type()
1257 else if (ZS_IS_INTMODEM(uap)) in pmz_type()
1289 struct uart_pmac_port *uap = in pmz_poll_get_char() local
1294 if ((read_zsreg(uap, R0) & Rx_CH_AV) != 0) in pmz_poll_get_char()
1295 return read_zsdata(uap); in pmz_poll_get_char()
1305 struct uart_pmac_port *uap = in pmz_poll_put_char() local
1309 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0) in pmz_poll_put_char()
1311 write_zsdata(uap, c); in pmz_poll_put_char()
1346 static int __init pmz_init_port(struct uart_pmac_port *uap) in pmz_init_port() argument
1348 struct device_node *np = uap->node; in pmz_init_port()
1362 uap->port.mapbase = r_ports.start; in pmz_init_port()
1363 uap->port.membase = ioremap(uap->port.mapbase, 0x1000); in pmz_init_port()
1365 uap->control_reg = uap->port.membase; in pmz_init_port()
1366 uap->data_reg = uap->control_reg + 0x10; in pmz_init_port()
1372 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM; in pmz_init_port()
1375 uap->flags |= PMACZILOG_FLAG_IS_IRDA; in pmz_init_port()
1376 uap->port_type = PMAC_SCC_ASYNC; in pmz_init_port()
1381 uap->flags |= PMACZILOG_FLAG_IS_IRDA; in pmz_init_port()
1383 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM; in pmz_init_port()
1385 if (ZS_IS_IRDA(uap)) in pmz_init_port()
1386 uap->port_type = PMAC_SCC_IRDA; in pmz_init_port()
1387 if (ZS_IS_INTMODEM(uap)) { in pmz_init_port()
1400 uap->port_type = PMAC_SCC_I2S1; in pmz_init_port()
1413 uap->port.iotype = UPIO_MEM; in pmz_init_port()
1414 uap->port.irq = irq_of_parse_and_map(np, 0); in pmz_init_port()
1415 uap->port.uartclk = ZS_CLOCK; in pmz_init_port()
1416 uap->port.fifosize = 1; in pmz_init_port()
1417 uap->port.ops = &pmz_pops; in pmz_init_port()
1418 uap->port.type = PORT_PMAC_ZILOG; in pmz_init_port()
1419 uap->port.flags = 0; in pmz_init_port()
1427 if (uap->port.irq == 0 && in pmz_init_port()
1431 uap->port.irq = irq_create_mapping(NULL, 64 + 15); in pmz_init_port()
1438 pmz_convert_to_zs(uap, CS8, 0, 9600); in pmz_init_port()
1446 static void pmz_dispose_port(struct uart_pmac_port *uap) in pmz_dispose_port() argument
1450 np = uap->node; in pmz_dispose_port()
1451 iounmap(uap->control_reg); in pmz_dispose_port()
1452 uap->node = NULL; in pmz_dispose_port()
1454 memset(uap, 0, sizeof(struct uart_pmac_port)); in pmz_dispose_port()
1462 struct uart_pmac_port *uap; in pmz_attach() local
1474 uap = &pmz_ports[i]; in pmz_attach()
1475 uap->dev = mdev; in pmz_attach()
1476 uap->port.dev = &mdev->ofdev.dev; in pmz_attach()
1477 dev_set_drvdata(&mdev->ofdev.dev, uap); in pmz_attach()
1482 if (macio_request_resources(uap->dev, "pmac_zilog")) in pmz_attach()
1485 uap->node); in pmz_attach()
1487 uap->flags |= PMACZILOG_FLAG_RSRC_REQUESTED; in pmz_attach()
1489 return uart_add_one_port(&pmz_uart_reg, &uap->port); in pmz_attach()
1498 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev); in pmz_detach() local
1500 if (!uap) in pmz_detach()
1503 uart_remove_one_port(&pmz_uart_reg, &uap->port); in pmz_detach()
1505 if (uap->flags & PMACZILOG_FLAG_RSRC_REQUESTED) { in pmz_detach()
1506 macio_release_resources(uap->dev); in pmz_detach()
1507 uap->flags &= ~PMACZILOG_FLAG_RSRC_REQUESTED; in pmz_detach()
1510 uap->dev = NULL; in pmz_detach()
1511 uap->port.dev = NULL; in pmz_detach()
1516 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev); in pmz_suspend() local
1518 if (uap == NULL) { in pmz_suspend()
1523 uart_suspend_port(&pmz_uart_reg, &uap->port); in pmz_suspend()
1531 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev); in pmz_resume() local
1533 if (uap == NULL) in pmz_resume()
1536 uart_resume_port(&pmz_uart_reg, &uap->port); in pmz_resume()
1619 static int __init pmz_init_port(struct uart_pmac_port *uap) in pmz_init_port() argument
1624 r_ports = platform_get_resource(uap->pdev, IORESOURCE_MEM, 0); in pmz_init_port()
1628 irq = platform_get_irq(uap->pdev, 0); in pmz_init_port()
1632 uap->port.mapbase = r_ports->start; in pmz_init_port()
1633 uap->port.membase = (unsigned char __iomem *) r_ports->start; in pmz_init_port()
1634 uap->port.iotype = UPIO_MEM; in pmz_init_port()
1635 uap->port.irq = irq; in pmz_init_port()
1636 uap->port.uartclk = ZS_CLOCK; in pmz_init_port()
1637 uap->port.fifosize = 1; in pmz_init_port()
1638 uap->port.ops = &pmz_pops; in pmz_init_port()
1639 uap->port.type = PORT_PMAC_ZILOG; in pmz_init_port()
1640 uap->port.flags = 0; in pmz_init_port()
1642 uap->control_reg = uap->port.membase; in pmz_init_port()
1643 uap->data_reg = uap->control_reg + 4; in pmz_init_port()
1644 uap->port_type = 0; in pmz_init_port()
1645 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_PMACZILOG_CONSOLE); in pmz_init_port()
1647 pmz_convert_to_zs(uap, CS8, 0, 9600); in pmz_init_port()
1679 static void pmz_dispose_port(struct uart_pmac_port *uap) in pmz_dispose_port() argument
1681 memset(uap, 0, sizeof(struct uart_pmac_port)); in pmz_dispose_port()
1686 struct uart_pmac_port *uap; in pmz_attach() local
1696 uap = &pmz_ports[i]; in pmz_attach()
1697 uap->port.dev = &pdev->dev; in pmz_attach()
1698 platform_set_drvdata(pdev, uap); in pmz_attach()
1700 return uart_add_one_port(&pmz_uart_reg, &uap->port); in pmz_attach()
1705 struct uart_pmac_port *uap = platform_get_drvdata(pdev); in pmz_detach() local
1707 uart_remove_one_port(&pmz_uart_reg, &uap->port); in pmz_detach()
1709 uap->port.dev = NULL; in pmz_detach()
1860 struct uart_pmac_port *uap = in pmz_console_putchar() local
1864 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0) in pmz_console_putchar()
1866 write_zsdata(uap, ch); in pmz_console_putchar()
1875 struct uart_pmac_port *uap = &pmz_ports[con->index]; in pmz_console_write() local
1878 uart_port_lock_irqsave(&uap->port, &flags); in pmz_console_write()
1881 write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB); in pmz_console_write()
1882 write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR); in pmz_console_write()
1884 uart_console_write(&uap->port, s, count, pmz_console_putchar); in pmz_console_write()
1887 write_zsreg(uap, R1, uap->curregs[1]); in pmz_console_write()
1890 uart_port_unlock_irqrestore(&uap->port, flags); in pmz_console_write()
1898 struct uart_pmac_port *uap; in pmz_console_setup() local
1921 uap = &pmz_ports[co->index]; in pmz_console_setup()
1923 if (uap->node == NULL) in pmz_console_setup()
1926 if (uap->pdev == NULL) in pmz_console_setup()
1929 port = &uap->port; in pmz_console_setup()
1934 uap->flags |= PMACZILOG_FLAG_IS_CONS; in pmz_console_setup()
1944 pwr_delay = __pmz_startup(uap); in pmz_console_setup()