328 	iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);  in port_show_regs()
333 	iowrite8(lcr, priv->membase + UART_LCR);  in port_show_regs()
416 	iowrite8(ier, priv->membase + UART_IER);  in pch_uart_hal_enable_interrupt()
424 	iowrite8(ier, priv->membase + UART_IER);  in pch_uart_hal_disable_interrupt()
464 	iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);  in pch_uart_hal_set_line()
465 	iowrite8(dll, priv->membase + PCH_UART_DLL);  in pch_uart_hal_set_line()
466 	iowrite8(dlm, priv->membase + PCH_UART_DLM);  in pch_uart_hal_set_line()
467 	iowrite8(lcr, priv->membase + UART_LCR);  in pch_uart_hal_set_line()
481 	iowrite8(PCH_UART_FCR_FIFOE | priv->fcr, priv->membase + UART_FCR);  in pch_uart_hal_fifo_reset()
482 	iowrite8(PCH_UART_FCR_FIFOE | priv->fcr | flag,  in pch_uart_hal_fifo_reset()
484 	iowrite8(priv->fcr, priv->membase + UART_FCR);  in pch_uart_hal_fifo_reset()
533 	iowrite8(PCH_UART_FCR_FIFOE, priv->membase + UART_FCR);  in pch_uart_hal_set_fifo()
534 	iowrite8(PCH_UART_FCR_FIFOE | PCH_UART_FCR_RFR | PCH_UART_FCR_TFR,  in pch_uart_hal_set_fifo()
536 	iowrite8(fcr, priv->membase + UART_FCR);  in pch_uart_hal_set_fifo()
596 	iowrite8(lcr, priv->membase + UART_LCR);  in pch_uart_hal_set_break()
826 		iowrite8(port->x_char, priv->membase + PCH_UART_THR);  in handle_tx()
835 		iowrite8(ch, priv->membase + PCH_UART_THR);  in handle_tx()
883 		iowrite8(port->x_char, priv->membase + PCH_UART_THR);  in dma_handle_tx()
1130 		iowrite8(mcr, priv->membase + UART_MCR);  in pch_uart_set_mctrl()
1495 	iowrite8(c, priv->membase + PCH_UART_THR);  in pch_uart_put_poll_char()
1502 	iowrite8(ier, priv->membase + UART_IER);  in pch_uart_put_poll_char()
1538 	iowrite8(ch, priv->membase + PCH_UART_THR);  in pch_console_putchar()
1578 	iowrite8(ier, priv->membase + UART_IER);  in pch_console_write()