Lines Matching +full:up +full:- +full:to
1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for OMAP-UART controller.
14 * features like DMA, it makes easier to implement features like DMA and
16 * this driver as required for the omap-platform.
38 #include <linux/platform_data/serial-omap.h>
79 #define OMAP_UART_DMA_CH_FREE -1
118 /* timer to poll activity on rx dma */
172 static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
174 static inline unsigned int serial_in(struct uart_omap_port *up, int offset) in serial_in() argument
176 offset <<= up->port.regshift; in serial_in()
177 return readw(up->port.membase + offset); in serial_in()
180 static inline void serial_out(struct uart_omap_port *up, int offset, int value) in serial_out() argument
182 offset <<= up->port.regshift; in serial_out()
183 writew(value, up->port.membase + offset); in serial_out()
186 static inline void serial_omap_clear_fifos(struct uart_omap_port *up) in serial_omap_clear_fifos() argument
188 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); in serial_omap_clear_fifos()
189 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | in serial_omap_clear_fifos()
191 serial_out(up, UART_FCR, 0); in serial_omap_clear_fifos()
195 static int serial_omap_get_context_loss_count(struct uart_omap_port *up) in serial_omap_get_context_loss_count() argument
197 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); in serial_omap_get_context_loss_count()
199 if (!pdata || !pdata->get_context_loss_count) in serial_omap_get_context_loss_count()
200 return -EINVAL; in serial_omap_get_context_loss_count()
202 return pdata->get_context_loss_count(up->dev); in serial_omap_get_context_loss_count()
206 static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) in serial_omap_enable_wakeup() argument
208 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); in serial_omap_enable_wakeup()
210 if (!pdata || !pdata->enable_wakeup) in serial_omap_enable_wakeup()
213 pdata->enable_wakeup(up->dev, enable); in serial_omap_enable_wakeup()
224 unsigned int n = port->uartclk / (mode * baud); in calculate_baud_abs_diff()
229 return abs_diff(baud, port->uartclk / (mode * n)); in calculate_baud_abs_diff()
233 * serial_omap_baud_is_mode16 - check if baud rate is MODE16X
235 * @baud: baudrate for which mode needs to be determined
240 * E.g. for 1000000 baud rate mode must be 16x, but according to that
253 * serial_omap_get_divisor - calculate divisor value
255 * @baud: baudrate for which divisor needs to be calculated.
266 return port->uartclk/(mode * baud); in serial_omap_get_divisor()
271 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_enable_ms() local
273 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); in serial_omap_enable_ms()
275 up->ier |= UART_IER_MSI; in serial_omap_enable_ms()
276 serial_out(up, UART_IER, up->ier); in serial_omap_enable_ms()
281 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_stop_tx() local
284 /* Handle RS-485 */ in serial_omap_stop_tx()
285 if (port->rs485.flags & SER_RS485_ENABLED) { in serial_omap_stop_tx()
286 if (up->scr & OMAP_UART_SCR_TX_EMPTY) { in serial_omap_stop_tx()
289 * left to transmit now, so make sure the THR interrupt in serial_omap_stop_tx()
291 * disable THR interrupts and toggle the RS-485 GPIO in serial_omap_stop_tx()
294 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_stop_tx()
295 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_stop_tx()
296 res = (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? in serial_omap_stop_tx()
298 if (gpiod_get_value(up->rts_gpiod) != res) { in serial_omap_stop_tx()
299 if (port->rs485.delay_rts_after_send > 0) in serial_omap_stop_tx()
301 port->rs485.delay_rts_after_send); in serial_omap_stop_tx()
302 gpiod_set_value(up->rts_gpiod, res); in serial_omap_stop_tx()
305 /* We're asked to stop, but there's still stuff in the in serial_omap_stop_tx()
313 up->scr |= OMAP_UART_SCR_TX_EMPTY; in serial_omap_stop_tx()
314 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_stop_tx()
319 if (up->ier & UART_IER_THRI) { in serial_omap_stop_tx()
320 up->ier &= ~UART_IER_THRI; in serial_omap_stop_tx()
321 serial_out(up, UART_IER, up->ier); in serial_omap_stop_tx()
327 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_stop_rx() local
329 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in serial_omap_stop_rx()
330 up->port.read_status_mask &= ~UART_LSR_DR; in serial_omap_stop_rx()
331 serial_out(up, UART_IER, up->ier); in serial_omap_stop_rx()
334 static void serial_omap_put_char(struct uart_omap_port *up, unsigned char ch) in serial_omap_put_char() argument
336 serial_out(up, UART_TX, ch); in serial_omap_put_char()
338 if ((up->port.rs485.flags & SER_RS485_ENABLED) && in serial_omap_put_char()
339 !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) in serial_omap_put_char()
340 up->rs485_tx_filter_count++; in serial_omap_put_char()
343 static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) in transmit_chars() argument
347 uart_port_tx_limited(&up->port, ch, up->port.fifosize / 4, in transmit_chars()
349 serial_omap_put_char(up, ch), in transmit_chars()
353 static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) in serial_omap_enable_ier_thri() argument
355 if (!(up->ier & UART_IER_THRI)) { in serial_omap_enable_ier_thri()
356 up->ier |= UART_IER_THRI; in serial_omap_enable_ier_thri()
357 serial_out(up, UART_IER, up->ier); in serial_omap_enable_ier_thri()
363 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_start_tx() local
366 /* Handle RS-485 */ in serial_omap_start_tx()
367 if (port->rs485.flags & SER_RS485_ENABLED) { in serial_omap_start_tx()
369 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_start_tx()
370 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_start_tx()
373 res = (port->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; in serial_omap_start_tx()
374 if (gpiod_get_value(up->rts_gpiod) != res) { in serial_omap_start_tx()
375 gpiod_set_value(up->rts_gpiod, res); in serial_omap_start_tx()
376 if (port->rs485.delay_rts_before_send > 0) in serial_omap_start_tx()
377 mdelay(port->rs485.delay_rts_before_send); in serial_omap_start_tx()
381 if ((port->rs485.flags & SER_RS485_ENABLED) && in serial_omap_start_tx()
382 !(port->rs485.flags & SER_RS485_RX_DURING_TX)) in serial_omap_start_tx()
383 up->rs485_tx_filter_count = 0; in serial_omap_start_tx()
385 serial_omap_enable_ier_thri(up); in serial_omap_start_tx()
390 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_throttle() local
393 uart_port_lock_irqsave(&up->port, &flags); in serial_omap_throttle()
394 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in serial_omap_throttle()
395 serial_out(up, UART_IER, up->ier); in serial_omap_throttle()
396 uart_port_unlock_irqrestore(&up->port, flags); in serial_omap_throttle()
401 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_unthrottle() local
404 uart_port_lock_irqsave(&up->port, &flags); in serial_omap_unthrottle()
405 up->ier |= UART_IER_RLSI | UART_IER_RDI; in serial_omap_unthrottle()
406 serial_out(up, UART_IER, up->ier); in serial_omap_unthrottle()
407 uart_port_unlock_irqrestore(&up->port, flags); in serial_omap_unthrottle()
410 static unsigned int check_modem_status(struct uart_omap_port *up) in check_modem_status() argument
414 status = serial_in(up, UART_MSR); in check_modem_status()
415 status |= up->msr_saved_flags; in check_modem_status()
416 up->msr_saved_flags = 0; in check_modem_status()
420 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && in check_modem_status()
421 up->port.state != NULL) { in check_modem_status()
423 up->port.icount.rng++; in check_modem_status()
425 up->port.icount.dsr++; in check_modem_status()
428 (&up->port, status & UART_MSR_DCD); in check_modem_status()
431 (&up->port, status & UART_MSR_CTS); in check_modem_status()
432 wake_up_interruptible(&up->port.state->port.delta_msr_wait); in check_modem_status()
438 static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) in serial_omap_rlsi() argument
443 * Read one data character out to avoid stalling the receiver according in serial_omap_rlsi()
444 * to the table 23-246 of the omap4 TRM. in serial_omap_rlsi()
447 serial_in(up, UART_RX); in serial_omap_rlsi()
448 if ((up->port.rs485.flags & SER_RS485_ENABLED) && in serial_omap_rlsi()
449 !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && in serial_omap_rlsi()
450 up->rs485_tx_filter_count) in serial_omap_rlsi()
451 up->rs485_tx_filter_count--; in serial_omap_rlsi()
454 up->port.icount.rx++; in serial_omap_rlsi()
460 up->port.icount.brk++; in serial_omap_rlsi()
467 if (uart_handle_break(&up->port)) in serial_omap_rlsi()
474 up->port.icount.parity++; in serial_omap_rlsi()
479 up->port.icount.frame++; in serial_omap_rlsi()
483 up->port.icount.overrun++; in serial_omap_rlsi()
486 if (up->port.line == up->port.cons->index) { in serial_omap_rlsi()
488 lsr |= up->lsr_break_flag; in serial_omap_rlsi()
491 uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); in serial_omap_rlsi()
494 static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) in serial_omap_rdi() argument
501 ch = serial_in(up, UART_RX); in serial_omap_rdi()
502 if ((up->port.rs485.flags & SER_RS485_ENABLED) && in serial_omap_rdi()
503 !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && in serial_omap_rdi()
504 up->rs485_tx_filter_count) { in serial_omap_rdi()
505 up->rs485_tx_filter_count--; in serial_omap_rdi()
509 up->port.icount.rx++; in serial_omap_rdi()
511 if (uart_prepare_sysrq_char(&up->port, ch)) in serial_omap_rdi()
514 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, TTY_NORMAL); in serial_omap_rdi()
518 * serial_omap_irq() - This handles the interrupt from one port
524 struct uart_omap_port *up = dev_id; in serial_omap_irq() local
530 uart_port_lock(&up->port); in serial_omap_irq()
533 iir = serial_in(up, UART_IIR); in serial_omap_irq()
538 lsr = serial_in(up, UART_LSR); in serial_omap_irq()
545 check_modem_status(up); in serial_omap_irq()
548 transmit_chars(up, lsr); in serial_omap_irq()
552 serial_omap_rdi(up, lsr); in serial_omap_irq()
555 serial_omap_rlsi(up, lsr); in serial_omap_irq()
564 } while (max_count--); in serial_omap_irq()
566 uart_unlock_and_check_sysrq(&up->port); in serial_omap_irq()
568 tty_flip_buffer_push(&up->port.state->port); in serial_omap_irq()
570 up->port_activity = jiffies; in serial_omap_irq()
577 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_tx_empty() local
581 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); in serial_omap_tx_empty()
582 uart_port_lock_irqsave(&up->port, &flags); in serial_omap_tx_empty()
583 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; in serial_omap_tx_empty()
584 uart_port_unlock_irqrestore(&up->port, flags); in serial_omap_tx_empty()
591 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_get_mctrl() local
595 status = check_modem_status(up); in serial_omap_get_mctrl()
597 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); in serial_omap_get_mctrl()
612 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_set_mctrl() local
615 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); in serial_omap_set_mctrl()
627 old_mcr = serial_in(up, UART_MCR); in serial_omap_set_mctrl()
630 up->mcr = old_mcr | mcr; in serial_omap_set_mctrl()
631 serial_out(up, UART_MCR, up->mcr); in serial_omap_set_mctrl()
634 lcr = serial_in(up, UART_LCR); in serial_omap_set_mctrl()
635 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_mctrl()
636 if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) in serial_omap_set_mctrl()
637 up->efr |= UART_EFR_RTS; in serial_omap_set_mctrl()
639 up->efr &= ~UART_EFR_RTS; in serial_omap_set_mctrl()
640 serial_out(up, UART_EFR, up->efr); in serial_omap_set_mctrl()
641 serial_out(up, UART_LCR, lcr); in serial_omap_set_mctrl()
646 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_break_ctl() local
649 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); in serial_omap_break_ctl()
650 uart_port_lock_irqsave(&up->port, &flags); in serial_omap_break_ctl()
651 if (break_state == -1) in serial_omap_break_ctl()
652 up->lcr |= UART_LCR_SBC; in serial_omap_break_ctl()
654 up->lcr &= ~UART_LCR_SBC; in serial_omap_break_ctl()
655 serial_out(up, UART_LCR, up->lcr); in serial_omap_break_ctl()
656 uart_port_unlock_irqrestore(&up->port, flags); in serial_omap_break_ctl()
661 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_startup() local
668 retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, in serial_omap_startup()
669 up->name, up); in serial_omap_startup()
673 /* Optional wake-up IRQ */ in serial_omap_startup()
674 if (up->wakeirq) { in serial_omap_startup()
675 retval = dev_pm_set_dedicated_wake_irq(up->dev, up->wakeirq); in serial_omap_startup()
677 free_irq(up->port.irq, up); in serial_omap_startup()
682 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); in serial_omap_startup()
684 pm_runtime_get_sync(up->dev); in serial_omap_startup()
689 serial_omap_clear_fifos(up); in serial_omap_startup()
694 (void) serial_in(up, UART_LSR); in serial_omap_startup()
695 if (serial_in(up, UART_LSR) & UART_LSR_DR) in serial_omap_startup()
696 (void) serial_in(up, UART_RX); in serial_omap_startup()
697 (void) serial_in(up, UART_IIR); in serial_omap_startup()
698 (void) serial_in(up, UART_MSR); in serial_omap_startup()
703 serial_out(up, UART_LCR, UART_LCR_WLEN8); in serial_omap_startup()
704 uart_port_lock_irqsave(&up->port, &flags); in serial_omap_startup()
706 * Most PC uarts need OUT2 raised to enable interrupts. in serial_omap_startup()
708 up->port.mctrl |= TIOCM_OUT2; in serial_omap_startup()
709 serial_omap_set_mctrl(&up->port, up->port.mctrl); in serial_omap_startup()
710 uart_port_unlock_irqrestore(&up->port, flags); in serial_omap_startup()
712 up->msr_saved_flags = 0; in serial_omap_startup()
718 up->ier = UART_IER_RLSI | UART_IER_RDI; in serial_omap_startup()
719 serial_out(up, UART_IER, up->ier); in serial_omap_startup()
721 /* Enable module level wake up */ in serial_omap_startup()
722 up->wer = OMAP_UART_WER_MOD_WKUP; in serial_omap_startup()
723 if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP) in serial_omap_startup()
724 up->wer |= OMAP_UART_TX_WAKEUP_EN; in serial_omap_startup()
726 serial_out(up, UART_OMAP_WER, up->wer); in serial_omap_startup()
728 up->port_activity = jiffies; in serial_omap_startup()
734 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_shutdown() local
737 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); in serial_omap_shutdown()
742 up->ier = 0; in serial_omap_shutdown()
743 serial_out(up, UART_IER, 0); in serial_omap_shutdown()
745 uart_port_lock_irqsave(&up->port, &flags); in serial_omap_shutdown()
746 up->port.mctrl &= ~TIOCM_OUT2; in serial_omap_shutdown()
747 serial_omap_set_mctrl(&up->port, up->port.mctrl); in serial_omap_shutdown()
748 uart_port_unlock_irqrestore(&up->port, flags); in serial_omap_shutdown()
753 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); in serial_omap_shutdown()
754 serial_omap_clear_fifos(up); in serial_omap_shutdown()
757 * Read data port to reset things, and then free the irq in serial_omap_shutdown()
759 if (serial_in(up, UART_LSR) & UART_LSR_DR) in serial_omap_shutdown()
760 (void) serial_in(up, UART_RX); in serial_omap_shutdown()
762 pm_runtime_put_sync(up->dev); in serial_omap_shutdown()
763 free_irq(up->port.irq, up); in serial_omap_shutdown()
764 dev_pm_clear_wake_irq(up->dev); in serial_omap_shutdown()
769 struct uart_omap_port *up = container_of(work, struct uart_omap_port, in serial_omap_uart_qos_work() local
772 cpu_latency_qos_update_request(&up->pm_qos_request, up->latency); in serial_omap_uart_qos_work()
779 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_set_termios() local
784 cval = UART_LCR_WLEN(tty_get_char_size(termios->c_cflag)); in serial_omap_set_termios()
786 if (termios->c_cflag & CSTOPB) in serial_omap_set_termios()
788 if (termios->c_cflag & PARENB) in serial_omap_set_termios()
790 if (!(termios->c_cflag & PARODD)) in serial_omap_set_termios()
792 if (termios->c_cflag & CMSPAR) in serial_omap_set_termios()
796 * Ask the core to calculate the divisor for us. in serial_omap_set_termios()
799 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); in serial_omap_set_termios()
803 up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); in serial_omap_set_termios()
804 up->latency = up->calc_latency; in serial_omap_set_termios()
805 schedule_work(&up->qos_work); in serial_omap_set_termios()
807 up->dll = quot & 0xff; in serial_omap_set_termios()
808 up->dlh = quot >> 8; in serial_omap_set_termios()
809 up->mdr1 = UART_OMAP_MDR1_DISABLE; in serial_omap_set_termios()
811 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | in serial_omap_set_termios()
818 uart_port_lock_irqsave(&up->port, &flags); in serial_omap_set_termios()
821 * Update the per-port timeout. in serial_omap_set_termios()
823 uart_update_timeout(port, termios->c_cflag, baud); in serial_omap_set_termios()
825 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in serial_omap_set_termios()
826 if (termios->c_iflag & INPCK) in serial_omap_set_termios()
827 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; in serial_omap_set_termios()
828 if (termios->c_iflag & (BRKINT | PARMRK)) in serial_omap_set_termios()
829 up->port.read_status_mask |= UART_LSR_BI; in serial_omap_set_termios()
832 * Characters to ignore in serial_omap_set_termios()
834 up->port.ignore_status_mask = 0; in serial_omap_set_termios()
835 if (termios->c_iflag & IGNPAR) in serial_omap_set_termios()
836 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; in serial_omap_set_termios()
837 if (termios->c_iflag & IGNBRK) { in serial_omap_set_termios()
838 up->port.ignore_status_mask |= UART_LSR_BI; in serial_omap_set_termios()
843 if (termios->c_iflag & IGNPAR) in serial_omap_set_termios()
844 up->port.ignore_status_mask |= UART_LSR_OE; in serial_omap_set_termios()
850 if ((termios->c_cflag & CREAD) == 0) in serial_omap_set_termios()
851 up->port.ignore_status_mask |= UART_LSR_DR; in serial_omap_set_termios()
856 up->ier &= ~UART_IER_MSI; in serial_omap_set_termios()
857 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in serial_omap_set_termios()
858 up->ier |= UART_IER_MSI; in serial_omap_set_termios()
859 serial_out(up, UART_IER, up->ier); in serial_omap_set_termios()
860 serial_out(up, UART_LCR, cval); /* reset DLAB */ in serial_omap_set_termios()
861 up->lcr = cval; in serial_omap_set_termios()
862 up->scr = 0; in serial_omap_set_termios()
868 * DLL_REG and DLH_REG set to 0. in serial_omap_set_termios()
870 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in serial_omap_set_termios()
871 serial_out(up, UART_DLL, 0); in serial_omap_set_termios()
872 serial_out(up, UART_DLM, 0); in serial_omap_set_termios()
873 serial_out(up, UART_LCR, 0); in serial_omap_set_termios()
875 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_termios()
877 up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB; in serial_omap_set_termios()
878 up->efr &= ~UART_EFR_SCD; in serial_omap_set_termios()
879 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); in serial_omap_set_termios()
881 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in serial_omap_set_termios()
882 up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR; in serial_omap_set_termios()
883 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); in serial_omap_set_termios()
886 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; in serial_omap_set_termios()
891 * to 1 (as noted below, 16 characters) and TLR[3:0] in serial_omap_set_termios()
892 * to zero this will result RX FIFO threshold level in serial_omap_set_termios()
893 * to 1 character, instead of 16 as noted in comment in serial_omap_set_termios()
897 /* Set receive FIFO threshold to 16 characters and in serial_omap_set_termios()
898 * transmit FIFO threshold to 32 spaces in serial_omap_set_termios()
900 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; in serial_omap_set_termios()
901 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; in serial_omap_set_termios()
902 up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | in serial_omap_set_termios()
905 serial_out(up, UART_FCR, up->fcr); in serial_omap_set_termios()
906 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_termios()
908 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_set_termios()
911 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in serial_omap_set_termios()
912 serial_out(up, UART_MCR, up->mcr); in serial_omap_set_termios()
913 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_termios()
914 serial_out(up, UART_EFR, up->efr); in serial_omap_set_termios()
915 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in serial_omap_set_termios()
919 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) in serial_omap_set_termios()
920 serial_omap_mdr1_errataset(up, up->mdr1); in serial_omap_set_termios()
922 serial_out(up, UART_OMAP_MDR1, up->mdr1); in serial_omap_set_termios()
924 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_termios()
925 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); in serial_omap_set_termios()
927 serial_out(up, UART_LCR, 0); in serial_omap_set_termios()
928 serial_out(up, UART_IER, 0); in serial_omap_set_termios()
929 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_termios()
931 serial_out(up, UART_DLL, up->dll); /* LS of divisor */ in serial_omap_set_termios()
932 serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ in serial_omap_set_termios()
934 serial_out(up, UART_LCR, 0); in serial_omap_set_termios()
935 serial_out(up, UART_IER, up->ier); in serial_omap_set_termios()
936 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_termios()
938 serial_out(up, UART_EFR, up->efr); in serial_omap_set_termios()
939 serial_out(up, UART_LCR, cval); in serial_omap_set_termios()
942 up->mdr1 = UART_OMAP_MDR1_13X_MODE; in serial_omap_set_termios()
944 up->mdr1 = UART_OMAP_MDR1_16X_MODE; in serial_omap_set_termios()
946 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) in serial_omap_set_termios()
947 serial_omap_mdr1_errataset(up, up->mdr1); in serial_omap_set_termios()
949 serial_out(up, UART_OMAP_MDR1, up->mdr1); in serial_omap_set_termios()
952 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_termios()
955 serial_out(up, UART_XON1, termios->c_cc[VSTART]); in serial_omap_set_termios()
956 serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); in serial_omap_set_termios()
958 /* Enable access to TCR/TLR */ in serial_omap_set_termios()
959 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); in serial_omap_set_termios()
960 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in serial_omap_set_termios()
961 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); in serial_omap_set_termios()
963 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); in serial_omap_set_termios()
965 up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); in serial_omap_set_termios()
967 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { in serial_omap_set_termios()
969 up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in serial_omap_set_termios()
970 up->efr |= UART_EFR_CTS; in serial_omap_set_termios()
973 up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS); in serial_omap_set_termios()
976 if (up->port.flags & UPF_SOFT_FLOW) { in serial_omap_set_termios()
978 up->efr &= OMAP_UART_SW_CLR; in serial_omap_set_termios()
985 if (termios->c_iflag & IXON) in serial_omap_set_termios()
986 up->efr |= OMAP_UART_SW_RX; in serial_omap_set_termios()
993 if (termios->c_iflag & IXOFF) { in serial_omap_set_termios()
994 up->port.status |= UPSTAT_AUTOXOFF; in serial_omap_set_termios()
995 up->efr |= OMAP_UART_SW_TX; in serial_omap_set_termios()
1000 * Enable any character to restart output. in serial_omap_set_termios()
1004 if (termios->c_iflag & IXANY) in serial_omap_set_termios()
1005 up->mcr |= UART_MCR_XONANY; in serial_omap_set_termios()
1007 up->mcr &= ~UART_MCR_XONANY; in serial_omap_set_termios()
1009 serial_out(up, UART_MCR, up->mcr); in serial_omap_set_termios()
1010 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_set_termios()
1011 serial_out(up, UART_EFR, up->efr); in serial_omap_set_termios()
1012 serial_out(up, UART_LCR, up->lcr); in serial_omap_set_termios()
1014 serial_omap_set_mctrl(&up->port, up->port.mctrl); in serial_omap_set_termios()
1016 uart_port_unlock_irqrestore(&up->port, flags); in serial_omap_set_termios()
1017 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); in serial_omap_set_termios()
1024 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_pm() local
1027 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); in serial_omap_pm()
1029 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_pm()
1030 efr = serial_in(up, UART_EFR); in serial_omap_pm()
1031 serial_out(up, UART_EFR, efr | UART_EFR_ECB); in serial_omap_pm()
1032 serial_out(up, UART_LCR, 0); in serial_omap_pm()
1034 serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); in serial_omap_pm()
1035 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial_omap_pm()
1036 serial_out(up, UART_EFR, efr); in serial_omap_pm()
1037 serial_out(up, UART_LCR, 0); in serial_omap_pm()
1042 dev_dbg(port->dev, "serial_omap_release_port+\n"); in serial_omap_release_port()
1047 dev_dbg(port->dev, "serial_omap_request_port+\n"); in serial_omap_request_port()
1053 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_config_port() local
1055 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", in serial_omap_config_port()
1056 up->port.line); in serial_omap_config_port()
1057 up->port.type = PORT_OMAP; in serial_omap_config_port()
1058 up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW; in serial_omap_config_port()
1064 /* we don't want the core code to modify any port params */ in serial_omap_verify_port()
1065 dev_dbg(port->dev, "serial_omap_verify_port+\n"); in serial_omap_verify_port()
1066 return -EINVAL; in serial_omap_verify_port()
1072 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_type() local
1074 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); in serial_omap_type()
1075 return up->name; in serial_omap_type()
1078 static void __maybe_unused wait_for_xmitr(struct uart_omap_port *up) in wait_for_xmitr() argument
1082 /* Wait up to 10ms for the character(s) to be sent. */ in wait_for_xmitr()
1084 status = serial_in(up, UART_LSR); in wait_for_xmitr()
1087 up->lsr_break_flag = UART_LSR_BI; in wait_for_xmitr()
1089 if (--tmout == 0) in wait_for_xmitr()
1094 /* Wait up to 1s for flow control if necessary */ in wait_for_xmitr()
1095 if (up->port.flags & UPF_CONS_FLOW) { in wait_for_xmitr()
1096 for (tmout = 1000000; tmout; tmout--) { in wait_for_xmitr()
1097 unsigned int msr = serial_in(up, UART_MSR); in wait_for_xmitr()
1099 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; in wait_for_xmitr()
1112 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_poll_put_char() local
1114 wait_for_xmitr(up); in serial_omap_poll_put_char()
1115 serial_out(up, UART_TX, ch); in serial_omap_poll_put_char()
1120 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_poll_get_char() local
1123 status = serial_in(up, UART_LSR); in serial_omap_poll_get_char()
1129 status = serial_in(up, UART_RX); in serial_omap_poll_get_char()
1142 offset <<= port->regshift; in omap_serial_early_in()
1143 return readw(port->membase + offset); in omap_serial_early_in()
1149 offset <<= port->regshift; in omap_serial_early_out()
1150 writew(value, port->membase + offset); in omap_serial_early_out()
1169 struct earlycon_device *device = console->data; in early_omap_serial_write()
1170 struct uart_port *port = &device->port; in early_omap_serial_write()
1178 struct uart_port *port = &device->port; in early_omap_serial_setup()
1180 if (!(device->port.membase || device->port.iobase)) in early_omap_serial_setup()
1181 return -ENODEV; in early_omap_serial_setup()
1183 port->regshift = 2; in early_omap_serial_setup()
1184 device->con->write = early_omap_serial_write; in early_omap_serial_setup()
1188 OF_EARLYCON_DECLARE(omapserial, "ti,omap2-uart", early_omap_serial_setup);
1189 OF_EARLYCON_DECLARE(omapserial, "ti,omap3-uart", early_omap_serial_setup);
1190 OF_EARLYCON_DECLARE(omapserial, "ti,omap4-uart", early_omap_serial_setup);
1199 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_console_putchar() local
1201 wait_for_xmitr(up); in serial_omap_console_putchar()
1202 serial_out(up, UART_TX, ch); in serial_omap_console_putchar()
1209 struct uart_omap_port *up = serial_omap_console_ports[co->index]; in serial_omap_console_write() local
1215 locked = uart_port_trylock_irqsave(&up->port, &flags); in serial_omap_console_write()
1217 uart_port_lock_irqsave(&up->port, &flags); in serial_omap_console_write()
1222 ier = serial_in(up, UART_IER); in serial_omap_console_write()
1223 serial_out(up, UART_IER, 0); in serial_omap_console_write()
1225 uart_console_write(&up->port, s, count, serial_omap_console_putchar); in serial_omap_console_write()
1228 * Finally, wait for transmitter to become empty in serial_omap_console_write()
1231 wait_for_xmitr(up); in serial_omap_console_write()
1232 serial_out(up, UART_IER, ier); in serial_omap_console_write()
1240 if (up->msr_saved_flags) in serial_omap_console_write()
1241 check_modem_status(up); in serial_omap_console_write()
1244 uart_port_unlock_irqrestore(&up->port, flags); in serial_omap_console_write()
1250 struct uart_omap_port *up; in serial_omap_console_setup() local
1256 if (serial_omap_console_ports[co->index] == NULL) in serial_omap_console_setup()
1257 return -ENODEV; in serial_omap_console_setup()
1258 up = serial_omap_console_ports[co->index]; in serial_omap_console_setup()
1263 return uart_set_options(&up->port, co, baud, parity, bits, flow); in serial_omap_console_setup()
1272 .index = -1,
1276 static void serial_omap_add_console_port(struct uart_omap_port *up) in serial_omap_add_console_port() argument
1278 serial_omap_console_ports[up->port.line] = up; in serial_omap_add_console_port()
1287 static inline void serial_omap_add_console_port(struct uart_omap_port *up) in serial_omap_add_console_port() argument
1297 struct uart_omap_port *up = to_uart_omap_port(port); in serial_omap_config_rs485() local
1302 mode = up->ier; in serial_omap_config_rs485()
1303 up->ier = 0; in serial_omap_config_rs485()
1304 serial_out(up, UART_IER, 0); in serial_omap_config_rs485()
1307 val = (rs485->flags & SER_RS485_ENABLED) ? in serial_omap_config_rs485()
1309 val = (rs485->flags & val) ? 1 : 0; in serial_omap_config_rs485()
1310 gpiod_set_value(up->rts_gpiod, val); in serial_omap_config_rs485()
1313 up->ier = mode; in serial_omap_config_rs485()
1314 serial_out(up, UART_IER, up->ier); in serial_omap_config_rs485()
1316 /* If RS-485 is disabled, make sure the THR interrupt is fired when in serial_omap_config_rs485()
1319 if (!(rs485->flags & SER_RS485_ENABLED) && in serial_omap_config_rs485()
1320 (up->scr & OMAP_UART_SCR_TX_EMPTY)) { in serial_omap_config_rs485()
1321 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_config_rs485()
1322 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_config_rs485()
1356 .driver_name = "OMAP-SERIAL",
1365 struct uart_omap_port *up = dev_get_drvdata(dev); in serial_omap_prepare() local
1367 up->is_suspending = true; in serial_omap_prepare()
1374 struct uart_omap_port *up = dev_get_drvdata(dev); in serial_omap_complete() local
1376 up->is_suspending = false; in serial_omap_complete()
1381 struct uart_omap_port *up = dev_get_drvdata(dev); in serial_omap_suspend() local
1383 uart_suspend_port(&serial_omap_reg, &up->port); in serial_omap_suspend()
1384 flush_work(&up->qos_work); in serial_omap_suspend()
1387 serial_omap_enable_wakeup(up, true); in serial_omap_suspend()
1389 serial_omap_enable_wakeup(up, false); in serial_omap_suspend()
1396 struct uart_omap_port *up = dev_get_drvdata(dev); in serial_omap_resume() local
1399 serial_omap_enable_wakeup(up, false); in serial_omap_resume()
1401 uart_resume_port(&serial_omap_reg, &up->port); in serial_omap_resume()
1410 static void omap_serial_fill_features_erratas(struct uart_omap_port *up) in omap_serial_fill_features_erratas() argument
1415 mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift)); in omap_serial_fill_features_erratas()
1435 dev_warn(up->dev, in omap_serial_fill_features_erratas()
1436 "Unknown %s revision, defaulting to highest\n", in omap_serial_fill_features_erratas()
1437 up->name); in omap_serial_fill_features_erratas()
1448 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
1452 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
1454 up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; in omap_serial_fill_features_erratas()
1457 up->errata |= UART_ERRATA_i202_MDR1_ACCESS; in omap_serial_fill_features_erratas()
1458 up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; in omap_serial_fill_features_erratas()
1473 of_property_read_u32(dev->of_node, "clock-frequency", in of_get_uart_port_info()
1474 &omap_up_info->uartclk); in of_get_uart_port_info()
1476 omap_up_info->flags = UPF_BOOT_AUTOCONF; in of_get_uart_port_info()
1488 static int serial_omap_probe_rs485(struct uart_omap_port *up, in serial_omap_probe_rs485() argument
1491 struct serial_rs485 *rs485conf = &up->port.rs485; in serial_omap_probe_rs485()
1492 struct device_node *np = dev->of_node; in serial_omap_probe_rs485()
1496 rs485conf->flags = 0; in serial_omap_probe_rs485()
1497 up->rts_gpiod = NULL; in serial_omap_probe_rs485()
1502 up->port.rs485_config = serial_omap_config_rs485; in serial_omap_probe_rs485()
1503 up->port.rs485_supported = serial_omap_rs485_supported; in serial_omap_probe_rs485()
1505 ret = uart_get_rs485_mode(&up->port); in serial_omap_probe_rs485()
1509 if (of_property_read_bool(np, "rs485-rts-active-high")) { in serial_omap_probe_rs485()
1510 rs485conf->flags |= SER_RS485_RTS_ON_SEND; in serial_omap_probe_rs485()
1511 rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND; in serial_omap_probe_rs485()
1513 rs485conf->flags &= ~SER_RS485_RTS_ON_SEND; in serial_omap_probe_rs485()
1514 rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; in serial_omap_probe_rs485()
1518 gflags = rs485conf->flags & SER_RS485_RTS_AFTER_SEND ? in serial_omap_probe_rs485()
1520 up->rts_gpiod = devm_gpiod_get_optional(dev, "rts", gflags); in serial_omap_probe_rs485()
1521 if (IS_ERR(up->rts_gpiod)) { in serial_omap_probe_rs485()
1522 ret = PTR_ERR(up->rts_gpiod); in serial_omap_probe_rs485()
1523 if (ret == -EPROBE_DEFER) in serial_omap_probe_rs485()
1526 up->rts_gpiod = NULL; in serial_omap_probe_rs485()
1527 up->port.rs485_supported = (const struct serial_rs485) { }; in serial_omap_probe_rs485()
1528 if (rs485conf->flags & SER_RS485_ENABLED) { in serial_omap_probe_rs485()
1529 dev_err(dev, "disabling RS-485 (rts-gpio missing in device tree)\n"); in serial_omap_probe_rs485()
1533 gpiod_set_consumer_name(up->rts_gpiod, "omap-serial"); in serial_omap_probe_rs485()
1541 struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev); in serial_omap_probe()
1542 struct uart_omap_port *up; in serial_omap_probe() local
1550 if (pdev->dev.of_node) { in serial_omap_probe()
1551 uartirq = irq_of_parse_and_map(pdev->dev.of_node, 0); in serial_omap_probe()
1553 return -EPROBE_DEFER; in serial_omap_probe()
1554 wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1); in serial_omap_probe()
1555 omap_up_info = of_get_uart_port_info(&pdev->dev); in serial_omap_probe()
1556 pdev->dev.platform_data = omap_up_info; in serial_omap_probe()
1560 return -EPROBE_DEFER; in serial_omap_probe()
1563 up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); in serial_omap_probe()
1564 if (!up) in serial_omap_probe()
1565 return -ENOMEM; in serial_omap_probe()
1571 up->dev = &pdev->dev; in serial_omap_probe()
1572 up->port.dev = &pdev->dev; in serial_omap_probe()
1573 up->port.type = PORT_OMAP; in serial_omap_probe()
1574 up->port.iotype = UPIO_MEM; in serial_omap_probe()
1575 up->port.irq = uartirq; in serial_omap_probe()
1576 up->port.regshift = 2; in serial_omap_probe()
1577 up->port.fifosize = 64; in serial_omap_probe()
1578 up->port.ops = &serial_omap_pops; in serial_omap_probe()
1579 up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_OMAP_CONSOLE); in serial_omap_probe()
1581 if (pdev->dev.of_node) in serial_omap_probe()
1582 ret = of_alias_get_id(pdev->dev.of_node, "serial"); in serial_omap_probe()
1584 ret = pdev->id; in serial_omap_probe()
1587 dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", in serial_omap_probe()
1591 up->port.line = ret; in serial_omap_probe()
1593 if (up->port.line >= OMAP_MAX_HSUART_PORTS) { in serial_omap_probe()
1594 dev_err(&pdev->dev, "uart ID %d > MAX %d.\n", up->port.line, in serial_omap_probe()
1596 ret = -ENXIO; in serial_omap_probe()
1600 up->wakeirq = wakeirq; in serial_omap_probe()
1601 if (!up->wakeirq) in serial_omap_probe()
1602 dev_info(up->port.dev, "no wakeirq for uart%d\n", in serial_omap_probe()
1603 up->port.line); in serial_omap_probe()
1605 sprintf(up->name, "OMAP UART%d", up->port.line); in serial_omap_probe()
1606 up->port.mapbase = mem->start; in serial_omap_probe()
1607 up->port.membase = base; in serial_omap_probe()
1608 up->port.flags = omap_up_info->flags; in serial_omap_probe()
1609 up->port.uartclk = omap_up_info->uartclk; in serial_omap_probe()
1610 if (!up->port.uartclk) { in serial_omap_probe()
1611 up->port.uartclk = DEFAULT_CLK_SPEED; in serial_omap_probe()
1612 dev_warn(&pdev->dev, in serial_omap_probe()
1617 ret = serial_omap_probe_rs485(up, &pdev->dev); in serial_omap_probe()
1621 up->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in serial_omap_probe()
1622 up->calc_latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in serial_omap_probe()
1623 cpu_latency_qos_add_request(&up->pm_qos_request, up->latency); in serial_omap_probe()
1624 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); in serial_omap_probe()
1626 platform_set_drvdata(pdev, up); in serial_omap_probe()
1627 if (omap_up_info->autosuspend_timeout == 0) in serial_omap_probe()
1628 omap_up_info->autosuspend_timeout = -1; in serial_omap_probe()
1630 device_init_wakeup(up->dev, true); in serial_omap_probe()
1632 pm_runtime_enable(&pdev->dev); in serial_omap_probe()
1634 pm_runtime_get_sync(&pdev->dev); in serial_omap_probe()
1636 omap_serial_fill_features_erratas(up); in serial_omap_probe()
1638 ui[up->port.line] = up; in serial_omap_probe()
1639 serial_omap_add_console_port(up); in serial_omap_probe()
1641 ret = uart_add_one_port(&serial_omap_reg, &up->port); in serial_omap_probe()
1648 pm_runtime_put_sync(&pdev->dev); in serial_omap_probe()
1649 pm_runtime_disable(&pdev->dev); in serial_omap_probe()
1650 cpu_latency_qos_remove_request(&up->pm_qos_request); in serial_omap_probe()
1651 device_init_wakeup(up->dev, false); in serial_omap_probe()
1659 struct uart_omap_port *up = platform_get_drvdata(dev); in serial_omap_remove() local
1661 pm_runtime_get_sync(up->dev); in serial_omap_remove()
1663 uart_remove_one_port(&serial_omap_reg, &up->port); in serial_omap_remove()
1665 pm_runtime_put_sync(up->dev); in serial_omap_remove()
1666 pm_runtime_disable(up->dev); in serial_omap_remove()
1667 cpu_latency_qos_remove_request(&up->pm_qos_request); in serial_omap_remove()
1668 device_init_wakeup(&dev->dev, false); in serial_omap_remove()
1673 * The access to uart register after MDR1 Access
1674 * causes UART to corrupt data.
1680 static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) in serial_omap_mdr1_errataset() argument
1684 serial_out(up, UART_OMAP_MDR1, mdr1); in serial_omap_mdr1_errataset()
1686 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | in serial_omap_mdr1_errataset()
1689 * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and in serial_omap_mdr1_errataset()
1692 while (UART_LSR_THRE != (serial_in(up, UART_LSR) & in serial_omap_mdr1_errataset()
1694 timeout--; in serial_omap_mdr1_errataset()
1697 dev_crit(up->dev, "Errata i202: timedout %x\n", in serial_omap_mdr1_errataset()
1698 serial_in(up, UART_LSR)); in serial_omap_mdr1_errataset()
1706 static void serial_omap_restore_context(struct uart_omap_port *up) in serial_omap_restore_context() argument
1708 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) in serial_omap_restore_context()
1709 serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); in serial_omap_restore_context()
1711 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); in serial_omap_restore_context()
1713 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ in serial_omap_restore_context()
1714 serial_out(up, UART_EFR, UART_EFR_ECB); in serial_omap_restore_context()
1715 serial_out(up, UART_LCR, 0x0); /* Operational mode */ in serial_omap_restore_context()
1716 serial_out(up, UART_IER, 0x0); in serial_omap_restore_context()
1717 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ in serial_omap_restore_context()
1718 serial_out(up, UART_DLL, up->dll); in serial_omap_restore_context()
1719 serial_out(up, UART_DLM, up->dlh); in serial_omap_restore_context()
1720 serial_out(up, UART_LCR, 0x0); /* Operational mode */ in serial_omap_restore_context()
1721 serial_out(up, UART_IER, up->ier); in serial_omap_restore_context()
1722 serial_out(up, UART_FCR, up->fcr); in serial_omap_restore_context()
1723 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in serial_omap_restore_context()
1724 serial_out(up, UART_MCR, up->mcr); in serial_omap_restore_context()
1725 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ in serial_omap_restore_context()
1726 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_restore_context()
1727 serial_out(up, UART_EFR, up->efr); in serial_omap_restore_context()
1728 serial_out(up, UART_LCR, up->lcr); in serial_omap_restore_context()
1729 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) in serial_omap_restore_context()
1730 serial_omap_mdr1_errataset(up, up->mdr1); in serial_omap_restore_context()
1732 serial_out(up, UART_OMAP_MDR1, up->mdr1); in serial_omap_restore_context()
1733 serial_out(up, UART_OMAP_WER, up->wer); in serial_omap_restore_context()
1738 struct uart_omap_port *up = dev_get_drvdata(dev); in serial_omap_runtime_suspend() local
1740 if (!up) in serial_omap_runtime_suspend()
1741 return -EINVAL; in serial_omap_runtime_suspend()
1749 if (up->is_suspending && !console_suspend_enabled && in serial_omap_runtime_suspend()
1750 uart_console(&up->port)) in serial_omap_runtime_suspend()
1751 return -EBUSY; in serial_omap_runtime_suspend()
1753 up->context_loss_cnt = serial_omap_get_context_loss_count(up); in serial_omap_runtime_suspend()
1755 serial_omap_enable_wakeup(up, true); in serial_omap_runtime_suspend()
1757 up->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in serial_omap_runtime_suspend()
1758 schedule_work(&up->qos_work); in serial_omap_runtime_suspend()
1765 struct uart_omap_port *up = dev_get_drvdata(dev); in serial_omap_runtime_resume() local
1767 int loss_cnt = serial_omap_get_context_loss_count(up); in serial_omap_runtime_resume()
1769 serial_omap_enable_wakeup(up, false); in serial_omap_runtime_resume()
1774 serial_omap_restore_context(up); in serial_omap_runtime_resume()
1775 } else if (up->context_loss_cnt != loss_cnt) { in serial_omap_runtime_resume()
1776 serial_omap_restore_context(up); in serial_omap_runtime_resume()
1778 up->latency = up->calc_latency; in serial_omap_runtime_resume()
1779 schedule_work(&up->qos_work); in serial_omap_runtime_resume()
1795 { .compatible = "ti,omap2-uart" },
1796 { .compatible = "ti,omap3-uart" },
1797 { .compatible = "ti,omap4-uart" },