Lines Matching +full:rx +full:- +full:watermark
1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
169 } rx; member
198 writel_relaxed(val, port->membase + off); in msm_write()
204 return readl_relaxed(port->membase + off); in msm_read()
216 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxo()
228 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxoby4()
239 if (msm_port->is_uartdm) in msm_serial_set_mnd_regs()
242 if (port->uartclk == 19200000) in msm_serial_set_mnd_regs()
244 else if (port->uartclk == 4800000) in msm_serial_set_mnd_regs()
253 struct device *dev = port->dev; in msm_stop_dma()
257 if (dma->dir == DMA_TO_DEVICE) { in msm_stop_dma()
258 mapped = sg_dma_len(&dma->tx_sg); in msm_stop_dma()
260 mapped = dma->rx.count; in msm_stop_dma()
261 dma->rx.count = 0; in msm_stop_dma()
264 dmaengine_terminate_all(dma->chan); in msm_stop_dma()
274 val &= ~dma->enable_bit; in msm_stop_dma()
278 if (dma->dir == DMA_TO_DEVICE) { in msm_stop_dma()
279 dma_unmap_sg(dev, &dma->tx_sg, 1, dma->dir); in msm_stop_dma()
280 sg_init_table(&dma->tx_sg, 1); in msm_stop_dma()
282 dma_unmap_single(dev, dma->rx.phys, mapped, dma->dir); in msm_stop_dma()
290 dma = &msm_port->tx_dma; in msm_release_dma()
291 if (dma->chan) { in msm_release_dma()
292 msm_stop_dma(&msm_port->uart, dma); in msm_release_dma()
293 dma_release_channel(dma->chan); in msm_release_dma()
298 dma = &msm_port->rx_dma; in msm_release_dma()
299 if (dma->chan) { in msm_release_dma()
300 msm_stop_dma(&msm_port->uart, dma); in msm_release_dma()
301 dma_release_channel(dma->chan); in msm_release_dma()
302 kfree(dma->rx.virt); in msm_release_dma()
310 struct device *dev = msm_port->uart.dev; in msm_request_tx_dma()
317 dma = &msm_port->tx_dma; in msm_request_tx_dma()
320 dma->chan = dma_request_chan(dev, "tx"); in msm_request_tx_dma()
321 if (IS_ERR(dma->chan)) in msm_request_tx_dma()
324 of_property_read_u32(dev->of_node, "qcom,tx-crci", &crci); in msm_request_tx_dma()
337 ret = dmaengine_slave_config(dma->chan, &conf); in msm_request_tx_dma()
341 dma->dir = DMA_TO_DEVICE; in msm_request_tx_dma()
343 if (msm_port->is_uartdm < UARTDM_1P4) in msm_request_tx_dma()
344 dma->enable_bit = UARTDM_DMEN_TX_DM_ENABLE; in msm_request_tx_dma()
346 dma->enable_bit = UARTDM_DMEN_TX_BAM_ENABLE; in msm_request_tx_dma()
351 dma_release_channel(dma->chan); in msm_request_tx_dma()
358 struct device *dev = msm_port->uart.dev; in msm_request_rx_dma()
365 dma = &msm_port->rx_dma; in msm_request_rx_dma()
368 dma->chan = dma_request_chan(dev, "rx"); in msm_request_rx_dma()
369 if (IS_ERR(dma->chan)) in msm_request_rx_dma()
372 of_property_read_u32(dev->of_node, "qcom,rx-crci", &crci); in msm_request_rx_dma()
374 dma->rx.virt = kzalloc(UARTDM_RX_SIZE, GFP_KERNEL); in msm_request_rx_dma()
375 if (!dma->rx.virt) in msm_request_rx_dma()
389 ret = dmaengine_slave_config(dma->chan, &conf); in msm_request_rx_dma()
393 dma->dir = DMA_FROM_DEVICE; in msm_request_rx_dma()
395 if (msm_port->is_uartdm < UARTDM_1P4) in msm_request_rx_dma()
396 dma->enable_bit = UARTDM_DMEN_RX_DM_ENABLE; in msm_request_rx_dma()
398 dma->enable_bit = UARTDM_DMEN_RX_BAM_ENABLE; in msm_request_rx_dma()
402 kfree(dma->rx.virt); in msm_request_rx_dma()
404 dma_release_channel(dma->chan); in msm_request_rx_dma()
417 if (!timeout--) in msm_wait_for_xmitr()
427 msm_port->imr &= ~MSM_UART_IMR_TXLEV; in msm_stop_tx()
428 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_stop_tx()
434 struct msm_dma *dma = &msm_port->tx_dma; in msm_start_tx()
437 if (sg_dma_len(&dma->tx_sg)) in msm_start_tx()
440 msm_port->imr |= MSM_UART_IMR_TXLEV; in msm_start_tx()
441 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_start_tx()
454 struct uart_port *port = &msm_port->uart; in msm_complete_tx_dma()
455 struct tty_port *tport = &port->state->port; in msm_complete_tx_dma()
456 struct msm_dma *dma = &msm_port->tx_dma; in msm_complete_tx_dma()
465 if (!sg_dma_len(&dma->tx_sg)) in msm_complete_tx_dma()
468 dmaengine_tx_status(dma->chan, dma->cookie, &state); in msm_complete_tx_dma()
470 dma_unmap_sg(port->dev, &dma->tx_sg, 1, dma->dir); in msm_complete_tx_dma()
473 val &= ~dma->enable_bit; in msm_complete_tx_dma()
476 if (msm_port->is_uartdm > UARTDM_1P3) { in msm_complete_tx_dma()
481 count = sg_dma_len(&dma->tx_sg) - state.residue; in msm_complete_tx_dma()
483 sg_init_table(&dma->tx_sg, 1); in msm_complete_tx_dma()
485 /* Restore "Tx FIFO below watermark" interrupt */ in msm_complete_tx_dma()
486 msm_port->imr |= MSM_UART_IMR_TXLEV; in msm_complete_tx_dma()
487 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_complete_tx_dma()
489 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in msm_complete_tx_dma()
499 struct uart_port *port = &msm_port->uart; in msm_handle_tx_dma()
500 struct tty_port *tport = &port->state->port; in msm_handle_tx_dma()
501 struct msm_dma *dma = &msm_port->tx_dma; in msm_handle_tx_dma()
506 sg_init_table(&dma->tx_sg, 1); in msm_handle_tx_dma()
507 kfifo_dma_out_prepare(&tport->xmit_fifo, &dma->tx_sg, 1, count); in msm_handle_tx_dma()
509 mapped = dma_map_sg(port->dev, &dma->tx_sg, 1, dma->dir); in msm_handle_tx_dma()
511 ret = -EIO; in msm_handle_tx_dma()
515 dma->desc = dmaengine_prep_slave_sg(dma->chan, &dma->tx_sg, 1, in msm_handle_tx_dma()
519 if (!dma->desc) { in msm_handle_tx_dma()
520 ret = -EIO; in msm_handle_tx_dma()
524 dma->desc->callback = msm_complete_tx_dma; in msm_handle_tx_dma()
525 dma->desc->callback_param = msm_port; in msm_handle_tx_dma()
527 dma->cookie = dmaengine_submit(dma->desc); in msm_handle_tx_dma()
528 ret = dma_submit_error(dma->cookie); in msm_handle_tx_dma()
534 * "Tx FIFO below watermark" one, disable it in msm_handle_tx_dma()
536 msm_port->imr &= ~MSM_UART_IMR_TXLEV; in msm_handle_tx_dma()
537 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_handle_tx_dma()
540 val |= dma->enable_bit; in msm_handle_tx_dma()
542 if (msm_port->is_uartdm < UARTDM_1P4) in msm_handle_tx_dma()
547 if (msm_port->is_uartdm > UARTDM_1P3) in msm_handle_tx_dma()
550 dma_async_issue_pending(dma->chan); in msm_handle_tx_dma()
553 dma_unmap_sg(port->dev, &dma->tx_sg, 1, dma->dir); in msm_handle_tx_dma()
555 sg_init_table(&dma->tx_sg, 1); in msm_handle_tx_dma()
562 struct uart_port *port = &msm_port->uart; in msm_complete_rx_dma()
563 struct tty_port *tport = &port->state->port; in msm_complete_rx_dma()
564 struct msm_dma *dma = &msm_port->rx_dma; in msm_complete_rx_dma()
572 if (!dma->rx.count) in msm_complete_rx_dma()
576 val &= ~dma->enable_bit; in msm_complete_rx_dma()
580 port->icount.overrun++; in msm_complete_rx_dma()
587 port->icount.rx += count; in msm_complete_rx_dma()
589 dma->rx.count = 0; in msm_complete_rx_dma()
591 dma_unmap_single(port->dev, dma->rx.phys, UARTDM_RX_SIZE, dma->dir); in msm_complete_rx_dma()
596 if (msm_port->break_detected && dma->rx.virt[i] == 0) { in msm_complete_rx_dma()
597 port->icount.brk++; in msm_complete_rx_dma()
599 msm_port->break_detected = false; in msm_complete_rx_dma()
604 if (!(port->read_status_mask & MSM_UART_SR_RX_BREAK)) in msm_complete_rx_dma()
607 sysrq = uart_prepare_sysrq_char(port, dma->rx.virt[i]); in msm_complete_rx_dma()
609 tty_insert_flip_char(tport, dma->rx.virt[i], flag); in msm_complete_rx_dma()
622 struct msm_dma *dma = &msm_port->rx_dma; in msm_start_rx_dma()
623 struct uart_port *uart = &msm_port->uart; in msm_start_rx_dma()
630 if (!dma->chan) in msm_start_rx_dma()
633 dma->rx.phys = dma_map_single(uart->dev, dma->rx.virt, in msm_start_rx_dma()
634 UARTDM_RX_SIZE, dma->dir); in msm_start_rx_dma()
635 ret = dma_mapping_error(uart->dev, dma->rx.phys); in msm_start_rx_dma()
639 dma->desc = dmaengine_prep_slave_single(dma->chan, dma->rx.phys, in msm_start_rx_dma()
642 if (!dma->desc) in msm_start_rx_dma()
645 dma->desc->callback = msm_complete_rx_dma; in msm_start_rx_dma()
646 dma->desc->callback_param = msm_port; in msm_start_rx_dma()
648 dma->cookie = dmaengine_submit(dma->desc); in msm_start_rx_dma()
649 ret = dma_submit_error(dma->cookie); in msm_start_rx_dma()
653 * Using DMA for FIFO off-load, no need for "Rx FIFO over in msm_start_rx_dma()
654 * watermark" or "stale" interrupts, disable them in msm_start_rx_dma()
656 msm_port->imr &= ~(MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE); in msm_start_rx_dma()
662 if (msm_port->is_uartdm < UARTDM_1P4) in msm_start_rx_dma()
663 msm_port->imr |= MSM_UART_IMR_RXSTALE; in msm_start_rx_dma()
665 msm_write(uart, msm_port->imr, MSM_UART_IMR); in msm_start_rx_dma()
667 dma->rx.count = UARTDM_RX_SIZE; in msm_start_rx_dma()
669 dma_async_issue_pending(dma->chan); in msm_start_rx_dma()
675 val |= dma->enable_bit; in msm_start_rx_dma()
677 if (msm_port->is_uartdm < UARTDM_1P4) in msm_start_rx_dma()
682 if (msm_port->is_uartdm > UARTDM_1P3) in msm_start_rx_dma()
687 dma_unmap_single(uart->dev, dma->rx.phys, UARTDM_RX_SIZE, dma->dir); in msm_start_rx_dma()
691 * Switch from DMA to SW/FIFO mode. After clearing Rx BAM (UARTDM_DMEN), in msm_start_rx_dma()
701 /* Re-enable RX interrupts */ in msm_start_rx_dma()
702 msm_port->imr |= MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE; in msm_start_rx_dma()
703 msm_write(uart, msm_port->imr, MSM_UART_IMR); in msm_start_rx_dma()
709 struct msm_dma *dma = &msm_port->rx_dma; in msm_stop_rx()
711 msm_port->imr &= ~(MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE); in msm_stop_rx()
712 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_stop_rx()
714 if (dma->chan) in msm_stop_rx()
722 msm_port->imr |= MSM_UART_IMR_DELTA_CTS; in msm_enable_ms()
723 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_enable_ms()
727 __must_hold(&port->lock) in msm_handle_rx_dm()
729 struct tty_port *tport = &port->state->port; in msm_handle_rx_dm()
735 port->icount.overrun++; in msm_handle_rx_dm()
741 count = msm_read(port, UARTDM_RX_TOTAL_SNAP) - in msm_handle_rx_dm()
742 msm_port->old_snap_state; in msm_handle_rx_dm()
743 msm_port->old_snap_state = 0; in msm_handle_rx_dm()
746 msm_port->old_snap_state += count; in msm_handle_rx_dm()
751 port->icount.rx += count; in msm_handle_rx_dm()
759 msm_port->old_snap_state -= count; in msm_handle_rx_dm()
763 ioread32_rep(port->membase + UARTDM_RF, buf, 1); in msm_handle_rx_dm()
769 if (msm_port->break_detected && buf[i] == 0) { in msm_handle_rx_dm()
770 port->icount.brk++; in msm_handle_rx_dm()
772 msm_port->break_detected = false; in msm_handle_rx_dm()
777 if (!(port->read_status_mask & MSM_UART_SR_RX_BREAK)) in msm_handle_rx_dm()
784 count -= r_count; in msm_handle_rx_dm()
799 __must_hold(&port->lock) in msm_handle_rx()
801 struct tty_port *tport = &port->state->port; in msm_handle_rx()
806 * is not tied to the RX buffer, so we handle the case out of band. in msm_handle_rx()
809 port->icount.overrun++; in msm_handle_rx()
814 /* and now the main RX loop */ in msm_handle_rx()
823 port->icount.brk++; in msm_handle_rx()
827 port->icount.frame++; in msm_handle_rx()
829 port->icount.rx++; in msm_handle_rx()
833 sr &= port->read_status_mask; in msm_handle_rx()
851 struct tty_port *tport = &port->state->port; in msm_handle_tx_pio()
856 if (msm_port->is_uartdm) in msm_handle_tx_pio()
857 tf = port->membase + UARTDM_TF; in msm_handle_tx_pio()
859 tf = port->membase + MSM_UART_TF; in msm_handle_tx_pio()
861 if (tx_count && msm_port->is_uartdm) in msm_handle_tx_pio()
870 if (msm_port->is_uartdm) in msm_handle_tx_pio()
871 num_chars = min(tx_count - tf_pointer, in msm_handle_tx_pio()
882 if (kfifo_is_empty(&tport->xmit_fifo)) in msm_handle_tx_pio()
885 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in msm_handle_tx_pio()
892 struct tty_port *tport = &port->state->port; in msm_handle_tx()
893 struct msm_dma *dma = &msm_port->tx_dma; in msm_handle_tx()
899 if (port->x_char) { in msm_handle_tx()
900 if (msm_port->is_uartdm) in msm_handle_tx()
901 tf = port->membase + UARTDM_TF; in msm_handle_tx()
903 tf = port->membase + MSM_UART_TF; in msm_handle_tx()
905 buf[0] = port->x_char; in msm_handle_tx()
907 if (msm_port->is_uartdm) in msm_handle_tx()
911 port->icount.tx++; in msm_handle_tx()
912 port->x_char = 0; in msm_handle_tx()
916 if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)) { in msm_handle_tx()
921 dma_count = pio_count = kfifo_out_linear(&tport->xmit_fifo, NULL, in msm_handle_tx()
925 if (msm_port->is_uartdm > UARTDM_1P3) { in msm_handle_tx()
933 if (pio_count > port->fifosize) in msm_handle_tx()
934 pio_count = port->fifosize; in msm_handle_tx()
936 if (!dma->chan || dma_count < dma_min) in msm_handle_tx()
948 port->icount.cts++; in msm_handle_delta_cts()
949 wake_up_interruptible(&port->state->port.delta_msr_wait); in msm_handle_delta_cts()
956 struct msm_dma *dma = &msm_port->rx_dma; in msm_uart_irq()
965 msm_port->break_detected = true; in msm_uart_irq()
970 if (dma->rx.count) { in msm_uart_irq()
977 * trigger DMA RX completion in msm_uart_irq()
979 dmaengine_terminate_all(dma->chan); in msm_uart_irq()
980 } else if (msm_port->is_uartdm) { in msm_uart_irq()
991 msm_write(port, msm_port->imr, MSM_UART_IMR); /* restore interrupt */ in msm_uart_irq()
1024 if (msm_port->is_uartdm) in msm_reset()
1086 target = clk_round_rate(msm_port->clk, 16 * baud); in msm_find_best_baud()
1092 if (entry->divisor <= divisor) { in msm_find_best_baud()
1093 result = target / entry->divisor / 16; in msm_find_best_baud()
1094 diff = abs(result - baud); in msm_find_best_baud()
1105 } else if (entry->divisor > divisor) { in msm_find_best_baud()
1107 target = clk_round_rate(msm_port->clk, old + 1); in msm_find_best_baud()
1129 __must_hold(&port->lock) in msm_set_baud_rate()
1131 unsigned int rxstale, watermark, mask; in msm_set_baud_rate() local
1140 dev_pm_opp_set_rate(port->dev, rate); in msm_set_baud_rate()
1141 baud = rate / 16 / entry->divisor; in msm_set_baud_rate()
1145 port->uartclk = rate; in msm_set_baud_rate()
1147 msm_write(port, entry->code, MSM_UART_CSR); in msm_set_baud_rate()
1149 /* RX stale watermark */ in msm_set_baud_rate()
1150 rxstale = entry->rxstale; in msm_set_baud_rate()
1151 watermark = MSM_UART_IPR_STALE_LSB & rxstale; in msm_set_baud_rate()
1152 if (msm_port->is_uartdm) { in msm_set_baud_rate()
1155 watermark |= MSM_UART_IPR_RXSTALE_LAST; in msm_set_baud_rate()
1159 watermark |= mask & (rxstale << 2); in msm_set_baud_rate()
1161 msm_write(port, watermark, MSM_UART_IPR); in msm_set_baud_rate()
1163 /* set RX watermark */ in msm_set_baud_rate()
1164 watermark = (port->fifosize * 3) / 4; in msm_set_baud_rate()
1165 msm_write(port, watermark, MSM_UART_RFWR); in msm_set_baud_rate()
1167 /* set TX watermark */ in msm_set_baud_rate()
1173 /* Enable RX and TX */ in msm_set_baud_rate()
1176 /* turn on RX and CTS interrupts */ in msm_set_baud_rate()
1177 msm_port->imr = MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE | in msm_set_baud_rate()
1180 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_set_baud_rate()
1182 if (msm_port->is_uartdm) { in msm_set_baud_rate()
1195 dev_pm_opp_set_rate(port->dev, port->uartclk); in msm_init_clock()
1196 clk_prepare_enable(msm_port->clk); in msm_init_clock()
1197 clk_prepare_enable(msm_port->pclk); in msm_init_clock()
1207 snprintf(msm_port->name, sizeof(msm_port->name), in msm_startup()
1208 "msm_serial%d", port->line); in msm_startup()
1212 if (likely(port->fifosize > 12)) in msm_startup()
1213 rfr_level = port->fifosize - 12; in msm_startup()
1215 rfr_level = port->fifosize; in msm_startup()
1220 if (msm_port->is_uartdm) in msm_startup()
1231 if (msm_port->is_uartdm) { in msm_startup()
1232 msm_request_tx_dma(msm_port, msm_port->uart.mapbase); in msm_startup()
1233 msm_request_rx_dma(msm_port, msm_port->uart.mapbase); in msm_startup()
1236 ret = request_irq(port->irq, msm_uart_irq, IRQF_TRIGGER_HIGH, in msm_startup()
1237 msm_port->name, port); in msm_startup()
1244 if (msm_port->is_uartdm) in msm_startup()
1247 clk_disable_unprepare(msm_port->pclk); in msm_startup()
1248 clk_disable_unprepare(msm_port->clk); in msm_startup()
1249 dev_pm_opp_set_rate(port->dev, 0); in msm_startup()
1258 msm_port->imr = 0; in msm_shutdown()
1261 if (msm_port->is_uartdm) in msm_shutdown()
1264 clk_disable_unprepare(msm_port->clk); in msm_shutdown()
1265 dev_pm_opp_set_rate(port->dev, 0); in msm_shutdown()
1267 free_irq(port->irq, port); in msm_shutdown()
1274 struct msm_dma *dma = &msm_port->rx_dma; in msm_set_termios()
1280 if (dma->chan) /* Terminate if any */ in msm_set_termios()
1292 if (termios->c_cflag & PARENB) { in msm_set_termios()
1293 if (termios->c_cflag & PARODD) in msm_set_termios()
1295 else if (termios->c_cflag & CMSPAR) in msm_set_termios()
1303 switch (termios->c_cflag & CSIZE) { in msm_set_termios()
1321 if (termios->c_cflag & CSTOPB) in msm_set_termios()
1332 if (termios->c_cflag & CRTSCTS) { in msm_set_termios()
1339 port->read_status_mask = 0; in msm_set_termios()
1340 if (termios->c_iflag & INPCK) in msm_set_termios()
1341 port->read_status_mask |= MSM_UART_SR_PAR_FRAME_ERR; in msm_set_termios()
1342 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) in msm_set_termios()
1343 port->read_status_mask |= MSM_UART_SR_RX_BREAK; in msm_set_termios()
1345 uart_update_timeout(port, termios->c_cflag, baud); in msm_set_termios()
1360 struct platform_device *pdev = to_platform_device(port->dev); in msm_release_port()
1369 release_mem_region(port->mapbase, size); in msm_release_port()
1370 iounmap(port->membase); in msm_release_port()
1371 port->membase = NULL; in msm_release_port()
1376 struct platform_device *pdev = to_platform_device(port->dev); in msm_request_port()
1383 return -ENXIO; in msm_request_port()
1387 if (!request_mem_region(port->mapbase, size, "msm_serial")) in msm_request_port()
1388 return -EBUSY; in msm_request_port()
1390 port->membase = ioremap(port->mapbase, size); in msm_request_port()
1391 if (!port->membase) { in msm_request_port()
1392 ret = -EBUSY; in msm_request_port()
1399 release_mem_region(port->mapbase, size); in msm_request_port()
1408 port->type = PORT_MSM; in msm_config_port()
1417 if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_MSM)) in msm_verify_port()
1418 return -EINVAL; in msm_verify_port()
1419 if (unlikely(port->irq != ser->irq)) in msm_verify_port()
1420 return -EINVAL; in msm_verify_port()
1431 dev_pm_opp_set_rate(port->dev, port->uartclk); in msm_power()
1432 clk_prepare_enable(msm_port->clk); in msm_power()
1433 clk_prepare_enable(msm_port->pclk); in msm_power()
1436 clk_disable_unprepare(msm_port->clk); in msm_power()
1437 dev_pm_opp_set_rate(port->dev, 0); in msm_power()
1438 clk_disable_unprepare(msm_port->pclk); in msm_power()
1449 unsigned int rf_reg = msm_port->is_uartdm ? UARTDM_RF : MSM_UART_RF; in msm_poll_get_char_single()
1466 c = sp[sizeof(slop) - count]; in msm_poll_get_char_dm()
1467 count--; in msm_poll_get_char_dm()
1471 * If RX packing buffer has less than a word, force stale to in msm_poll_get_char_dm()
1472 * push contents into RX FIFO in msm_poll_get_char_dm()
1480 count--; in msm_poll_get_char_dm()
1491 count = sizeof(slop) - 1; in msm_poll_get_char_dm()
1507 if (msm_port->is_uartdm) in msm_poll_get_char()
1527 if (msm_port->is_uartdm) in msm_poll_put_char()
1535 msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : MSM_UART_TF); in msm_poll_put_char()
1619 tf = port->membase + UARTDM_TF; in __msm_console_write()
1621 tf = port->membase + MSM_UART_TF; in __msm_console_write()
1644 num_chars = min(count - i, (unsigned int)sizeof(buf)); in __msm_console_write()
1680 BUG_ON(co->index < 0 || co->index >= MSM_UART_NR); in msm_console_write()
1682 port = msm_get_port_from_line(co->index); in msm_console_write()
1685 __msm_console_write(port, s, count, msm_port->is_uartdm); in msm_console_write()
1696 if (unlikely(co->index >= MSM_UART_NR || co->index < 0)) in msm_console_setup()
1697 return -ENXIO; in msm_console_setup()
1699 port = msm_get_port_from_line(co->index); in msm_console_setup()
1701 if (unlikely(!port->membase)) in msm_console_setup()
1702 return -ENXIO; in msm_console_setup()
1709 pr_info("msm_serial: console setup on port #%d\n", port->line); in msm_console_setup()
1717 struct earlycon_device *dev = con->data; in msm_serial_early_write()
1719 __msm_console_write(&dev->port, s, n, false); in msm_serial_early_write()
1725 if (!device->port.membase) in msm_serial_early_console_setup()
1726 return -ENODEV; in msm_serial_early_console_setup()
1728 device->con->write = msm_serial_early_write; in msm_serial_early_console_setup()
1731 OF_EARLYCON_DECLARE(msm_serial, "qcom,msm-uart",
1737 struct earlycon_device *dev = con->data; in msm_serial_early_write_dm()
1739 __msm_console_write(&dev->port, s, n, true); in msm_serial_early_write_dm()
1746 if (!device->port.membase) in msm_serial_early_console_setup_dm()
1747 return -ENODEV; in msm_serial_early_console_setup_dm()
1749 device->con->write = msm_serial_early_write_dm; in msm_serial_early_console_setup_dm()
1752 OF_EARLYCON_DECLARE(msm_serial_dm, "qcom,msm-uartdm",
1763 .index = -1,
1784 { .compatible = "qcom,msm-uartdm-v1.1", .data = (void *)UARTDM_1P1 },
1785 { .compatible = "qcom,msm-uartdm-v1.2", .data = (void *)UARTDM_1P2 },
1786 { .compatible = "qcom,msm-uartdm-v1.3", .data = (void *)UARTDM_1P3 },
1787 { .compatible = "qcom,msm-uartdm-v1.4", .data = (void *)UARTDM_1P4 },
1799 if (pdev->dev.of_node) in msm_serial_probe()
1800 line = of_alias_get_id(pdev->dev.of_node, "serial"); in msm_serial_probe()
1802 line = pdev->id; in msm_serial_probe()
1805 line = atomic_inc_return(&msm_uart_next_id) - 1; in msm_serial_probe()
1808 return -ENXIO; in msm_serial_probe()
1810 dev_info(&pdev->dev, "msm_serial: detected port #%d\n", line); in msm_serial_probe()
1813 port->dev = &pdev->dev; in msm_serial_probe()
1816 id = of_match_device(msm_uartdm_table, &pdev->dev); in msm_serial_probe()
1818 msm_port->is_uartdm = (unsigned long)id->data; in msm_serial_probe()
1820 msm_port->is_uartdm = 0; in msm_serial_probe()
1822 msm_port->clk = devm_clk_get(&pdev->dev, "core"); in msm_serial_probe()
1823 if (IS_ERR(msm_port->clk)) in msm_serial_probe()
1824 return PTR_ERR(msm_port->clk); in msm_serial_probe()
1826 if (msm_port->is_uartdm) { in msm_serial_probe()
1827 msm_port->pclk = devm_clk_get(&pdev->dev, "iface"); in msm_serial_probe()
1828 if (IS_ERR(msm_port->pclk)) in msm_serial_probe()
1829 return PTR_ERR(msm_port->pclk); in msm_serial_probe()
1832 ret = devm_pm_opp_set_clkname(&pdev->dev, "core"); in msm_serial_probe()
1837 ret = devm_pm_opp_of_add_table(&pdev->dev); in msm_serial_probe()
1838 if (ret && ret != -ENODEV) in msm_serial_probe()
1839 return dev_err_probe(&pdev->dev, ret, "invalid OPP table\n"); in msm_serial_probe()
1841 port->uartclk = clk_get_rate(msm_port->clk); in msm_serial_probe()
1842 dev_info(&pdev->dev, "uartclk = %d\n", port->uartclk); in msm_serial_probe()
1846 return -ENXIO; in msm_serial_probe()
1847 port->mapbase = resource->start; in msm_serial_probe()
1851 return -ENXIO; in msm_serial_probe()
1852 port->irq = irq; in msm_serial_probe()
1853 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MSM_CONSOLE); in msm_serial_probe()
1868 { .compatible = "qcom,msm-uart" },
1869 { .compatible = "qcom,msm-uartdm" },
1878 uart_suspend_port(&msm_uart_driver, &port->uart); in msm_serial_suspend()
1887 uart_resume_port(&msm_uart_driver, &port->uart); in msm_serial_resume()