Lines Matching +full:port +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0+
28 #include <linux/soc/nxp/lpc32xx-misc.h>
39 #define LPC32XX_HSU_BREAK_DATA (1 << 10)
40 #define LPC32XX_HSU_ERROR_DATA (1 << 9)
41 #define LPC32XX_HSU_RX_EMPTY (1 << 8)
46 #define LPC32XX_HSU_TX_INT_SET (1 << 6)
47 #define LPC32XX_HSU_RX_OE_INT (1 << 5)
48 #define LPC32XX_HSU_BRK_INT (1 << 4)
49 #define LPC32XX_HSU_FE_INT (1 << 3)
50 #define LPC32XX_HSU_RX_TIMEOUT_INT (1 << 2)
51 #define LPC32XX_HSU_RX_TRIG_INT (1 << 1)
52 #define LPC32XX_HSU_TX_INT (1 << 0)
54 #define LPC32XX_HSU_HRTS_INV (1 << 21)
59 #define LPC32XX_HSU_HRTS_EN (1 << 18)
64 #define LPC32XX_HSU_HCTS_INV (1 << 15)
65 #define LPC32XX_HSU_HCTS_EN (1 << 14)
67 #define LPC32XX_HSU_BREAK (1 << 8)
68 #define LPC32XX_HSU_ERR_INT_EN (1 << 7)
69 #define LPC32XX_HSU_RX_INT_EN (1 << 6)
70 #define LPC32XX_HSU_TX_INT_EN (1 << 5)
88 struct uart_port port; member
97 static void wait_for_xmit_empty(struct uart_port *port) in wait_for_xmit_empty() argument
103 port->membase))) == 0) in wait_for_xmit_empty()
105 if (--timeout == 0) in wait_for_xmit_empty()
107 udelay(1); in wait_for_xmit_empty()
108 } while (1); in wait_for_xmit_empty()
111 static void wait_for_xmit_ready(struct uart_port *port) in wait_for_xmit_ready() argument
115 while (1) { in wait_for_xmit_ready()
117 port->membase))) < 32) in wait_for_xmit_ready()
119 if (--timeout == 0) in wait_for_xmit_ready()
121 udelay(1); in wait_for_xmit_ready()
125 static void lpc32xx_hsuart_console_putchar(struct uart_port *port, unsigned char ch) in lpc32xx_hsuart_console_putchar() argument
127 wait_for_xmit_ready(port); in lpc32xx_hsuart_console_putchar()
128 writel((u32)ch, LPC32XX_HSUART_FIFO(port->membase)); in lpc32xx_hsuart_console_putchar()
134 struct lpc32xx_hsuart_port *up = &lpc32xx_hs_ports[co->index]; in lpc32xx_hsuart_console_write()
136 int locked = 1; in lpc32xx_hsuart_console_write()
140 locked = uart_port_trylock_irqsave(&up->port, &flags); in lpc32xx_hsuart_console_write()
142 uart_port_lock_irqsave(&up->port, &flags); in lpc32xx_hsuart_console_write()
144 uart_console_write(&up->port, s, count, lpc32xx_hsuart_console_putchar); in lpc32xx_hsuart_console_write()
145 wait_for_xmit_empty(&up->port); in lpc32xx_hsuart_console_write()
148 uart_port_unlock_irqrestore(&up->port, flags); in lpc32xx_hsuart_console_write()
154 struct uart_port *port; in lpc32xx_hsuart_console_setup() local
160 if (co->index >= MAX_PORTS) in lpc32xx_hsuart_console_setup()
161 co->index = 0; in lpc32xx_hsuart_console_setup()
163 port = &lpc32xx_hs_ports[co->index].port; in lpc32xx_hsuart_console_setup()
164 if (!port->membase) in lpc32xx_hsuart_console_setup()
165 return -ENODEV; in lpc32xx_hsuart_console_setup()
170 lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */ in lpc32xx_hsuart_console_setup()
172 return uart_set_options(port, co, baud, parity, bits, flow); in lpc32xx_hsuart_console_setup()
182 .index = -1,
215 goodrate = hsu_rate = (div / 14) - 1; in __serial_get_clock_div()
217 hsu_rate--; in __serial_get_clock_div()
224 comprate = uartclk / ((hsu_rate + 1) * 14); in __serial_get_clock_div()
225 if (abs(comprate - rate) < rate_diff) { in __serial_get_clock_div()
227 rate_diff = abs(comprate - rate); in __serial_get_clock_div()
236 static void __serial_uart_flush(struct uart_port *port) in __serial_uart_flush() argument
240 while ((readl(LPC32XX_HSUART_LEVEL(port->membase)) > 0) && in __serial_uart_flush()
242 readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_uart_flush()
245 static void __serial_lpc32xx_rx(struct uart_port *port) in __serial_lpc32xx_rx() argument
247 struct tty_port *tport = &port->state->port; in __serial_lpc32xx_rx()
251 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
254 port->icount.rx++; in __serial_lpc32xx_rx()
259 LPC32XX_HSUART_IIR(port->membase)); in __serial_lpc32xx_rx()
260 port->icount.frame++; in __serial_lpc32xx_rx()
265 if (!uart_prepare_sysrq_char(port, tmp & 0xff)) in __serial_lpc32xx_rx()
268 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
274 static bool serial_lpc32xx_tx_ready(struct uart_port *port) in serial_lpc32xx_tx_ready() argument
276 u32 level = readl(LPC32XX_HSUART_LEVEL(port->membase)); in serial_lpc32xx_tx_ready()
281 static void __serial_lpc32xx_tx(struct uart_port *port) in __serial_lpc32xx_tx() argument
285 uart_port_tx(port, ch, in __serial_lpc32xx_tx()
286 serial_lpc32xx_tx_ready(port), in __serial_lpc32xx_tx()
287 writel(ch, LPC32XX_HSUART_FIFO(port->membase))); in __serial_lpc32xx_tx()
292 struct uart_port *port = dev_id; in serial_lpc32xx_interrupt() local
293 struct tty_port *tport = &port->state->port; in serial_lpc32xx_interrupt()
296 uart_port_lock(port); in serial_lpc32xx_interrupt()
299 status = readl(LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
303 writel(LPC32XX_HSU_BRK_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
304 port->icount.brk++; in serial_lpc32xx_interrupt()
305 uart_handle_break(port); in serial_lpc32xx_interrupt()
310 writel(LPC32XX_HSU_FE_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
315 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
316 port->icount.overrun++; in serial_lpc32xx_interrupt()
323 __serial_lpc32xx_rx(port); in serial_lpc32xx_interrupt()
326 if ((status & LPC32XX_HSU_TX_INT) && (!uart_tx_stopped(port))) { in serial_lpc32xx_interrupt()
327 writel(LPC32XX_HSU_TX_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
328 __serial_lpc32xx_tx(port); in serial_lpc32xx_interrupt()
331 uart_unlock_and_check_sysrq(port); in serial_lpc32xx_interrupt()
336 /* port->lock is not held. */
337 static unsigned int serial_lpc32xx_tx_empty(struct uart_port *port) in serial_lpc32xx_tx_empty() argument
341 if (LPC32XX_HSU_TX_LEV(readl(LPC32XX_HSUART_LEVEL(port->membase))) == 0) in serial_lpc32xx_tx_empty()
347 /* port->lock held by caller. */
348 static void serial_lpc32xx_set_mctrl(struct uart_port *port, in serial_lpc32xx_set_mctrl() argument
354 /* port->lock is held by caller and interrupts are disabled. */
355 static unsigned int serial_lpc32xx_get_mctrl(struct uart_port *port) in serial_lpc32xx_get_mctrl() argument
361 /* port->lock held by caller. */
362 static void serial_lpc32xx_stop_tx(struct uart_port *port) in serial_lpc32xx_stop_tx() argument
366 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
368 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
371 /* port->lock held by caller. */
372 static void serial_lpc32xx_start_tx(struct uart_port *port) in serial_lpc32xx_start_tx() argument
376 __serial_lpc32xx_tx(port); in serial_lpc32xx_start_tx()
377 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
379 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
382 /* port->lock held by caller. */
383 static void serial_lpc32xx_stop_rx(struct uart_port *port) in serial_lpc32xx_stop_rx() argument
387 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
389 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
392 LPC32XX_HSU_FE_INT), LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_stop_rx()
395 /* port->lock is not held. */
396 static void serial_lpc32xx_break_ctl(struct uart_port *port, in serial_lpc32xx_break_ctl() argument
402 uart_port_lock_irqsave(port, &flags); in serial_lpc32xx_break_ctl()
403 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
408 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
409 uart_port_unlock_irqrestore(port, flags); in serial_lpc32xx_break_ctl()
412 /* port->lock is not held. */
413 static int serial_lpc32xx_startup(struct uart_port *port) in serial_lpc32xx_startup() argument
419 uart_port_lock_irqsave(port, &flags); in serial_lpc32xx_startup()
421 __serial_uart_flush(port); in serial_lpc32xx_startup()
425 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_startup()
427 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_startup()
435 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
437 lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */ in serial_lpc32xx_startup()
439 uart_port_unlock_irqrestore(port, flags); in serial_lpc32xx_startup()
441 retval = request_irq(port->irq, serial_lpc32xx_interrupt, in serial_lpc32xx_startup()
442 0, MODNAME, port); in serial_lpc32xx_startup()
445 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
450 /* port->lock is not held. */
451 static void serial_lpc32xx_shutdown(struct uart_port *port) in serial_lpc32xx_shutdown() argument
456 uart_port_lock_irqsave(port, &flags); in serial_lpc32xx_shutdown()
460 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_shutdown()
462 lpc32xx_loopback_set(port->mapbase, 1); /* go to loopback mode */ in serial_lpc32xx_shutdown()
464 uart_port_unlock_irqrestore(port, flags); in serial_lpc32xx_shutdown()
466 free_irq(port->irq, port); in serial_lpc32xx_shutdown()
469 /* port->lock is not held. */
470 static void serial_lpc32xx_set_termios(struct uart_port *port, in serial_lpc32xx_set_termios() argument
478 /* Always 8-bit, no parity, 1 stop bit */ in serial_lpc32xx_set_termios()
479 termios->c_cflag &= ~(CSIZE | CSTOPB | PARENB | PARODD); in serial_lpc32xx_set_termios()
480 termios->c_cflag |= CS8; in serial_lpc32xx_set_termios()
482 termios->c_cflag &= ~(HUPCL | CMSPAR | CLOCAL | CRTSCTS); in serial_lpc32xx_set_termios()
484 baud = uart_get_baud_rate(port, termios, old, 0, in serial_lpc32xx_set_termios()
485 port->uartclk / 14); in serial_lpc32xx_set_termios()
487 quot = __serial_get_clock_div(port->uartclk, baud); in serial_lpc32xx_set_termios()
489 uart_port_lock_irqsave(port, &flags); in serial_lpc32xx_set_termios()
492 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
493 if ((termios->c_cflag & CREAD) == 0) in serial_lpc32xx_set_termios()
497 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
499 writel(quot, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_set_termios()
501 uart_update_timeout(port, termios->c_cflag, baud); in serial_lpc32xx_set_termios()
503 uart_port_unlock_irqrestore(port, flags); in serial_lpc32xx_set_termios()
510 static const char *serial_lpc32xx_type(struct uart_port *port) in serial_lpc32xx_type() argument
515 static void serial_lpc32xx_release_port(struct uart_port *port) in serial_lpc32xx_release_port() argument
517 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_release_port()
518 if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_release_port()
519 iounmap(port->membase); in serial_lpc32xx_release_port()
520 port->membase = NULL; in serial_lpc32xx_release_port()
523 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_release_port()
527 static int serial_lpc32xx_request_port(struct uart_port *port) in serial_lpc32xx_request_port() argument
529 int ret = -ENODEV; in serial_lpc32xx_request_port()
531 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_request_port()
534 if (!request_mem_region(port->mapbase, SZ_4K, MODNAME)) in serial_lpc32xx_request_port()
535 ret = -EBUSY; in serial_lpc32xx_request_port()
536 else if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_request_port()
537 port->membase = ioremap(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
538 if (!port->membase) { in serial_lpc32xx_request_port()
539 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
540 ret = -ENOMEM; in serial_lpc32xx_request_port()
548 static void serial_lpc32xx_config_port(struct uart_port *port, int uflags) in serial_lpc32xx_config_port() argument
552 ret = serial_lpc32xx_request_port(port); in serial_lpc32xx_config_port()
555 port->type = PORT_UART00; in serial_lpc32xx_config_port()
556 port->fifosize = 64; in serial_lpc32xx_config_port()
558 __serial_uart_flush(port); in serial_lpc32xx_config_port()
562 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_config_port()
564 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_config_port()
570 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_config_port()
573 static int serial_lpc32xx_verify_port(struct uart_port *port, in serial_lpc32xx_verify_port() argument
578 if (ser->type != PORT_UART00) in serial_lpc32xx_verify_port()
579 ret = -EINVAL; in serial_lpc32xx_verify_port()
612 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
614 uarts_registered + 1); in serial_hs_lpc32xx_probe()
615 return -ENXIO; in serial_hs_lpc32xx_probe()
622 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
623 "Error getting mem resource for HS UART port %d\n", in serial_hs_lpc32xx_probe()
625 return -ENXIO; in serial_hs_lpc32xx_probe()
627 p->port.mapbase = res->start; in serial_hs_lpc32xx_probe()
628 p->port.membase = NULL; in serial_hs_lpc32xx_probe()
633 p->port.irq = ret; in serial_hs_lpc32xx_probe()
635 p->port.iotype = UPIO_MEM32; in serial_hs_lpc32xx_probe()
636 p->port.uartclk = LPC32XX_MAIN_OSC_FREQ; in serial_hs_lpc32xx_probe()
637 p->port.regshift = 2; in serial_hs_lpc32xx_probe()
638 p->port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_IOREMAP; in serial_hs_lpc32xx_probe()
639 p->port.dev = &pdev->dev; in serial_hs_lpc32xx_probe()
640 p->port.ops = &serial_lpc32xx_pops; in serial_hs_lpc32xx_probe()
641 p->port.line = uarts_registered++; in serial_hs_lpc32xx_probe()
642 spin_lock_init(&p->port.lock); in serial_hs_lpc32xx_probe()
644 /* send port to loopback mode by default */ in serial_hs_lpc32xx_probe()
645 lpc32xx_loopback_set(p->port.mapbase, 1); in serial_hs_lpc32xx_probe()
647 ret = uart_add_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_probe()
661 uart_remove_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_remove()
671 uart_suspend_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_suspend()
680 uart_resume_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_resume()
690 { .compatible = "nxp,lpc3220-hsuart" },