Lines Matching full:up
93 #define ZS_IS_CONS(UP) ((UP)->flags & IP22ZILOG_FLAG_IS_CONS) argument
94 #define ZS_IS_KGDB(UP) ((UP)->flags & IP22ZILOG_FLAG_IS_KGDB) argument
95 #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & IP22ZILOG_FLAG_MODEM_STATUS) argument
96 #define ZS_IS_CHANNEL_A(UP) ((UP)->flags & IP22ZILOG_FLAG_IS_CHANNEL_A) argument
97 #define ZS_REGS_HELD(UP) ((UP)->flags & IP22ZILOG_FLAG_REGS_HELD) argument
98 #define ZS_TX_STOPPED(UP) ((UP)->flags & IP22ZILOG_FLAG_TX_STOPPED) argument
99 #define ZS_TX_ACTIVE(UP) ((UP)->flags & IP22ZILOG_FLAG_TX_ACTIVE) argument
233 static void ip22zilog_maybe_update_regs(struct uart_ip22zilog_port *up, in ip22zilog_maybe_update_regs() argument
236 if (!ZS_REGS_HELD(up)) { in ip22zilog_maybe_update_regs()
237 if (ZS_TX_ACTIVE(up)) { in ip22zilog_maybe_update_regs()
238 up->flags |= IP22ZILOG_FLAG_REGS_HELD; in ip22zilog_maybe_update_regs()
240 __load_zsregs(channel, up->curregs); in ip22zilog_maybe_update_regs()
248 static bool ip22zilog_receive_chars(struct uart_ip22zilog_port *up, in ip22zilog_receive_chars() argument
253 bool push = up->port.state != NULL; in ip22zilog_receive_chars()
271 ch &= up->parity_mask; in ip22zilog_receive_chars()
275 r1 |= up->tty_break; in ip22zilog_receive_chars()
279 up->port.icount.rx++; in ip22zilog_receive_chars()
281 up->tty_break = 0; in ip22zilog_receive_chars()
284 up->port.icount.brk++; in ip22zilog_receive_chars()
290 up->port.icount.parity++; in ip22zilog_receive_chars()
292 up->port.icount.frame++; in ip22zilog_receive_chars()
294 up->port.icount.overrun++; in ip22zilog_receive_chars()
295 r1 &= up->port.read_status_mask; in ip22zilog_receive_chars()
304 if (uart_handle_sysrq_char(&up->port, ch)) in ip22zilog_receive_chars()
308 uart_insert_char(&up->port, r1, Rx_OVR, ch, flag); in ip22zilog_receive_chars()
313 static void ip22zilog_status_handle(struct uart_ip22zilog_port *up, in ip22zilog_status_handle() argument
325 if (up->curregs[R15] & BRKIE) { in ip22zilog_status_handle()
326 if ((status & BRK_ABRT) && !(up->prev_status & BRK_ABRT)) { in ip22zilog_status_handle()
327 if (uart_handle_break(&up->port)) in ip22zilog_status_handle()
328 up->tty_break = Rx_SYS; in ip22zilog_status_handle()
330 up->tty_break = Rx_BRK; in ip22zilog_status_handle()
334 if (ZS_WANTS_MODEM_STATUS(up)) { in ip22zilog_status_handle()
336 up->port.icount.dsr++; in ip22zilog_status_handle()
342 if ((status ^ up->prev_status) ^ DCD) in ip22zilog_status_handle()
343 uart_handle_dcd_change(&up->port, in ip22zilog_status_handle()
345 if ((status ^ up->prev_status) ^ CTS) in ip22zilog_status_handle()
346 uart_handle_cts_change(&up->port, in ip22zilog_status_handle()
349 wake_up_interruptible(&up->port.state->port.delta_msr_wait); in ip22zilog_status_handle()
352 up->prev_status = status; in ip22zilog_status_handle()
355 static void ip22zilog_transmit_chars(struct uart_ip22zilog_port *up, in ip22zilog_transmit_chars() argument
361 if (ZS_IS_CONS(up)) { in ip22zilog_transmit_chars()
377 up->flags &= ~IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
379 if (ZS_REGS_HELD(up)) { in ip22zilog_transmit_chars()
380 __load_zsregs(channel, up->curregs); in ip22zilog_transmit_chars()
381 up->flags &= ~IP22ZILOG_FLAG_REGS_HELD; in ip22zilog_transmit_chars()
384 if (ZS_TX_STOPPED(up)) { in ip22zilog_transmit_chars()
385 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_transmit_chars()
389 if (up->port.x_char) { in ip22zilog_transmit_chars()
390 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
391 writeb(up->port.x_char, &channel->data); in ip22zilog_transmit_chars()
395 up->port.icount.tx++; in ip22zilog_transmit_chars()
396 up->port.x_char = 0; in ip22zilog_transmit_chars()
400 if (up->port.state == NULL) in ip22zilog_transmit_chars()
402 tport = &up->port.state->port; in ip22zilog_transmit_chars()
403 if (uart_tx_stopped(&up->port)) in ip22zilog_transmit_chars()
405 if (!uart_fifo_get(&up->port, &c)) in ip22zilog_transmit_chars()
408 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
414 uart_write_wakeup(&up->port); in ip22zilog_transmit_chars()
426 struct uart_ip22zilog_port *up = dev_id; in ip22zilog_interrupt() local
428 while (up) { in ip22zilog_interrupt()
430 = ZILOG_CHANNEL_FROM_PORT(&up->port); in ip22zilog_interrupt()
434 uart_port_lock(&up->port); in ip22zilog_interrupt()
444 push = ip22zilog_receive_chars(up, channel); in ip22zilog_interrupt()
446 ip22zilog_status_handle(up, channel); in ip22zilog_interrupt()
448 ip22zilog_transmit_chars(up, channel); in ip22zilog_interrupt()
450 uart_port_unlock(&up->port); in ip22zilog_interrupt()
453 tty_flip_buffer_push(&up->port.state->port); in ip22zilog_interrupt()
456 up = up->next; in ip22zilog_interrupt()
457 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in ip22zilog_interrupt()
460 uart_port_lock(&up->port); in ip22zilog_interrupt()
467 push = ip22zilog_receive_chars(up, channel); in ip22zilog_interrupt()
469 ip22zilog_status_handle(up, channel); in ip22zilog_interrupt()
471 ip22zilog_transmit_chars(up, channel); in ip22zilog_interrupt()
473 uart_port_unlock(&up->port); in ip22zilog_interrupt()
476 tty_flip_buffer_push(&up->port.state->port); in ip22zilog_interrupt()
478 up = up->next; in ip22zilog_interrupt()
542 struct uart_ip22zilog_port *up = in ip22zilog_set_mctrl() local
559 up->curregs[R5] |= set_bits; in ip22zilog_set_mctrl()
560 up->curregs[R5] &= ~clear_bits; in ip22zilog_set_mctrl()
561 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_set_mctrl()
567 struct uart_ip22zilog_port *up = in ip22zilog_stop_tx() local
570 up->flags |= IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_stop_tx()
576 struct uart_ip22zilog_port *up = in ip22zilog_start_tx() local
581 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_start_tx()
582 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_start_tx()
612 uart_write_wakeup(&up->port); in ip22zilog_start_tx()
619 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_stop_rx() local
622 if (ZS_IS_CONS(up)) in ip22zilog_stop_rx()
628 up->curregs[R1] &= ~RxINT_MASK; in ip22zilog_stop_rx()
629 ip22zilog_maybe_update_regs(up, channel); in ip22zilog_stop_rx()
635 struct uart_ip22zilog_port *up = in ip22zilog_enable_ms() local
640 new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); in ip22zilog_enable_ms()
641 if (new_reg != up->curregs[R15]) { in ip22zilog_enable_ms()
642 up->curregs[R15] = new_reg; in ip22zilog_enable_ms()
645 write_zsreg(channel, R15, up->curregs[R15]); in ip22zilog_enable_ms()
652 struct uart_ip22zilog_port *up = in ip22zilog_break_ctl() local
667 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; in ip22zilog_break_ctl()
668 if (new_reg != up->curregs[R5]) { in ip22zilog_break_ctl()
669 up->curregs[R5] = new_reg; in ip22zilog_break_ctl()
672 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_break_ctl()
678 static void __ip22zilog_reset(struct uart_ip22zilog_port *up) in __ip22zilog_reset() argument
683 if (up->flags & IP22ZILOG_FLAG_RESET_DONE) in __ip22zilog_reset()
687 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_reset()
695 if (!ZS_IS_CHANNEL_A(up)) { in __ip22zilog_reset()
696 up++; in __ip22zilog_reset()
697 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_reset()
703 up->flags |= IP22ZILOG_FLAG_RESET_DONE; in __ip22zilog_reset()
704 up->next->flags |= IP22ZILOG_FLAG_RESET_DONE; in __ip22zilog_reset()
707 static void __ip22zilog_startup(struct uart_ip22zilog_port *up) in __ip22zilog_startup() argument
711 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_startup()
713 __ip22zilog_reset(up); in __ip22zilog_startup()
715 __load_zsregs(channel, up->curregs); in __ip22zilog_startup()
717 write_zsreg(channel, R9, up->curregs[R9]); in __ip22zilog_startup()
718 up->prev_status = readb(&channel->control); in __ip22zilog_startup()
721 up->curregs[R3] |= RxENAB; in __ip22zilog_startup()
722 up->curregs[R5] |= TxENAB; in __ip22zilog_startup()
724 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __ip22zilog_startup()
725 ip22zilog_maybe_update_regs(up, channel); in __ip22zilog_startup()
730 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_startup() local
733 if (ZS_IS_CONS(up)) in ip22zilog_startup()
737 __ip22zilog_startup(up); in ip22zilog_startup()
769 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_shutdown() local
773 if (ZS_IS_CONS(up)) in ip22zilog_shutdown()
781 up->curregs[R3] &= ~RxENAB; in ip22zilog_shutdown()
782 up->curregs[R5] &= ~TxENAB; in ip22zilog_shutdown()
785 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in ip22zilog_shutdown()
786 up->curregs[R5] &= ~SND_BRK; in ip22zilog_shutdown()
787 ip22zilog_maybe_update_regs(up, channel); in ip22zilog_shutdown()
796 ip22zilog_convert_to_zs(struct uart_ip22zilog_port *up, unsigned int cflag, in ip22zilog_convert_to_zs() argument
800 up->curregs[R10] = NRZ; in ip22zilog_convert_to_zs()
801 up->curregs[R11] = TCBR | RCBR; in ip22zilog_convert_to_zs()
804 up->curregs[R4] &= ~XCLK_MASK; in ip22zilog_convert_to_zs()
805 up->curregs[R4] |= X16CLK; in ip22zilog_convert_to_zs()
806 up->curregs[R12] = brg & 0xff; in ip22zilog_convert_to_zs()
807 up->curregs[R13] = (brg >> 8) & 0xff; in ip22zilog_convert_to_zs()
808 up->curregs[R14] = BRENAB; in ip22zilog_convert_to_zs()
811 up->curregs[3] &= ~RxN_MASK; in ip22zilog_convert_to_zs()
812 up->curregs[5] &= ~TxN_MASK; in ip22zilog_convert_to_zs()
815 up->curregs[3] |= Rx5; in ip22zilog_convert_to_zs()
816 up->curregs[5] |= Tx5; in ip22zilog_convert_to_zs()
817 up->parity_mask = 0x1f; in ip22zilog_convert_to_zs()
820 up->curregs[3] |= Rx6; in ip22zilog_convert_to_zs()
821 up->curregs[5] |= Tx6; in ip22zilog_convert_to_zs()
822 up->parity_mask = 0x3f; in ip22zilog_convert_to_zs()
825 up->curregs[3] |= Rx7; in ip22zilog_convert_to_zs()
826 up->curregs[5] |= Tx7; in ip22zilog_convert_to_zs()
827 up->parity_mask = 0x7f; in ip22zilog_convert_to_zs()
831 up->curregs[3] |= Rx8; in ip22zilog_convert_to_zs()
832 up->curregs[5] |= Tx8; in ip22zilog_convert_to_zs()
833 up->parity_mask = 0xff; in ip22zilog_convert_to_zs()
836 up->curregs[4] &= ~0x0c; in ip22zilog_convert_to_zs()
838 up->curregs[4] |= SB2; in ip22zilog_convert_to_zs()
840 up->curregs[4] |= SB1; in ip22zilog_convert_to_zs()
842 up->curregs[4] |= PAR_ENAB; in ip22zilog_convert_to_zs()
844 up->curregs[4] &= ~PAR_ENAB; in ip22zilog_convert_to_zs()
846 up->curregs[4] |= PAR_EVEN; in ip22zilog_convert_to_zs()
848 up->curregs[4] &= ~PAR_EVEN; in ip22zilog_convert_to_zs()
850 up->port.read_status_mask = Rx_OVR; in ip22zilog_convert_to_zs()
852 up->port.read_status_mask |= CRC_ERR | PAR_ERR; in ip22zilog_convert_to_zs()
854 up->port.read_status_mask |= BRK_ABRT; in ip22zilog_convert_to_zs()
856 up->port.ignore_status_mask = 0; in ip22zilog_convert_to_zs()
858 up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; in ip22zilog_convert_to_zs()
860 up->port.ignore_status_mask |= BRK_ABRT; in ip22zilog_convert_to_zs()
862 up->port.ignore_status_mask |= Rx_OVR; in ip22zilog_convert_to_zs()
866 up->port.ignore_status_mask = 0xff; in ip22zilog_convert_to_zs()
874 struct uart_ip22zilog_port *up = in ip22zilog_set_termios() local
881 uart_port_lock_irqsave(&up->port, &flags); in ip22zilog_set_termios()
885 ip22zilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); in ip22zilog_set_termios()
887 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in ip22zilog_set_termios()
888 up->flags |= IP22ZILOG_FLAG_MODEM_STATUS; in ip22zilog_set_termios()
890 up->flags &= ~IP22ZILOG_FLAG_MODEM_STATUS; in ip22zilog_set_termios()
892 ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); in ip22zilog_set_termios()
895 uart_port_unlock_irqrestore(&up->port, flags); in ip22zilog_set_termios()
1014 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; in ip22zilog_console_write() local
1017 uart_port_lock_irqsave(&up->port, &flags); in ip22zilog_console_write()
1018 uart_console_write(&up->port, s, count, ip22zilog_put_char); in ip22zilog_console_write()
1020 uart_port_unlock_irqrestore(&up->port, flags); in ip22zilog_console_write()
1025 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; in ip22zilog_console_setup() local
1031 up->flags |= IP22ZILOG_FLAG_IS_CONS; in ip22zilog_console_setup()
1035 uart_port_lock_irqsave(&up->port, &flags); in ip22zilog_console_setup()
1037 up->curregs[R15] |= BRKIE; in ip22zilog_console_setup()
1039 __ip22zilog_startup(up); in ip22zilog_console_setup()
1041 uart_port_unlock_irqrestore(&up->port, flags); in ip22zilog_console_setup()
1045 return uart_set_options(&up->port, con, baud, parity, bits, flow); in ip22zilog_console_setup()
1076 struct uart_ip22zilog_port *up; in ip22zilog_prepare() local
1087 up = &ip22zilog_port_table[0]; in ip22zilog_prepare()
1089 up[channel].next = &up[channel - 1]; in ip22zilog_prepare()
1090 up[channel].next = NULL; in ip22zilog_prepare()
1096 up[(chip * 2) + 0].port.membase = (char *) &rp->channelB; in ip22zilog_prepare()
1097 up[(chip * 2) + 1].port.membase = (char *) &rp->channelA; in ip22zilog_prepare()
1100 up[(chip * 2) + 0].port.mapbase = in ip22zilog_prepare()
1102 up[(chip * 2) + 1].port.mapbase = in ip22zilog_prepare()
1107 up[(chip * 2) + 0].port.iotype = UPIO_MEM; in ip22zilog_prepare()
1108 up[(chip * 2) + 0].port.irq = zilog_irq; in ip22zilog_prepare()
1109 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()
1110 up[(chip * 2) + 0].port.fifosize = 1; in ip22zilog_prepare()
1111 up[(chip * 2) + 0].port.has_sysrq = sysrq_on; in ip22zilog_prepare()
1112 up[(chip * 2) + 0].port.ops = &ip22zilog_pops; in ip22zilog_prepare()
1113 up[(chip * 2) + 0].port.type = PORT_IP22ZILOG; in ip22zilog_prepare()
1114 up[(chip * 2) + 0].port.flags = 0; in ip22zilog_prepare()
1115 up[(chip * 2) + 0].port.line = (chip * 2) + 0; in ip22zilog_prepare()
1116 up[(chip * 2) + 0].flags = 0; in ip22zilog_prepare()
1119 up[(chip * 2) + 1].port.iotype = UPIO_MEM; in ip22zilog_prepare()
1120 up[(chip * 2) + 1].port.irq = zilog_irq; in ip22zilog_prepare()
1121 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()
1122 up[(chip * 2) + 1].port.fifosize = 1; in ip22zilog_prepare()
1123 up[(chip * 2) + 1].port.has_sysrq = sysrq_on; in ip22zilog_prepare()
1124 up[(chip * 2) + 1].port.ops = &ip22zilog_pops; in ip22zilog_prepare()
1125 up[(chip * 2) + 1].port.type = PORT_IP22ZILOG; in ip22zilog_prepare()
1126 up[(chip * 2) + 1].port.line = (chip * 2) + 1; in ip22zilog_prepare()
1127 up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A; in ip22zilog_prepare()
1131 struct uart_ip22zilog_port *up = &ip22zilog_port_table[channel]; in ip22zilog_prepare() local
1135 up->parity_mask = 0xff; in ip22zilog_prepare()
1136 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in ip22zilog_prepare()
1137 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in ip22zilog_prepare()
1138 up->curregs[R3] = RxENAB | Rx8; in ip22zilog_prepare()
1139 up->curregs[R5] = TxENAB | Tx8; in ip22zilog_prepare()
1140 up->curregs[R9] = NV | MIE; in ip22zilog_prepare()
1141 up->curregs[R10] = NRZ; in ip22zilog_prepare()
1142 up->curregs[R11] = TCBR | RCBR; in ip22zilog_prepare()
1144 up->curregs[R12] = (brg & 0xff); in ip22zilog_prepare()
1145 up->curregs[R13] = (brg >> 8) & 0xff; in ip22zilog_prepare()
1146 up->curregs[R14] = BRENAB; in ip22zilog_prepare()
1168 struct uart_ip22zilog_port *up = &ip22zilog_port_table[i]; in ip22zilog_ports_init() local
1170 uart_add_one_port(&ip22zilog_reg, &up->port); in ip22zilog_ports_init()
1189 struct uart_ip22zilog_port *up; in ip22zilog_exit() local
1192 up = &ip22zilog_port_table[i]; in ip22zilog_exit()
1194 uart_remove_one_port(&ip22zilog_reg, &up->port); in ip22zilog_exit()
1198 up = &ip22zilog_port_table[0]; in ip22zilog_exit()
1200 if (up[(i * 2) + 0].port.mapbase) { in ip22zilog_exit()
1201 iounmap((void*)up[(i * 2) + 0].port.mapbase); in ip22zilog_exit()
1202 up[(i * 2) + 0].port.mapbase = 0; in ip22zilog_exit()
1204 if (up[(i * 2) + 1].port.mapbase) { in ip22zilog_exit()
1205 iounmap((void*)up[(i * 2) + 1].port.mapbase); in ip22zilog_exit()
1206 up[(i * 2) + 1].port.mapbase = 0; in ip22zilog_exit()