47 #define USR2  0x98 /* Status Register 2 */  macro
427 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_stop_tx()
848 		imx_uart_writel(sport, USR2_WAKE, USR2);  in imx_uart_check_flood()
863 	usr2 = imx_uart_readl(sport, USR2);  in __imx_uart_rxint()
938 	unsigned usr2 = imx_uart_readl(sport, USR2);  in imx_uart_get_hwmctrl()
948 		if (!(imx_uart_readl(sport, USR2) & USR2_RIIN))  in imx_uart_get_hwmctrl()
990 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_int()
1053 		imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_int()
1070 	ret = (imx_uart_readl(sport, USR2) & USR2_TXDC) ?  TIOCSER_TEMT : 0;  in imx_uart_tx_empty()
1226 		imx_uart_check_flood(sport, imx_uart_readl(sport, USR2));  in imx_uart_dma_rx_callback()
1301 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_clear_rx_errors()
1305 		imx_uart_writel(sport, USR2_BRCD, USR2);  in imx_uart_clear_rx_errors()
1322 		imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_clear_rx_errors()
1501 	imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_startup()
1977 	if (!(imx_uart_readl(sport, USR2) & USR2_RDR))  in imx_uart_poll_get_char()
1998 		status = imx_uart_readl(sport, USR2);  in imx_uart_poll_put_char()
2115 				 0, USEC_PER_SEC, false, sport, USR2);  in imx_uart_console_write()