45 #define UFCR  0x90 /* FIFO Control Register */  macro
1340 	val = imx_uart_readl(sport, UFCR) & (UFCR_RFDIV | UFCR_DCEDTE);  in imx_uart_setup_ufcr()
1342 	imx_uart_writel(sport, val, UFCR);  in imx_uart_setup_ufcr()
1850 	ufcr = imx_uart_readl(sport, UFCR);  in imx_uart_set_termios()
1852 	imx_uart_writel(sport, ufcr, UFCR);  in imx_uart_set_termios()
2029 		ufcr = imx_uart_readl(sport, UFCR);  in imx_uart_rs485_config()
2155 		ucfr_rfdiv = (imx_uart_readl(sport, UFCR) & UFCR_RFDIV) >> 7;  in imx_uart_console_get_options()
2469 		u32 ufcr = imx_uart_readl(sport, UFCR);  in imx_uart_probe()
2471 			imx_uart_writel(sport, ufcr | UFCR_DCEDTE, UFCR);  in imx_uart_probe()
2484 		u32 ufcr = imx_uart_readl(sport, UFCR);  in imx_uart_probe()
2486 			imx_uart_writel(sport, ufcr & ~UFCR_DCEDTE, UFCR);  in imx_uart_probe()
2564 	imx_uart_writel(sport, sport->saved_reg[4], UFCR);  in imx_uart_restore_context()
2588 	sport->saved_reg[4] = imx_uart_readl(sport, UFCR);  in imx_uart_save_context()