tty/serial/atmel_serial.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
27 #define	ATMEL_US_STTTO		BIT(11)	/* Start Time-out */
31 #define	ATMEL_US_RETTO		BIT(15)	/* Rearm Time-out */
42 #define ATMEL_US_MR		0x04	/* Mode Register */
43 #define	ATMEL_US_USMODE		GENMASK(3, 0)	/* Mode of the USART */
62 #define	ATMEL_US_SYNC		BIT(8)		/* Synchronous Mode Select */
75 #define	ATMEL_US_CHMODE		GENMASK(15, 14)	/* Channel Mode */
81 #define	ATMEL_US_MODE9		BIT(17)	/* 9-bit Character Length */
83 #define	ATMEL_US_OVER		BIT(19)	/* Oversampling Mode */
99 #define	ATMEL_US_TIMEOUT	BIT(8)	/* Receiver Time-out */
126 #define ATMEL_US_RTOR		0x24	/* Receiver Time-out Register for USART */
127 #define ATMEL_UA_RTOR		0x28	/* Receiver Time-out Register for UART */
128 #define	ATMEL_US_TO		GENMASK(15, 0)	/* Time-out Value */
138 #define ATMEL_US_FMR		0xa0	/* FIFO Mode Register */
139 #define	ATMEL_US_TXRDYM(data)	FIELD_PREP(GENMASK(1, 0), (data))	/* TX Ready Mode */
140 #define	ATMEL_US_RXRDYM(data)	FIELD_PREP(GENMASK(5, 4), (data))	/* RX Ready Mode */
157 #define	ATMEL_US_TXFEF		BIT(0)	/* Transmit FIFO Empty Flag */
158 #define	ATMEL_US_TXFFF		BIT(1)	/* Transmit FIFO Full Flag */
159 #define	ATMEL_US_TXFTHF		BIT(2)	/* Transmit FIFO Threshold Flag */
160 #define	ATMEL_US_RXFEF		BIT(3)	/* Receive FIFO Empty Flag */
161 #define	ATMEL_US_RXFFF		BIT(4)	/* Receive FIFO Full Flag */
162 #define	ATMEL_US_RXFTHF		BIT(5)	/* Receive FIFO Threshold Flag */
163 #define	ATMEL_US_TXFPTEF	BIT(6)	/* Transmit FIFO Pointer Error Flag */
164 #define	ATMEL_US_RXFPTEF	BIT(7)	/* Receive FIFO Pointer Error Flag */
166 #define	ATMEL_US_RXFTHF2	BIT(9)	/* Receive FIFO Threshold Flag 2 */