Lines Matching refs:pl011_write
294 static void pl011_write(unsigned int val, const struct uart_amba_port *uap, in pl011_write() function
550 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
651 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
686 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
688 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
698 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
712 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_stop()
738 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_start()
744 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
755 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
766 pl011_write(uap->port.x_char, uap, REG_DR); in pl011_dma_tx_start()
772 pl011_write(dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
798 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_flush_buffer()
838 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_trigger_dma()
842 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_trigger_dma()
898 pl011_write(UART011_OEIS | UART011_BEIS | UART011_PEIS | in pl011_dma_rx_chars()
945 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_irq()
965 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_irq()
1013 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_callback()
1029 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_stop()
1072 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_poll()
1133 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_startup()
1141 pl011_write(ST_UART011_DMAWM_RX_16 | ST_UART011_DMAWM_TX_16, in pl011_dma_startup()
1169 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_shutdown()
1297 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_stop()
1308 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_tx()
1322 pl011_write(uap->im, uap, REG_IMSC); in pl011_start_tx_pio()
1344 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_start()
1372 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_rx()
1392 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_ms()
1412 pl011_write(uap->im, uap, REG_IMSC); in pl011_rx_chars()
1435 pl011_write(c, uap, REG_DR); in pl011_tx_char()
1518 pl011_write(0x00, uap, REG_ICR); in check_apply_cts_event_workaround()
1541 pl011_write(status & ~(UART011_TXIS | UART011_RTIS | UART011_RXIS), in pl011_int()
1629 pl011_write(cr, uap, REG_CR); in pl011_set_mctrl()
1645 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_break_ctl()
1656 pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR); in pl011_quiesce_irqs()
1670 pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap, in pl011_quiesce_irqs()
1701 pl011_write(ch, uap, REG_DR); in pl011_put_poll_char()
1725 pl011_write(UART011_OEIS | UART011_BEIS | UART011_PEIS | in pl011_hwinit()
1734 pl011_write(UART011_RTIM | UART011_RXIM, uap, REG_IMSC); in pl011_hwinit()
1754 pl011_write(lcr_h, uap, REG_LCRH_RX); in pl011_write_lcr_h()
1762 pl011_write(0xff, uap, REG_MIS); in pl011_write_lcr_h()
1763 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_write_lcr_h()
1769 pl011_write(uap->im, uap, REG_IMSC); in pl011_allocate_irq()
1787 pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR); in pl011_enable_interrupts()
1805 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_interrupts()
1820 pl011_write(uap->im, uap, REG_IMSC); in pl011_unthrottle_rx()
1840 pl011_write(uap->vendor->ifls, uap, REG_IFLS); in pl011_startup()
1851 pl011_write(cr, uap, REG_CR); in pl011_startup()
1900 pl011_write(val, uap, lcrh); in pl011_shutdown_channel()
1917 pl011_write(cr, uap, REG_CR); in pl011_disable_uart()
1934 pl011_write(uap->im, uap, REG_IMSC); in pl011_disable_interrupts()
1935 pl011_write(0xffff, uap, REG_ICR); in pl011_disable_interrupts()
2137 pl011_write(quot & 0x3f, uap, REG_FBRD); in pl011_set_termios()
2138 pl011_write(quot >> 6, uap, REG_IBRD); in pl011_set_termios()
2154 pl011_write(old_cr, uap, REG_CR); in pl011_set_termios()
2228 pl011_write(cr, uap, REG_CR); in pl011_rs485_config()
2300 pl011_write(ch, uap, REG_DR); in pl011_console_putchar()
2325 pl011_write(new_cr, uap, REG_CR); in pl011_console_write()
2339 pl011_write(old_cr, uap, REG_CR); in pl011_console_write()
2729 pl011_write(0, uap, REG_IMSC); in pl011_register_port()
2730 pl011_write(0xffff, uap, REG_ICR); in pl011_register_port()