285 static unsigned int pl011_read(const struct uart_amba_port *uap,  in pl011_read()  function
318 		status = pl011_read(uap, REG_FR);  in pl011_fifo_to_tty()
323 		ch = pl011_read(uap, REG_DR) | UART_DUMMY_DR_RX;  in pl011_fifo_to_tty()
757 	if (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) {  in pl011_dma_tx_start()
1164 	while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy)  in pl011_dma_shutdown()
1287 	cr = pl011_read(uap, REG_CR);  in pl011_rs485_tx_stop()
1332 	cr = pl011_read(uap, REG_CR);  in pl011_rs485_tx_start()
1432 	    pl011_read(uap, REG_FR) & UART01x_FR_TXFF)  in pl011_tx_char()
1491 	status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY;  in pl011_modem_status()
1525 	pl011_read(uap, REG_ICR);  in check_apply_cts_event_workaround()
1526 	pl011_read(uap, REG_ICR);  in check_apply_cts_event_workaround()
1536 	status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1559 			status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1575 	unsigned int status = pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr;  in pl011_tx_empty()
1592 	unsigned int status = pl011_read(uap, REG_FR);  in pl011_get_mctrl()
1616 	cr = pl011_read(uap, REG_CR);  in pl011_set_mctrl()
1640 	lcr_h = pl011_read(uap, REG_LCRH_TX);  in pl011_break_ctl()
1656 	pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR);  in pl011_quiesce_irqs()
1670 	pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap,  in pl011_quiesce_irqs()
1686 	status = pl011_read(uap, REG_FR);  in pl011_get_poll_char()
1690 	return pl011_read(uap, REG_DR);  in pl011_get_poll_char()
1698 	while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF)  in pl011_put_poll_char()
1733 	uap->im = pl011_read(uap, REG_IMSC);  in pl011_hwinit()
1796 		if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE)  in pl011_enable_interrupts()
1799 		pl011_read(uap, REG_DR);  in pl011_enable_interrupts()
1844 	cr = pl011_read(uap, REG_CR);  in pl011_startup()
1858 	uap->old_status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY;  in pl011_startup()
1898 	val = pl011_read(uap, lcrh);  in pl011_shutdown_channel()
1914 	cr = pl011_read(uap, REG_CR);  in pl011_disable_uart()
2104 	old_cr = pl011_read(uap, REG_CR);  in pl011_set_termios()
2225 		u32 cr = pl011_read(uap, REG_CR);  in pl011_rs485_config()
2298 	while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF)  in pl011_console_putchar()
2322 		old_cr = pl011_read(uap, REG_CR);  in pl011_console_write()
2335 	while ((pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr)  in pl011_console_write()
2352 	if (!(pl011_read(uap, REG_CR) & UART01x_CR_UARTEN))  in pl011_console_get_options()
2355 	lcr_h = pl011_read(uap, REG_LCRH_TX);  in pl011_console_get_options()
2370 	ibrd = pl011_read(uap, REG_IBRD);  in pl011_console_get_options()
2371 	fbrd = pl011_read(uap, REG_FBRD);  in pl011_console_get_options()
2376 	    (pl011_read(uap, REG_CR) & ST_UART011_CR_OVSFACT))  in pl011_console_get_options()