Lines Matching +full:up +full:- +full:to
1 // SPDX-License-Identifier: GPL-2.0+
3 * Base port operations for 8250/16550-type serial ports
244 * tx_loadsz is set to 63-bytes instead of 64-bytes to implement
245 * workaround of errata A-008006 which states that tx_loadsz should
257 .name = "Palmchip BK-3103",
325 static u32 default_serial_dl_read(struct uart_8250_port *up) in default_serial_dl_read() argument
327 /* Assign these in pieces to truncate any bits above 7. */ in default_serial_dl_read()
328 unsigned char dll = serial_in(up, UART_DLL); in default_serial_dl_read()
329 unsigned char dlm = serial_in(up, UART_DLM); in default_serial_dl_read()
335 static void default_serial_dl_write(struct uart_8250_port *up, u32 value) in default_serial_dl_write() argument
337 serial_out(up, UART_DLL, value & 0xff); in default_serial_dl_write()
338 serial_out(up, UART_DLM, value >> 8 & 0xff); in default_serial_dl_write()
343 offset = offset << p->regshift; in hub6_serial_in()
344 outb(p->hub6 - 1 + offset, p->iobase); in hub6_serial_in()
345 return inb(p->iobase + 1); in hub6_serial_in()
350 offset = offset << p->regshift; in hub6_serial_out()
351 outb(p->hub6 - 1 + offset, p->iobase); in hub6_serial_out()
352 outb(value, p->iobase + 1); in hub6_serial_out()
357 offset = offset << p->regshift; in mem_serial_in()
358 return readb(p->membase + offset); in mem_serial_in()
363 offset = offset << p->regshift; in mem_serial_out()
364 writeb(value, p->membase + offset); in mem_serial_out()
369 offset = offset << p->regshift; in mem16_serial_out()
370 writew(value, p->membase + offset); in mem16_serial_out()
375 offset = offset << p->regshift; in mem16_serial_in()
376 return readw(p->membase + offset); in mem16_serial_in()
381 offset = offset << p->regshift; in mem32_serial_out()
382 writel(value, p->membase + offset); in mem32_serial_out()
387 offset = offset << p->regshift; in mem32_serial_in()
388 return readl(p->membase + offset); in mem32_serial_in()
393 offset = offset << p->regshift; in mem32be_serial_out()
394 iowrite32be(value, p->membase + offset); in mem32be_serial_out()
399 offset = offset << p->regshift; in mem32be_serial_in()
400 return ioread32be(p->membase + offset); in mem32be_serial_in()
405 offset = offset << p->regshift; in io_serial_in()
406 return inb(p->iobase + offset); in io_serial_in()
411 offset = offset << p->regshift; in io_serial_out()
412 outb(value, p->iobase + offset); in io_serial_out()
419 struct uart_8250_port *up = up_to_u8250p(p); in set_io_from_upio() local
421 up->dl_read = default_serial_dl_read; in set_io_from_upio()
422 up->dl_write = default_serial_dl_write; in set_io_from_upio()
424 switch (p->iotype) { in set_io_from_upio()
426 p->serial_in = hub6_serial_in; in set_io_from_upio()
427 p->serial_out = hub6_serial_out; in set_io_from_upio()
431 p->serial_in = mem_serial_in; in set_io_from_upio()
432 p->serial_out = mem_serial_out; in set_io_from_upio()
436 p->serial_in = mem16_serial_in; in set_io_from_upio()
437 p->serial_out = mem16_serial_out; in set_io_from_upio()
441 p->serial_in = mem32_serial_in; in set_io_from_upio()
442 p->serial_out = mem32_serial_out; in set_io_from_upio()
446 p->serial_in = mem32be_serial_in; in set_io_from_upio()
447 p->serial_out = mem32be_serial_out; in set_io_from_upio()
451 p->serial_in = io_serial_in; in set_io_from_upio()
452 p->serial_out = io_serial_out; in set_io_from_upio()
456 up->cur_iotype = p->iotype; in set_io_from_upio()
457 p->handle_irq = serial8250_default_handle_irq; in set_io_from_upio()
463 switch (p->iotype) { in serial_port_out_sync()
469 p->serial_out(p, offset, value); in serial_port_out_sync()
470 p->serial_in(p, UART_LCR); /* safe, no side-effects */ in serial_port_out_sync()
473 p->serial_out(p, offset, value); in serial_port_out_sync()
482 if (p->capabilities & UART_CAP_FIFO) { in serial8250_clear_fifos()
496 serial_out(p, UART_FCR, p->fcr); in serial8250_clear_and_reinit_fifos()
502 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_get()
504 pm_runtime_get_sync(p->port.dev); in serial8250_rpm_get()
510 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_put()
512 pm_runtime_mark_last_busy(p->port.dev); in serial8250_rpm_put()
513 pm_runtime_put_autosuspend(p->port.dev); in serial8250_rpm_put()
518 * serial8250_em485_init() - put uart_8250_port into rs485 emulating
521 * The function is used to start rs485 software emulating on the
523 * transmission. The function is idempotent, so it is safe to call it
530 * The function is supposed to be called from .rs485_config callback
531 * or from any other callback protected with p->port.lock spinlock.
535 * Return 0 - success, -errno - otherwise
539 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_em485_init()
540 lockdep_assert_held_once(&p->port.lock); in serial8250_em485_init()
542 if (p->em485) in serial8250_em485_init()
545 p->em485 = kmalloc(sizeof(struct uart_8250_em485), GFP_ATOMIC); in serial8250_em485_init()
546 if (!p->em485) in serial8250_em485_init()
547 return -ENOMEM; in serial8250_em485_init()
549 hrtimer_init(&p->em485->stop_tx_timer, CLOCK_MONOTONIC, in serial8250_em485_init()
551 hrtimer_init(&p->em485->start_tx_timer, CLOCK_MONOTONIC, in serial8250_em485_init()
553 p->em485->stop_tx_timer.function = &serial8250_em485_handle_stop_tx; in serial8250_em485_init()
554 p->em485->start_tx_timer.function = &serial8250_em485_handle_start_tx; in serial8250_em485_init()
555 p->em485->port = p; in serial8250_em485_init()
556 p->em485->active_timer = NULL; in serial8250_em485_init()
557 p->em485->tx_stopped = true; in serial8250_em485_init()
560 if (p->em485->tx_stopped) in serial8250_em485_init()
561 p->rs485_stop_tx(p); in serial8250_em485_init()
567 * serial8250_em485_destroy() - put uart_8250_port into normal state
570 * The function is used to stop rs485 software emulating on the
571 * &struct uart_8250_port* @p. The function is idempotent, so it is safe to
574 * The function is supposed to be called from .rs485_config callback
575 * or from any other callback protected with p->port.lock spinlock.
581 if (!p->em485) in serial8250_em485_destroy()
584 hrtimer_cancel(&p->em485->start_tx_timer); in serial8250_em485_destroy()
585 hrtimer_cancel(&p->em485->stop_tx_timer); in serial8250_em485_destroy()
587 kfree(p->em485); in serial8250_em485_destroy()
588 p->em485 = NULL; in serial8250_em485_destroy()
601 * serial8250_em485_config() - generic ->rs485_config() callback
606 * Generic callback usable by 8250 uart drivers to activate rs485 settings
613 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_em485_config() local
619 if (rs485->flags & SER_RS485_ENABLED) in serial8250_em485_config()
620 return serial8250_em485_init(up); in serial8250_em485_config()
622 serial8250_em485_destroy(up); in serial8250_em485_config()
636 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_get_tx()
639 rpm_active = xchg(&p->rpm_tx_active, 1); in serial8250_rpm_get_tx()
642 pm_runtime_get_sync(p->port.dev); in serial8250_rpm_get_tx()
650 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_put_tx()
653 rpm_active = xchg(&p->rpm_tx_active, 0); in serial8250_rpm_put_tx()
656 pm_runtime_mark_last_busy(p->port.dev); in serial8250_rpm_put_tx()
657 pm_runtime_put_autosuspend(p->port.dev); in serial8250_rpm_put_tx()
663 * capability" bit enabled. Note that on XR16C850s, we need to
664 * reset LCR to write to IER.
672 if (p->capabilities & UART_CAP_SLEEP) { in serial8250_set_sleep()
674 uart_port_lock_irq(&p->port); in serial8250_set_sleep()
675 if (p->capabilities & UART_CAP_EFR) { in serial8250_set_sleep()
683 if (p->capabilities & UART_CAP_EFR) { in serial8250_set_sleep()
688 uart_port_unlock_irq(&p->port); in serial8250_set_sleep()
694 static void serial8250_clear_IER(struct uart_8250_port *up) in serial8250_clear_IER() argument
696 if (up->capabilities & UART_CAP_UUE) in serial8250_clear_IER()
697 serial_out(up, UART_IER, UART_IER_UUE); in serial8250_clear_IER()
699 serial_out(up, UART_IER, 0); in serial8250_clear_IER()
704 * Attempts to turn on the RSA FIFO. Returns zero on failure.
707 static int __enable_rsa(struct uart_8250_port *up) in __enable_rsa() argument
712 mode = serial_in(up, UART_RSA_MSR); in __enable_rsa()
716 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO); in __enable_rsa()
717 mode = serial_in(up, UART_RSA_MSR); in __enable_rsa()
722 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16; in __enable_rsa()
727 static void enable_rsa(struct uart_8250_port *up) in enable_rsa() argument
729 if (up->port.type == PORT_RSA) { in enable_rsa()
730 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) { in enable_rsa()
731 uart_port_lock_irq(&up->port); in enable_rsa()
732 __enable_rsa(up); in enable_rsa()
733 uart_port_unlock_irq(&up->port); in enable_rsa()
735 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) in enable_rsa()
736 serial_out(up, UART_RSA_FRR, 0); in enable_rsa()
741 * Attempts to turn off the RSA FIFO. Returns zero on failure.
743 * the caller is expected to preserve this behaviour by grabbing
746 static void disable_rsa(struct uart_8250_port *up) in disable_rsa() argument
751 if (up->port.type == PORT_RSA && in disable_rsa()
752 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { in disable_rsa()
753 uart_port_lock_irq(&up->port); in disable_rsa()
755 mode = serial_in(up, UART_RSA_MSR); in disable_rsa()
759 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO); in disable_rsa()
760 mode = serial_in(up, UART_RSA_MSR); in disable_rsa()
765 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16; in disable_rsa()
766 uart_port_unlock_irq(&up->port); in disable_rsa()
772 * This is a quickie test to see how big the FIFO is.
775 static int size_fifo(struct uart_8250_port *up) in size_fifo() argument
781 old_lcr = serial_in(up, UART_LCR); in size_fifo()
782 serial_out(up, UART_LCR, 0); in size_fifo()
783 old_fcr = serial_in(up, UART_FCR); in size_fifo()
784 old_mcr = serial8250_in_MCR(up); in size_fifo()
785 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | in size_fifo()
787 serial8250_out_MCR(up, UART_MCR_LOOP); in size_fifo()
788 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in size_fifo()
789 old_dl = serial_dl_read(up); in size_fifo()
790 serial_dl_write(up, 0x0001); in size_fifo()
791 serial_out(up, UART_LCR, UART_LCR_WLEN8); in size_fifo()
793 serial_out(up, UART_TX, count); in size_fifo()
794 mdelay(20);/* FIXME - schedule_timeout */ in size_fifo()
795 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) && in size_fifo()
797 serial_in(up, UART_RX); in size_fifo()
798 serial_out(up, UART_FCR, old_fcr); in size_fifo()
799 serial8250_out_MCR(up, old_mcr); in size_fifo()
800 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in size_fifo()
801 serial_dl_write(up, old_dl); in size_fifo()
802 serial_out(up, UART_LCR, old_lcr); in size_fifo()
808 * Read UART ID using the divisor method - set DLL and DLM to zero
830 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
834 * 16550, and why not? Startech doesn't seem to even acknowledge its
839 static void autoconfig_has_efr(struct uart_8250_port *up) in autoconfig_has_efr() argument
846 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; in autoconfig_has_efr()
849 * First we check to see if it's an Oxford Semiconductor UART. in autoconfig_has_efr()
851 * If we have to do this here because some non-National in autoconfig_has_efr()
852 * Semiconductor clone chips lock up if you try writing to the in autoconfig_has_efr()
865 up->acr = 0; in autoconfig_has_efr()
866 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in autoconfig_has_efr()
867 serial_out(up, UART_EFR, UART_EFR_ECB); in autoconfig_has_efr()
868 serial_out(up, UART_LCR, 0x00); in autoconfig_has_efr()
869 id1 = serial_icr_read(up, UART_ID1); in autoconfig_has_efr()
870 id2 = serial_icr_read(up, UART_ID2); in autoconfig_has_efr()
871 id3 = serial_icr_read(up, UART_ID3); in autoconfig_has_efr()
872 rev = serial_icr_read(up, UART_REV); in autoconfig_has_efr()
878 up->port.type = PORT_16C950; in autoconfig_has_efr()
882 * chip which causes it to seriously miscalculate baud rates in autoconfig_has_efr()
886 up->bugs |= UART_BUG_QUOT; in autoconfig_has_efr()
891 * We check for a XR16C850 by setting DLL and DLM to 0, and then in autoconfig_has_efr()
894 * 0x10 - XR16C850 and the DLL contains the chip revision. in autoconfig_has_efr()
895 * 0x12 - XR16C2850. in autoconfig_has_efr()
896 * 0x14 - XR16C854. in autoconfig_has_efr()
898 id1 = autoconfig_read_divisor_id(up); in autoconfig_has_efr()
903 up->port.type = PORT_16850; in autoconfig_has_efr()
912 * since that's the technique that was sent to me in the in autoconfig_has_efr()
914 * I've had problems doing this in the past. -TYT in autoconfig_has_efr()
916 if (size_fifo(up) == 64) in autoconfig_has_efr()
917 up->port.type = PORT_16654; in autoconfig_has_efr()
919 up->port.type = PORT_16650V2; in autoconfig_has_efr()
924 * this category - the original 8250 and the 16450. The
927 static void autoconfig_8250(struct uart_8250_port *up) in autoconfig_8250() argument
931 up->port.type = PORT_8250; in autoconfig_8250()
933 scratch = serial_in(up, UART_SCR); in autoconfig_8250()
934 serial_out(up, UART_SCR, 0xa5); in autoconfig_8250()
935 status1 = serial_in(up, UART_SCR); in autoconfig_8250()
936 serial_out(up, UART_SCR, 0x5a); in autoconfig_8250()
937 status2 = serial_in(up, UART_SCR); in autoconfig_8250()
938 serial_out(up, UART_SCR, scratch); in autoconfig_8250()
941 up->port.type = PORT_16450; in autoconfig_8250()
944 static int broken_efr(struct uart_8250_port *up) in broken_efr() argument
949 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html in broken_efr()
951 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16) in broken_efr()
961 * EFR should contain zero. Try to read the EFR.
963 static void autoconfig_16550a(struct uart_8250_port *up) in autoconfig_16550a() argument
968 /* Port locked to synchronize UART_IER access against the console. */ in autoconfig_16550a()
969 lockdep_assert_held_once(&up->port.lock); in autoconfig_16550a()
971 up->port.type = PORT_16550A; in autoconfig_16550a()
972 up->capabilities |= UART_CAP_FIFO; in autoconfig_16550a()
975 !(up->port.flags & UPF_FULL_PROBE)) in autoconfig_16550a()
982 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in autoconfig_16550a()
983 if (serial_in(up, UART_EFR) == 0) { in autoconfig_16550a()
984 serial_out(up, UART_EFR, 0xA8); in autoconfig_16550a()
985 if (serial_in(up, UART_EFR) != 0) { in autoconfig_16550a()
987 up->port.type = PORT_16650; in autoconfig_16550a()
988 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; in autoconfig_16550a()
990 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
991 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | in autoconfig_16550a()
993 status1 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750; in autoconfig_16550a()
994 serial_out(up, UART_FCR, 0); in autoconfig_16550a()
995 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
998 up->port.type = PORT_16550A_FSL64; in autoconfig_16550a()
1002 serial_out(up, UART_EFR, 0); in autoconfig_16550a()
1007 * Maybe it requires 0xbf to be written to the LCR. in autoconfig_16550a()
1010 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in autoconfig_16550a()
1011 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) { in autoconfig_16550a()
1013 autoconfig_has_efr(up); in autoconfig_16550a()
1019 * Attempt to switch to bank 2, read the value of the LOOP bit in autoconfig_16550a()
1020 * from EXCR1. Switch back to bank 0, change it in MCR. Then in autoconfig_16550a()
1021 * switch back to bank 2, read it from EXCR1 again and check in autoconfig_16550a()
1022 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2 in autoconfig_16550a()
1024 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1025 status1 = serial8250_in_MCR(up); in autoconfig_16550a()
1026 serial_out(up, UART_LCR, 0xE0); in autoconfig_16550a()
1027 status2 = serial_in(up, 0x02); /* EXCR1 */ in autoconfig_16550a()
1030 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1031 serial8250_out_MCR(up, status1 ^ UART_MCR_LOOP); in autoconfig_16550a()
1032 serial_out(up, UART_LCR, 0xE0); in autoconfig_16550a()
1033 status2 = serial_in(up, 0x02); /* EXCR1 */ in autoconfig_16550a()
1034 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1035 serial8250_out_MCR(up, status1); in autoconfig_16550a()
1040 serial_out(up, UART_LCR, 0xE0); in autoconfig_16550a()
1042 quot = serial_dl_read(up); in autoconfig_16550a()
1045 if (ns16550a_goto_highspeed(up)) in autoconfig_16550a()
1046 serial_dl_write(up, quot); in autoconfig_16550a()
1048 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1050 up->port.uartclk = 921600*16; in autoconfig_16550a()
1051 up->port.type = PORT_NS16550A; in autoconfig_16550a()
1052 up->capabilities |= UART_NATSEMI; in autoconfig_16550a()
1058 * No EFR. Try to detect a TI16750, which only sets bit 5 of in autoconfig_16550a()
1063 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1064 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); in autoconfig_16550a()
1065 status1 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750; in autoconfig_16550a()
1066 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); in autoconfig_16550a()
1068 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in autoconfig_16550a()
1069 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); in autoconfig_16550a()
1070 status2 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750; in autoconfig_16550a()
1071 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); in autoconfig_16550a()
1073 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1079 up->port.type = PORT_16750; in autoconfig_16550a()
1080 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP; in autoconfig_16550a()
1088 * We're going to explicitly set the UUE bit to 0 before in autoconfig_16550a()
1089 * trying to write and read a 1 just to make sure it's not in autoconfig_16550a()
1092 iersave = serial_in(up, UART_IER); in autoconfig_16550a()
1093 serial_out(up, UART_IER, iersave & ~UART_IER_UUE); in autoconfig_16550a()
1094 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) { in autoconfig_16550a()
1099 serial_out(up, UART_IER, iersave | UART_IER_UUE); in autoconfig_16550a()
1100 if (serial_in(up, UART_IER) & UART_IER_UUE) { in autoconfig_16550a()
1103 * We'll leave the UART_IER_UUE bit set to 1 (enabled). in autoconfig_16550a()
1106 up->port.type = PORT_XSCALE; in autoconfig_16550a()
1107 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE; in autoconfig_16550a()
1112 * If we got here we couldn't force the IER_UUE bit to 0. in autoconfig_16550a()
1115 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 "); in autoconfig_16550a()
1117 serial_out(up, UART_IER, iersave); in autoconfig_16550a()
1123 if (up->port.type == PORT_16550A && size_fifo(up) == 64) { in autoconfig_16550a()
1124 up->port.type = PORT_U6_16550A; in autoconfig_16550a()
1125 up->capabilities |= UART_CAP_AFE; in autoconfig_16550a()
1130 * This routine is called by rs_init() to initialize a specific serial
1136 static void autoconfig(struct uart_8250_port *up) in autoconfig() argument
1140 struct uart_port *port = &up->port; in autoconfig()
1144 if (!port->iobase && !port->mapbase && !port->membase) in autoconfig()
1148 port->name, port->iobase, port->membase); in autoconfig()
1151 * We really do need global IRQs disabled here - we're going to in autoconfig()
1152 * be frobbing the chips IRQ enable register to see if it exists. in autoconfig()
1158 up->capabilities = 0; in autoconfig()
1159 up->bugs = 0; in autoconfig()
1161 if (!(port->flags & UPF_BUGGY_UART)) { in autoconfig()
1166 * 0x80 is used as a nonsense port to prevent against in autoconfig()
1167 * false positives due to ISA bus float. The in autoconfig()
1168 * assumption is that 0x80 is a non-existent port; in autoconfig()
1175 scratch = serial_in(up, UART_IER); in autoconfig()
1176 serial_out(up, UART_IER, 0); in autoconfig()
1182 * 16C754B) allow only to modify them if an EFR bit is set. in autoconfig()
1184 scratch2 = serial_in(up, UART_IER) & UART_IER_ALL_INTR; in autoconfig()
1185 serial_out(up, UART_IER, UART_IER_ALL_INTR); in autoconfig()
1189 scratch3 = serial_in(up, UART_IER) & UART_IER_ALL_INTR; in autoconfig()
1190 serial_out(up, UART_IER, scratch); in autoconfig()
1202 save_mcr = serial8250_in_MCR(up); in autoconfig()
1203 save_lcr = serial_in(up, UART_LCR); in autoconfig()
1206 * Check to see if a UART is really there. Certain broken in autoconfig()
1211 * manufacturer would be stupid enough to design a board in autoconfig()
1212 * that conflicts with COM 1-4 --- we hope! in autoconfig()
1214 if (!(port->flags & UPF_SKIP_TEST)) { in autoconfig()
1215 serial8250_out_MCR(up, UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_RTS); in autoconfig()
1216 status1 = serial_in(up, UART_MSR) & UART_MSR_STATUS_BITS; in autoconfig()
1217 serial8250_out_MCR(up, save_mcr); in autoconfig()
1228 * type of port it is. The IIR top two bits allows us to find in autoconfig()
1232 * We also initialise the EFR (if any) to zero for later. The in autoconfig()
1235 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in autoconfig()
1236 serial_out(up, UART_EFR, 0); in autoconfig()
1237 serial_out(up, UART_LCR, 0); in autoconfig()
1239 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); in autoconfig()
1241 switch (serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED) { in autoconfig()
1243 autoconfig_8250(up); in autoconfig()
1246 port->type = PORT_16550; in autoconfig()
1249 autoconfig_16550a(up); in autoconfig()
1252 port->type = PORT_UNKNOWN; in autoconfig()
1260 if (port->type == PORT_16550A && up->probe & UART_PROBE_RSA && in autoconfig()
1261 __enable_rsa(up)) in autoconfig()
1262 port->type = PORT_RSA; in autoconfig()
1265 serial_out(up, UART_LCR, save_lcr); in autoconfig()
1267 port->fifosize = uart_config[up->port.type].fifo_size; in autoconfig()
1268 old_capabilities = up->capabilities; in autoconfig()
1269 up->capabilities = uart_config[port->type].flags; in autoconfig()
1270 up->tx_loadsz = uart_config[port->type].tx_loadsz; in autoconfig()
1272 if (port->type == PORT_UNKNOWN) in autoconfig()
1279 if (port->type == PORT_RSA) in autoconfig()
1280 serial_out(up, UART_RSA_FRR, 0); in autoconfig()
1282 serial8250_out_MCR(up, save_mcr); in autoconfig()
1283 serial8250_clear_fifos(up); in autoconfig()
1284 serial_in(up, UART_RX); in autoconfig()
1285 serial8250_clear_IER(up); in autoconfig()
1293 if (port->type == PORT_16550A && port->iotype == UPIO_PORT) in autoconfig()
1294 fintek_8250_probe(up); in autoconfig()
1296 if (up->capabilities != old_capabilities) { in autoconfig()
1297 dev_warn(port->dev, "detected caps %08x should be %08x\n", in autoconfig()
1298 old_capabilities, up->capabilities); in autoconfig()
1302 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name); in autoconfig()
1305 static void autoconfig_irq(struct uart_8250_port *up) in autoconfig_irq() argument
1307 struct uart_port *port = &up->port; in autoconfig_irq()
1314 if (port->flags & UPF_FOURPORT) { in autoconfig_irq()
1315 ICP = (port->iobase & 0xfe0) | 0x1f; in autoconfig_irq()
1323 save_mcr = serial8250_in_MCR(up); in autoconfig_irq()
1326 save_ier = serial_in(up, UART_IER); in autoconfig_irq()
1328 serial8250_out_MCR(up, UART_MCR_OUT1 | UART_MCR_OUT2); in autoconfig_irq()
1331 serial8250_out_MCR(up, 0); in autoconfig_irq()
1333 if (port->flags & UPF_FOURPORT) { in autoconfig_irq()
1334 serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS); in autoconfig_irq()
1336 serial8250_out_MCR(up, in autoconfig_irq()
1341 serial_out(up, UART_IER, UART_IER_ALL_INTR); in autoconfig_irq()
1343 serial_in(up, UART_LSR); in autoconfig_irq()
1344 serial_in(up, UART_RX); in autoconfig_irq()
1345 serial_in(up, UART_IIR); in autoconfig_irq()
1346 serial_in(up, UART_MSR); in autoconfig_irq()
1347 serial_out(up, UART_TX, 0xFF); in autoconfig_irq()
1351 serial8250_out_MCR(up, save_mcr); in autoconfig_irq()
1354 serial_out(up, UART_IER, save_ier); in autoconfig_irq()
1357 if (port->flags & UPF_FOURPORT) in autoconfig_irq()
1360 port->irq = (irq > 0) ? irq : 0; in autoconfig_irq()
1365 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_stop_rx() local
1367 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_stop_rx()
1368 lockdep_assert_held_once(&port->lock); in serial8250_stop_rx()
1370 serial8250_rpm_get(up); in serial8250_stop_rx()
1372 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in serial8250_stop_rx()
1373 up->port.read_status_mask &= ~UART_LSR_DR; in serial8250_stop_rx()
1374 serial_port_out(port, UART_IER, up->ier); in serial8250_stop_rx()
1376 serial8250_rpm_put(up); in serial8250_stop_rx()
1380 * serial8250_em485_stop_tx() - generic ->rs485_stop_tx() callback
1383 * Generic callback usable by 8250 uart drivers to stop rs485 transmission.
1389 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_em485_stop_tx()
1390 lockdep_assert_held_once(&p->port.lock); in serial8250_em485_stop_tx()
1392 if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND) in serial8250_em485_stop_tx()
1400 * received during the half-duplex transmission. in serial8250_em485_stop_tx()
1403 if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) { in serial8250_em485_stop_tx()
1406 p->ier |= UART_IER_RLSI | UART_IER_RDI; in serial8250_em485_stop_tx()
1407 serial_port_out(&p->port, UART_IER, p->ier); in serial8250_em485_stop_tx()
1416 struct uart_8250_port *p = em485->port; in serial8250_em485_handle_stop_tx()
1420 uart_port_lock_irqsave(&p->port, &flags); in serial8250_em485_handle_stop_tx()
1421 if (em485->active_timer == &em485->stop_tx_timer) { in serial8250_em485_handle_stop_tx()
1422 p->rs485_stop_tx(p); in serial8250_em485_handle_stop_tx()
1423 em485->active_timer = NULL; in serial8250_em485_handle_stop_tx()
1424 em485->tx_stopped = true; in serial8250_em485_handle_stop_tx()
1426 uart_port_unlock_irqrestore(&p->port, flags); in serial8250_em485_handle_stop_tx()
1439 struct uart_8250_em485 *em485 = p->em485; in __stop_tx_rs485()
1441 /* Port locked to synchronize UART_IER access against the console. */ in __stop_tx_rs485()
1442 lockdep_assert_held_once(&p->port.lock); in __stop_tx_rs485()
1444 stop_delay += (u64)p->port.rs485.delay_rts_after_send * NSEC_PER_MSEC; in __stop_tx_rs485()
1447 * rs485_stop_tx() is going to set RTS according to config in __stop_tx_rs485()
1451 em485->active_timer = &em485->stop_tx_timer; in __stop_tx_rs485()
1452 hrtimer_start(&em485->stop_tx_timer, ns_to_ktime(stop_delay), HRTIMER_MODE_REL); in __stop_tx_rs485()
1454 p->rs485_stop_tx(p); in __stop_tx_rs485()
1455 em485->active_timer = NULL; in __stop_tx_rs485()
1456 em485->tx_stopped = true; in __stop_tx_rs485()
1462 struct uart_8250_em485 *em485 = p->em485; in __stop_tx()
1471 * To provide required timing and allow FIFO transfer, in __stop_tx()
1475 * enlarge stop_tx_timer by the tx time of one frame to cover in __stop_tx()
1479 if (!(p->capabilities & UART_CAP_NOTEMT)) in __stop_tx()
1483 * frame timing formula. It seems to suggest THRE might in __stop_tx()
1488 stop_delay = p->port.frame_time + DIV_ROUND_UP(p->port.frame_time, 7); in __stop_tx()
1500 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_stop_tx() local
1502 serial8250_rpm_get(up); in serial8250_stop_tx()
1503 __stop_tx(up); in serial8250_stop_tx()
1506 * We really want to stop the transmitter from sending. in serial8250_stop_tx()
1508 if (port->type == PORT_16C950) { in serial8250_stop_tx()
1509 up->acr |= UART_ACR_TXDIS; in serial8250_stop_tx()
1510 serial_icr_write(up, UART_ACR, up->acr); in serial8250_stop_tx()
1512 serial8250_rpm_put(up); in serial8250_stop_tx()
1517 struct uart_8250_port *up = up_to_u8250p(port); in __start_tx() local
1519 if (up->dma && !up->dma->tx_dma(up)) in __start_tx()
1522 if (serial8250_set_THRI(up)) { in __start_tx()
1523 if (up->bugs & UART_BUG_TXEN) { in __start_tx()
1524 u16 lsr = serial_lsr_in(up); in __start_tx()
1527 serial8250_tx_chars(up); in __start_tx()
1532 * Re-enable the transmitter if we disabled it. in __start_tx()
1534 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { in __start_tx()
1535 up->acr &= ~UART_ACR_TXDIS; in __start_tx()
1536 serial_icr_write(up, UART_ACR, up->acr); in __start_tx()
1541 * serial8250_em485_start_tx() - generic ->rs485_start_tx() callback
1542 * @up: uart 8250 port
1544 * Generic callback usable by 8250 uart drivers to start rs485 transmission.
1550 void serial8250_em485_start_tx(struct uart_8250_port *up) in serial8250_em485_start_tx() argument
1552 unsigned char mcr = serial8250_in_MCR(up); in serial8250_em485_start_tx()
1554 if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) in serial8250_em485_start_tx()
1555 serial8250_stop_rx(&up->port); in serial8250_em485_start_tx()
1557 if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND) in serial8250_em485_start_tx()
1561 serial8250_out_MCR(up, mcr); in serial8250_em485_start_tx()
1565 /* Returns false, if start_tx_timer was setup to defer TX start */
1568 struct uart_8250_port *up = up_to_u8250p(port); in start_tx_rs485() local
1569 struct uart_8250_em485 *em485 = up->em485; in start_tx_rs485()
1573 * em485->active_timer != &em485->stop_tx_timer, it might happen that in start_tx_rs485()
1575 * chars is send and em485->active_timer == &em485->stop_tx_timer again. in start_tx_rs485()
1577 * the timer is already running and only comes around to check for in start_tx_rs485()
1578 * em485->active_timer when &em485->stop_tx_timer is armed again. in start_tx_rs485()
1580 if (em485->active_timer == &em485->stop_tx_timer) in start_tx_rs485()
1581 hrtimer_try_to_cancel(&em485->stop_tx_timer); in start_tx_rs485()
1583 em485->active_timer = NULL; in start_tx_rs485()
1585 if (em485->tx_stopped) { in start_tx_rs485()
1586 em485->tx_stopped = false; in start_tx_rs485()
1588 up->rs485_start_tx(up); in start_tx_rs485()
1590 if (up->port.rs485.delay_rts_before_send > 0) { in start_tx_rs485()
1591 em485->active_timer = &em485->start_tx_timer; in start_tx_rs485()
1592 start_hrtimer_ms(&em485->start_tx_timer, in start_tx_rs485()
1593 up->port.rs485.delay_rts_before_send); in start_tx_rs485()
1605 struct uart_8250_port *p = em485->port; in serial8250_em485_handle_start_tx()
1608 uart_port_lock_irqsave(&p->port, &flags); in serial8250_em485_handle_start_tx()
1609 if (em485->active_timer == &em485->start_tx_timer) { in serial8250_em485_handle_start_tx()
1610 __start_tx(&p->port); in serial8250_em485_handle_start_tx()
1611 em485->active_timer = NULL; in serial8250_em485_handle_start_tx()
1613 uart_port_unlock_irqrestore(&p->port, flags); in serial8250_em485_handle_start_tx()
1620 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_start_tx() local
1621 struct uart_8250_em485 *em485 = up->em485; in serial8250_start_tx()
1623 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_start_tx()
1624 lockdep_assert_held_once(&port->lock); in serial8250_start_tx()
1626 if (!port->x_char && kfifo_is_empty(&port->state->port.xmit_fifo)) in serial8250_start_tx()
1629 serial8250_rpm_get_tx(up); in serial8250_start_tx()
1632 if ((em485->active_timer == &em485->start_tx_timer) || in serial8250_start_tx()
1641 port->throttle(port); in serial8250_throttle()
1646 port->unthrottle(port); in serial8250_unthrottle()
1651 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_disable_ms() local
1653 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_disable_ms()
1654 lockdep_assert_held_once(&port->lock); in serial8250_disable_ms()
1657 if (up->bugs & UART_BUG_NOMSR) in serial8250_disable_ms()
1660 mctrl_gpio_disable_ms(up->gpios); in serial8250_disable_ms()
1662 up->ier &= ~UART_IER_MSI; in serial8250_disable_ms()
1663 serial_port_out(port, UART_IER, up->ier); in serial8250_disable_ms()
1668 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_enable_ms() local
1670 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_enable_ms()
1671 lockdep_assert_held_once(&port->lock); in serial8250_enable_ms()
1674 if (up->bugs & UART_BUG_NOMSR) in serial8250_enable_ms()
1677 mctrl_gpio_enable_ms(up->gpios); in serial8250_enable_ms()
1679 up->ier |= UART_IER_MSI; in serial8250_enable_ms()
1681 serial8250_rpm_get(up); in serial8250_enable_ms()
1682 serial_port_out(port, UART_IER, up->ier); in serial8250_enable_ms()
1683 serial8250_rpm_put(up); in serial8250_enable_ms()
1686 void serial8250_read_char(struct uart_8250_port *up, u16 lsr) in serial8250_read_char() argument
1688 struct uart_port *port = &up->port; in serial8250_read_char()
1692 ch = serial_in(up, UART_RX); in serial8250_read_char()
1697 * it receives a break. To avoid reading from the in serial8250_read_char()
1699 * just force the read character to be 0 in serial8250_read_char()
1703 port->icount.rx++; in serial8250_read_char()
1705 lsr |= up->lsr_saved_flags; in serial8250_read_char()
1706 up->lsr_saved_flags = 0; in serial8250_read_char()
1711 port->icount.brk++; in serial8250_read_char()
1721 port->icount.parity++; in serial8250_read_char()
1723 port->icount.frame++; in serial8250_read_char()
1725 port->icount.overrun++; in serial8250_read_char()
1730 lsr &= port->read_status_mask; in serial8250_read_char()
1733 dev_dbg(port->dev, "handling break\n"); in serial8250_read_char()
1748 * serial8250_rx_chars - Read characters. The first LSR value must be passed in.
1750 * Returns LSR bits. The caller should rely only on non-Rx related LSR bits
1754 u16 serial8250_rx_chars(struct uart_8250_port *up, u16 lsr) in serial8250_rx_chars() argument
1756 struct uart_port *port = &up->port; in serial8250_rx_chars()
1760 serial8250_read_char(up, lsr); in serial8250_rx_chars()
1761 if (--max_count == 0) in serial8250_rx_chars()
1763 lsr = serial_in(up, UART_LSR); in serial8250_rx_chars()
1766 tty_flip_buffer_push(&port->state->port); in serial8250_rx_chars()
1771 void serial8250_tx_chars(struct uart_8250_port *up) in serial8250_tx_chars() argument
1773 struct uart_port *port = &up->port; in serial8250_tx_chars()
1774 struct tty_port *tport = &port->state->port; in serial8250_tx_chars()
1777 if (port->x_char) { in serial8250_tx_chars()
1785 if (kfifo_is_empty(&tport->xmit_fifo)) { in serial8250_tx_chars()
1786 __stop_tx(up); in serial8250_tx_chars()
1790 count = up->tx_loadsz; in serial8250_tx_chars()
1797 serial_out(up, UART_TX, c); in serial8250_tx_chars()
1798 if (up->bugs & UART_BUG_TXRACE) { in serial8250_tx_chars()
1804 * Delay back-to-back writes by a read cycle to avoid in serial8250_tx_chars()
1806 * side-effects and discard the result. in serial8250_tx_chars()
1808 serial_in(up, UART_SCR); in serial8250_tx_chars()
1811 if ((up->capabilities & UART_CAP_HFIFO) && in serial8250_tx_chars()
1812 !uart_lsr_tx_empty(serial_in(up, UART_LSR))) in serial8250_tx_chars()
1814 /* The BCM2835 MINI UART THRE bit is really a not-full bit. */ in serial8250_tx_chars()
1815 if ((up->capabilities & UART_CAP_MINI) && in serial8250_tx_chars()
1816 !(serial_in(up, UART_LSR) & UART_LSR_THRE)) in serial8250_tx_chars()
1818 } while (--count > 0); in serial8250_tx_chars()
1820 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in serial8250_tx_chars()
1824 * With RPM enabled, we have to wait until the FIFO is empty before the in serial8250_tx_chars()
1828 if (kfifo_is_empty(&tport->xmit_fifo) && in serial8250_tx_chars()
1829 !(up->capabilities & UART_CAP_RPM)) in serial8250_tx_chars()
1830 __stop_tx(up); in serial8250_tx_chars()
1835 unsigned int serial8250_modem_status(struct uart_8250_port *up) in serial8250_modem_status() argument
1837 struct uart_port *port = &up->port; in serial8250_modem_status()
1838 unsigned int status = serial_in(up, UART_MSR); in serial8250_modem_status()
1840 status |= up->msr_saved_flags; in serial8250_modem_status()
1841 up->msr_saved_flags = 0; in serial8250_modem_status()
1842 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && in serial8250_modem_status()
1843 port->state != NULL) { in serial8250_modem_status()
1845 port->icount.rng++; in serial8250_modem_status()
1847 port->icount.dsr++; in serial8250_modem_status()
1853 wake_up_interruptible(&port->state->port.delta_msr_wait); in serial8250_modem_status()
1860 static bool handle_rx_dma(struct uart_8250_port *up, unsigned int iir) in handle_rx_dma() argument
1865 * Postpone DMA or not decision to IIR_RDI or IIR_RX_TIMEOUT in handle_rx_dma()
1866 * because it's impossible to do an informed decision about in handle_rx_dma()
1875 if (!up->dma->rx_running) in handle_rx_dma()
1880 serial8250_rx_dma_flush(up); in handle_rx_dma()
1883 return up->dma->rx_dma(up); in handle_rx_dma()
1891 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_handle_irq() local
1892 struct tty_port *tport = &port->state->port; in serial8250_handle_irq()
1902 status = serial_lsr_in(up); in serial8250_handle_irq()
1906 * FIFO, then don't drain the FIFO, as this may lead to TTY buffer in serial8250_handle_irq()
1913 (port->status & (UPSTAT_AUTOCTS | UPSTAT_AUTORTS)) && in serial8250_handle_irq()
1914 !(port->read_status_mask & UART_LSR_DR)) in serial8250_handle_irq()
1920 d = irq_get_irq_data(port->irq); in serial8250_handle_irq()
1922 pm_wakeup_event(tport->tty->dev, 0); in serial8250_handle_irq()
1923 if (!up->dma || handle_rx_dma(up, iir)) in serial8250_handle_irq()
1924 status = serial8250_rx_chars(up, status); in serial8250_handle_irq()
1926 serial8250_modem_status(up); in serial8250_handle_irq()
1927 if ((status & UART_LSR_THRE) && (up->ier & UART_IER_THRI)) { in serial8250_handle_irq()
1928 if (!up->dma || up->dma->tx_err) in serial8250_handle_irq()
1929 serial8250_tx_chars(up); in serial8250_handle_irq()
1930 else if (!up->dma->tx_running) in serial8250_handle_irq()
1931 __stop_tx(up); in serial8250_handle_irq()
1942 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_default_handle_irq() local
1946 serial8250_rpm_get(up); in serial8250_default_handle_irq()
1951 serial8250_rpm_put(up); in serial8250_default_handle_irq()
1959 * has space available. Load it up with tx_loadsz bytes.
1966 /* TX Threshold IRQ triggered so load up FIFO */ in serial8250_tx_threshold_handle_irq()
1968 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_tx_threshold_handle_irq() local
1971 serial8250_tx_chars(up); in serial8250_tx_threshold_handle_irq()
1981 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_tx_empty() local
1985 serial8250_rpm_get(up); in serial8250_tx_empty()
1988 if (!serial8250_tx_dma_running(up) && uart_lsr_tx_empty(serial_lsr_in(up))) in serial8250_tx_empty()
1992 serial8250_rpm_put(up); in serial8250_tx_empty()
1999 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_get_mctrl() local
2003 serial8250_rpm_get(up); in serial8250_do_get_mctrl()
2004 status = serial8250_modem_status(up); in serial8250_do_get_mctrl()
2005 serial8250_rpm_put(up); in serial8250_do_get_mctrl()
2008 if (up->gpios) in serial8250_do_get_mctrl()
2009 return mctrl_gpio_get(up->gpios, &val); in serial8250_do_get_mctrl()
2017 if (port->get_mctrl) in serial8250_get_mctrl()
2018 return port->get_mctrl(port); in serial8250_get_mctrl()
2024 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_set_mctrl() local
2029 mcr |= up->mcr; in serial8250_do_set_mctrl()
2031 serial8250_out_MCR(up, mcr); in serial8250_do_set_mctrl()
2037 if (port->rs485.flags & SER_RS485_ENABLED) in serial8250_set_mctrl()
2040 if (port->set_mctrl) in serial8250_set_mctrl()
2041 port->set_mctrl(port, mctrl); in serial8250_set_mctrl()
2048 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_break_ctl() local
2051 serial8250_rpm_get(up); in serial8250_break_ctl()
2053 if (break_state == -1) in serial8250_break_ctl()
2054 up->lcr |= UART_LCR_SBC; in serial8250_break_ctl()
2056 up->lcr &= ~UART_LCR_SBC; in serial8250_break_ctl()
2057 serial_port_out(port, UART_LCR, up->lcr); in serial8250_break_ctl()
2059 serial8250_rpm_put(up); in serial8250_break_ctl()
2062 static void wait_for_lsr(struct uart_8250_port *up, int bits) in wait_for_lsr() argument
2066 /* Wait up to 10ms for the character(s) to be sent. */ in wait_for_lsr()
2068 status = serial_lsr_in(up); in wait_for_lsr()
2072 if (--tmout == 0) in wait_for_lsr()
2080 * Wait for transmitter & holding register to empty
2082 static void wait_for_xmitr(struct uart_8250_port *up, int bits) in wait_for_xmitr() argument
2086 wait_for_lsr(up, bits); in wait_for_xmitr()
2088 /* Wait up to 1s for flow control if necessary */ in wait_for_xmitr()
2089 if (up->port.flags & UPF_CONS_FLOW) { in wait_for_xmitr()
2090 for (tmout = 1000000; tmout; tmout--) { in wait_for_xmitr()
2091 unsigned int msr = serial_in(up, UART_MSR); in wait_for_xmitr()
2092 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; in wait_for_xmitr()
2109 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_get_poll_char() local
2113 serial8250_rpm_get(up); in serial8250_get_poll_char()
2124 serial8250_rpm_put(up); in serial8250_get_poll_char()
2133 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_put_poll_char() local
2136 * Normally the port is locked to synchronize UART_IER access in serial8250_put_poll_char()
2138 * KDB/KGDB, where it may not be possible to acquire the port in serial8250_put_poll_char()
2143 serial8250_rpm_get(up); in serial8250_put_poll_char()
2148 serial8250_clear_IER(up); in serial8250_put_poll_char()
2150 wait_for_xmitr(up, UART_LSR_BOTH_EMPTY); in serial8250_put_poll_char()
2157 * Finally, wait for transmitter to become empty in serial8250_put_poll_char()
2160 wait_for_xmitr(up, UART_LSR_BOTH_EMPTY); in serial8250_put_poll_char()
2162 serial8250_rpm_put(up); in serial8250_put_poll_char()
2169 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_startup() local
2175 if (!port->fifosize) in serial8250_do_startup()
2176 port->fifosize = uart_config[port->type].fifo_size; in serial8250_do_startup()
2177 if (!up->tx_loadsz) in serial8250_do_startup()
2178 up->tx_loadsz = uart_config[port->type].tx_loadsz; in serial8250_do_startup()
2179 if (!up->capabilities) in serial8250_do_startup()
2180 up->capabilities = uart_config[port->type].flags; in serial8250_do_startup()
2181 up->mcr = 0; in serial8250_do_startup()
2183 if (port->iotype != up->cur_iotype) in serial8250_do_startup()
2186 serial8250_rpm_get(up); in serial8250_do_startup()
2187 if (port->type == PORT_16C950) { in serial8250_do_startup()
2189 * Wake up and initialize UART in serial8250_do_startup()
2194 up->acr = 0; in serial8250_do_startup()
2199 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */ in serial8250_do_startup()
2206 if (port->type == PORT_DA830) { in serial8250_do_startup()
2227 * If this is an RSA port, see if we can kick it up to the in serial8250_do_startup()
2230 enable_rsa(up); in serial8250_do_startup()
2237 serial8250_clear_fifos(up); in serial8250_do_startup()
2252 if (!(port->flags & UPF_BUGGY_UART) && in serial8250_do_startup()
2254 dev_info_ratelimited(port->dev, "LSR safety check engaged!\n"); in serial8250_do_startup()
2255 retval = -ENODEV; in serial8250_do_startup()
2260 * For a XR16C850, we need to set the trigger levels in serial8250_do_startup()
2262 if (port->type == PORT_16850) { in serial8250_do_startup()
2265 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial8250_do_startup()
2267 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX); in serial8250_do_startup()
2281 if (((port->type == PORT_ALTR_16550_F32) || in serial8250_do_startup()
2282 (port->type == PORT_ALTR_16550_F64) || in serial8250_do_startup()
2283 (port->type == PORT_ALTR_16550_F128)) && (port->fifosize > 1)) { in serial8250_do_startup()
2284 /* Bounds checking of TX threshold (valid 0 to fifosize-2) */ in serial8250_do_startup()
2285 if ((up->tx_loadsz < 2) || (up->tx_loadsz > port->fifosize)) { in serial8250_do_startup()
2286 dev_err(port->dev, "TX FIFO Threshold errors, skipping\n"); in serial8250_do_startup()
2291 port->fifosize - up->tx_loadsz); in serial8250_do_startup()
2292 port->handle_irq = serial8250_tx_threshold_handle_irq; in serial8250_do_startup()
2296 /* Check if we need to have shared IRQs */ in serial8250_do_startup()
2297 if (port->irq && (up->port.flags & UPF_SHARE_IRQ)) in serial8250_do_startup()
2298 up->port.irqflags |= IRQF_SHARED; in serial8250_do_startup()
2300 retval = up->ops->setup_irq(up); in serial8250_do_startup()
2304 if (port->irq && !(up->port.flags & UPF_NO_THRE_TEST)) { in serial8250_do_startup()
2307 if (port->irqflags & IRQF_SHARED) in serial8250_do_startup()
2308 disable_irq_nosync(port->irq); in serial8250_do_startup()
2315 * the interrupt is enabled. Delays are necessary to in serial8250_do_startup()
2316 * allow register changes to become visible. in serial8250_do_startup()
2322 wait_for_xmitr(up, UART_LSR_THRE); in serial8250_do_startup()
2324 udelay(1); /* allow THRE to set */ in serial8250_do_startup()
2328 udelay(1); /* allow a working UART time to re-assert THRE */ in serial8250_do_startup()
2334 if (port->irqflags & IRQF_SHARED) in serial8250_do_startup()
2335 enable_irq(port->irq); in serial8250_do_startup()
2339 * don't trust the iir, setup a timer to kick the UART in serial8250_do_startup()
2343 up->port.flags & UPF_BUG_THRE) { in serial8250_do_startup()
2344 up->bugs |= UART_BUG_THRE; in serial8250_do_startup()
2348 up->ops->setup_timer(up); in serial8250_do_startup()
2356 if (up->port.flags & UPF_FOURPORT) { in serial8250_do_startup()
2357 if (!up->port.irq) in serial8250_do_startup()
2358 up->port.mctrl |= TIOCM_OUT1; in serial8250_do_startup()
2361 * Most PC uarts need OUT2 raised to enable interrupts. in serial8250_do_startup()
2363 if (port->irq) in serial8250_do_startup()
2364 up->port.mctrl |= TIOCM_OUT2; in serial8250_do_startup()
2366 serial8250_set_mctrl(port, port->mctrl); in serial8250_do_startup()
2370 * Intel 8257x Gigabit ethernet chips have a 16550 emulation, to be in serial8250_do_startup()
2372 * normal serial device to signalize that a transmission data was in serial8250_do_startup()
2373 * queued. Due to that, the above test generally fails. One solution in serial8250_do_startup()
2374 * would be to delay the reading of iir. However, this is not in serial8250_do_startup()
2379 if (up->port.quirks & UPQ_NO_TXEN_TEST) in serial8250_do_startup()
2383 * Do a quick test to see if we receive an interrupt when we enable in serial8250_do_startup()
2392 if (!(up->bugs & UART_BUG_TXEN)) { in serial8250_do_startup()
2393 up->bugs |= UART_BUG_TXEN; in serial8250_do_startup()
2394 dev_dbg(port->dev, "enabling bad tx status workarounds\n"); in serial8250_do_startup()
2397 up->bugs &= ~UART_BUG_TXEN; in serial8250_do_startup()
2405 * saved flags to avoid getting false values from polling in serial8250_do_startup()
2412 up->lsr_saved_flags = 0; in serial8250_do_startup()
2413 up->msr_saved_flags = 0; in serial8250_do_startup()
2418 if (up->dma) { in serial8250_do_startup()
2423 else if (serial8250_request_dma(up)) in serial8250_do_startup()
2424 msg = "failed to request DMA"; in serial8250_do_startup()
2426 dev_warn_ratelimited(port->dev, "%s\n", msg); in serial8250_do_startup()
2427 up->dma = NULL; in serial8250_do_startup()
2433 * enable until after the FIFOs are enabled; otherwise, an already- in serial8250_do_startup()
2436 up->ier = UART_IER_RLSI | UART_IER_RDI; in serial8250_do_startup()
2438 if (port->flags & UPF_FOURPORT) { in serial8250_do_startup()
2443 icp = (port->iobase & 0xfe0) | 0x01f; in serial8250_do_startup()
2449 serial8250_rpm_put(up); in serial8250_do_startup()
2456 if (port->startup) in serial8250_startup()
2457 return port->startup(port); in serial8250_startup()
2463 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_shutdown() local
2466 serial8250_rpm_get(up); in serial8250_do_shutdown()
2473 up->ier = 0; in serial8250_do_shutdown()
2477 synchronize_irq(port->irq); in serial8250_do_shutdown()
2479 if (up->dma) in serial8250_do_shutdown()
2480 serial8250_release_dma(up); in serial8250_do_shutdown()
2483 if (port->flags & UPF_FOURPORT) { in serial8250_do_shutdown()
2485 inb((port->iobase & 0xfe0) | 0x1f); in serial8250_do_shutdown()
2486 port->mctrl |= TIOCM_OUT1; in serial8250_do_shutdown()
2488 port->mctrl &= ~TIOCM_OUT2; in serial8250_do_shutdown()
2490 serial8250_set_mctrl(port, port->mctrl); in serial8250_do_shutdown()
2498 serial8250_clear_fifos(up); in serial8250_do_shutdown()
2502 * Reset the RSA board back to 115kbps compat mode. in serial8250_do_shutdown()
2504 disable_rsa(up); in serial8250_do_shutdown()
2508 * Read data port to reset things, and then unlink from in serial8250_do_shutdown()
2512 serial8250_rpm_put(up); in serial8250_do_shutdown()
2514 up->ops->release_irq(up); in serial8250_do_shutdown()
2520 if (port->shutdown) in serial8250_shutdown()
2521 port->shutdown(port); in serial8250_shutdown()
2530 upf_t magic_multiplier = port->flags & UPF_MAGIC_MULTIPLIER; in serial8250_do_get_divisor()
2531 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_get_divisor() local
2537 * up to clk/4 (0x8001) and clk/8 (0x8002) respectively. These in serial8250_do_get_divisor()
2549 * base frequency of 7.3728MHz, always used. If set to 0, then in serial8250_do_get_divisor()
2553 * if set to 1 and high-speed operation has been enabled with the in serial8250_do_get_divisor()
2555 * then the base frequency is supplied directly to the Baud Rate in serial8250_do_get_divisor()
2560 * In all cases only low 15 bits of the divisor are used to divide in serial8250_do_get_divisor()
2564 * clock by any divisor from 1 to 65535. in serial8250_do_get_divisor()
2566 if (magic_multiplier && baud >= port->uartclk / 6) in serial8250_do_get_divisor()
2568 else if (magic_multiplier && baud >= port->uartclk / 12) in serial8250_do_get_divisor()
2576 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0) in serial8250_do_get_divisor()
2586 if (port->get_divisor) in serial8250_get_divisor()
2587 return port->get_divisor(port, baud, frac); in serial8250_get_divisor()
2592 static unsigned char serial8250_compute_lcr(struct uart_8250_port *up, in serial8250_compute_lcr() argument
2614 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_set_divisor() local
2616 /* Workaround to enable 115200 baud on OMAP1510 internal ports */ in serial8250_do_set_divisor()
2617 if (is_omap1510_8250(up)) { in serial8250_do_set_divisor()
2626 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2, in serial8250_do_set_divisor()
2629 if (up->capabilities & UART_NATSEMI) in serial8250_do_set_divisor()
2632 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); in serial8250_do_set_divisor()
2634 serial_dl_write(up, quot); in serial8250_do_set_divisor()
2641 if (port->set_divisor) in serial8250_set_divisor()
2642 port->set_divisor(port, baud, quot, quot_frac); in serial8250_set_divisor()
2651 unsigned int tolerance = port->uartclk / 100; in serial8250_get_baud_rate()
2660 if (port->flags & UPF_MAGIC_MULTIPLIER) { in serial8250_get_baud_rate()
2661 min = port->uartclk / 16 / UART_DIV_MAX >> 1; in serial8250_get_baud_rate()
2662 max = (port->uartclk + tolerance) / 4; in serial8250_get_baud_rate()
2664 min = port->uartclk / 16 / UART_DIV_MAX; in serial8250_get_baud_rate()
2665 max = (port->uartclk + tolerance) / 16; in serial8250_get_baud_rate()
2669 * Ask the core to calculate the divisor for us. in serial8250_get_baud_rate()
2678 * Note in order to avoid the tty port mutex deadlock don't use the next method
2679 * within the uart port callbacks. Primarily it's supposed to be utilized to
2684 struct tty_port *tport = &port->state->port; in serial8250_update_uartclk()
2689 mutex_lock(&tport->mutex); in serial8250_update_uartclk()
2690 port->uartclk = uartclk; in serial8250_update_uartclk()
2691 mutex_unlock(&tport->mutex); in serial8250_update_uartclk()
2695 down_write(&tty->termios_rwsem); in serial8250_update_uartclk()
2696 mutex_lock(&tport->mutex); in serial8250_update_uartclk()
2698 if (port->uartclk == uartclk) in serial8250_update_uartclk()
2701 port->uartclk = uartclk; in serial8250_update_uartclk()
2706 serial8250_do_set_termios(port, &tty->termios, NULL); in serial8250_update_uartclk()
2709 mutex_unlock(&tport->mutex); in serial8250_update_uartclk()
2710 up_write(&tty->termios_rwsem); in serial8250_update_uartclk()
2719 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_set_termios() local
2724 if (up->capabilities & UART_CAP_MINI) { in serial8250_do_set_termios()
2725 termios->c_cflag &= ~(CSTOPB | PARENB | PARODD | CMSPAR); in serial8250_do_set_termios()
2726 if ((termios->c_cflag & CSIZE) == CS5 || in serial8250_do_set_termios()
2727 (termios->c_cflag & CSIZE) == CS6) in serial8250_do_set_termios()
2728 termios->c_cflag = (termios->c_cflag & ~CSIZE) | CS7; in serial8250_do_set_termios()
2730 cval = serial8250_compute_lcr(up, termios->c_cflag); in serial8250_do_set_termios()
2741 serial8250_rpm_get(up); in serial8250_do_set_termios()
2744 up->lcr = cval; /* Save computed LCR */ in serial8250_do_set_termios()
2746 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) { in serial8250_do_set_termios()
2747 if (baud < 2400 && !up->dma) { in serial8250_do_set_termios()
2748 up->fcr &= ~UART_FCR_TRIGGER_MASK; in serial8250_do_set_termios()
2749 up->fcr |= UART_FCR_TRIGGER_1; in serial8250_do_set_termios()
2754 * MCR-based auto flow control. When AFE is enabled, RTS will be in serial8250_do_set_termios()
2758 if (up->capabilities & UART_CAP_AFE) { in serial8250_do_set_termios()
2759 up->mcr &= ~UART_MCR_AFE; in serial8250_do_set_termios()
2760 if (termios->c_cflag & CRTSCTS) in serial8250_do_set_termios()
2761 up->mcr |= UART_MCR_AFE; in serial8250_do_set_termios()
2765 * Update the per-port timeout. in serial8250_do_set_termios()
2767 uart_update_timeout(port, termios->c_cflag, baud); in serial8250_do_set_termios()
2769 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in serial8250_do_set_termios()
2770 if (termios->c_iflag & INPCK) in serial8250_do_set_termios()
2771 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE; in serial8250_do_set_termios()
2772 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) in serial8250_do_set_termios()
2773 port->read_status_mask |= UART_LSR_BI; in serial8250_do_set_termios()
2776 * Characters to ignore in serial8250_do_set_termios()
2778 port->ignore_status_mask = 0; in serial8250_do_set_termios()
2779 if (termios->c_iflag & IGNPAR) in serial8250_do_set_termios()
2780 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; in serial8250_do_set_termios()
2781 if (termios->c_iflag & IGNBRK) { in serial8250_do_set_termios()
2782 port->ignore_status_mask |= UART_LSR_BI; in serial8250_do_set_termios()
2787 if (termios->c_iflag & IGNPAR) in serial8250_do_set_termios()
2788 port->ignore_status_mask |= UART_LSR_OE; in serial8250_do_set_termios()
2794 if ((termios->c_cflag & CREAD) == 0) in serial8250_do_set_termios()
2795 port->ignore_status_mask |= UART_LSR_DR; in serial8250_do_set_termios()
2800 up->ier &= ~UART_IER_MSI; in serial8250_do_set_termios()
2801 if (!(up->bugs & UART_BUG_NOMSR) && in serial8250_do_set_termios()
2802 UART_ENABLE_MS(&up->port, termios->c_cflag)) in serial8250_do_set_termios()
2803 up->ier |= UART_IER_MSI; in serial8250_do_set_termios()
2804 if (up->capabilities & UART_CAP_UUE) in serial8250_do_set_termios()
2805 up->ier |= UART_IER_UUE; in serial8250_do_set_termios()
2806 if (up->capabilities & UART_CAP_RTOIE) in serial8250_do_set_termios()
2807 up->ier |= UART_IER_RTOIE; in serial8250_do_set_termios()
2809 serial_port_out(port, UART_IER, up->ier); in serial8250_do_set_termios()
2811 if (up->capabilities & UART_CAP_EFR) { in serial8250_do_set_termios()
2815 * - TI16C752 requires control thresholds to be set. in serial8250_do_set_termios()
2816 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled. in serial8250_do_set_termios()
2818 if (termios->c_cflag & CRTSCTS) in serial8250_do_set_termios()
2822 if (port->flags & UPF_EXAR_EFR) in serial8250_do_set_termios()
2831 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR in serial8250_do_set_termios()
2834 if (port->type == PORT_16750) in serial8250_do_set_termios()
2835 serial_port_out(port, UART_FCR, up->fcr); in serial8250_do_set_termios()
2837 serial_port_out(port, UART_LCR, up->lcr); /* reset DLAB */ in serial8250_do_set_termios()
2838 if (port->type != PORT_16750) { in serial8250_do_set_termios()
2840 if (up->fcr & UART_FCR_ENABLE_FIFO) in serial8250_do_set_termios()
2842 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */ in serial8250_do_set_termios()
2844 serial8250_set_mctrl(port, port->mctrl); in serial8250_do_set_termios()
2846 serial8250_rpm_put(up); in serial8250_do_set_termios()
2858 if (port->set_termios) in serial8250_set_termios()
2859 port->set_termios(port, termios, old); in serial8250_set_termios()
2866 if (termios->c_line == N_PPS) { in serial8250_do_set_ldisc()
2867 port->flags |= UPF_HARDPPS_CD; in serial8250_do_set_ldisc()
2872 port->flags &= ~UPF_HARDPPS_CD; in serial8250_do_set_ldisc()
2873 if (!UART_ENABLE_MS(port, termios->c_cflag)) { in serial8250_do_set_ldisc()
2885 if (port->set_ldisc) in serial8250_set_ldisc()
2886 port->set_ldisc(port, termios); in serial8250_set_ldisc()
2904 if (port->pm) in serial8250_pm()
2905 port->pm(port, state, oldstate); in serial8250_pm()
2912 if (pt->port.mapsize) in serial8250_port_size()
2913 return pt->port.mapsize; in serial8250_port_size()
2915 return 0x16 << pt->port.regshift; in serial8250_port_size()
2917 return 8 << pt->port.regshift; in serial8250_port_size()
2923 static int serial8250_request_std_resource(struct uart_8250_port *up) in serial8250_request_std_resource() argument
2925 unsigned int size = serial8250_port_size(up); in serial8250_request_std_resource()
2926 struct uart_port *port = &up->port; in serial8250_request_std_resource()
2929 switch (port->iotype) { in serial8250_request_std_resource()
2936 if (!port->mapbase) { in serial8250_request_std_resource()
2937 ret = -EINVAL; in serial8250_request_std_resource()
2941 if (!request_mem_region(port->mapbase, size, "serial")) { in serial8250_request_std_resource()
2942 ret = -EBUSY; in serial8250_request_std_resource()
2946 if (port->flags & UPF_IOREMAP) { in serial8250_request_std_resource()
2947 port->membase = ioremap(port->mapbase, size); in serial8250_request_std_resource()
2948 if (!port->membase) { in serial8250_request_std_resource()
2949 release_mem_region(port->mapbase, size); in serial8250_request_std_resource()
2950 ret = -ENOMEM; in serial8250_request_std_resource()
2957 if (!request_region(port->iobase, size, "serial")) in serial8250_request_std_resource()
2958 ret = -EBUSY; in serial8250_request_std_resource()
2964 static void serial8250_release_std_resource(struct uart_8250_port *up) in serial8250_release_std_resource() argument
2966 unsigned int size = serial8250_port_size(up); in serial8250_release_std_resource()
2967 struct uart_port *port = &up->port; in serial8250_release_std_resource()
2969 switch (port->iotype) { in serial8250_release_std_resource()
2976 if (!port->mapbase) in serial8250_release_std_resource()
2979 if (port->flags & UPF_IOREMAP) { in serial8250_release_std_resource()
2980 iounmap(port->membase); in serial8250_release_std_resource()
2981 port->membase = NULL; in serial8250_release_std_resource()
2984 release_mem_region(port->mapbase, size); in serial8250_release_std_resource()
2989 release_region(port->iobase, size); in serial8250_release_std_resource()
2996 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_release_port() local
2998 serial8250_release_std_resource(up); in serial8250_release_port()
3003 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_request_port() local
3005 return serial8250_request_std_resource(up); in serial8250_request_port()
3008 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up) in fcr_get_rxtrig_bytes() argument
3010 const struct serial8250_config *conf_type = &uart_config[up->port.type]; in fcr_get_rxtrig_bytes()
3013 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)]; in fcr_get_rxtrig_bytes()
3015 return bytes ? bytes : -EOPNOTSUPP; in fcr_get_rxtrig_bytes()
3018 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes) in bytes_to_fcr_rxtrig() argument
3020 const struct serial8250_config *conf_type = &uart_config[up->port.type]; in bytes_to_fcr_rxtrig()
3023 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)]) in bytes_to_fcr_rxtrig()
3024 return -EOPNOTSUPP; in bytes_to_fcr_rxtrig()
3027 if (bytes < conf_type->rxtrig_bytes[i]) in bytes_to_fcr_rxtrig()
3029 return (--i) << UART_FCR_R_TRIG_SHIFT; in bytes_to_fcr_rxtrig()
3038 struct uart_port *uport = state->uart_port; in do_get_rxtrig()
3039 struct uart_8250_port *up = up_to_u8250p(uport); in do_get_rxtrig() local
3041 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1) in do_get_rxtrig()
3042 return -EINVAL; in do_get_rxtrig()
3044 return fcr_get_rxtrig_bytes(up); in do_get_rxtrig()
3051 mutex_lock(&port->mutex); in do_serial8250_get_rxtrig()
3053 mutex_unlock(&port->mutex); in do_serial8250_get_rxtrig()
3074 struct uart_port *uport = state->uart_port; in do_set_rxtrig()
3075 struct uart_8250_port *up = up_to_u8250p(uport); in do_set_rxtrig() local
3078 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1) in do_set_rxtrig()
3079 return -EINVAL; in do_set_rxtrig()
3081 rxtrig = bytes_to_fcr_rxtrig(up, bytes); in do_set_rxtrig()
3085 serial8250_clear_fifos(up); in do_set_rxtrig()
3086 up->fcr &= ~UART_FCR_TRIGGER_MASK; in do_set_rxtrig()
3087 up->fcr |= (unsigned char)rxtrig; in do_set_rxtrig()
3088 serial_out(up, UART_FCR, up->fcr); in do_set_rxtrig()
3096 mutex_lock(&port->mutex); in do_serial8250_set_rxtrig()
3098 mutex_unlock(&port->mutex); in do_serial8250_set_rxtrig()
3111 return -EINVAL; in rx_trig_bytes_store()
3135 static void register_dev_spec_attr_grp(struct uart_8250_port *up) in register_dev_spec_attr_grp() argument
3137 const struct serial8250_config *conf_type = &uart_config[up->port.type]; in register_dev_spec_attr_grp()
3139 if (conf_type->rxtrig_bytes[0]) in register_dev_spec_attr_grp()
3140 up->port.attr_group = &serial8250_dev_attr_group; in register_dev_spec_attr_grp()
3145 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_config_port() local
3152 ret = serial8250_request_std_resource(up); in serial8250_config_port()
3156 if (port->iotype != up->cur_iotype) in serial8250_config_port()
3160 autoconfig(up); in serial8250_config_port()
3163 if (port->type == PORT_TEGRA) in serial8250_config_port()
3164 up->bugs |= UART_BUG_NOMSR; in serial8250_config_port()
3166 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) in serial8250_config_port()
3167 autoconfig_irq(up); in serial8250_config_port()
3169 if (port->type == PORT_UNKNOWN) in serial8250_config_port()
3170 serial8250_release_std_resource(up); in serial8250_config_port()
3172 register_dev_spec_attr_grp(up); in serial8250_config_port()
3173 up->fcr = uart_config[up->port.type].fcr; in serial8250_config_port()
3179 if (ser->irq >= nr_irqs || ser->irq < 0 || in serial8250_verify_port()
3180 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN || in serial8250_verify_port()
3181 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS || in serial8250_verify_port()
3182 ser->type == PORT_STARTECH) in serial8250_verify_port()
3183 return -EINVAL; in serial8250_verify_port()
3189 int type = port->type; in serial8250_type()
3223 void serial8250_init_port(struct uart_8250_port *up) in serial8250_init_port() argument
3225 struct uart_port *port = &up->port; in serial8250_init_port()
3227 spin_lock_init(&port->lock); in serial8250_init_port()
3228 port->ctrl_id = 0; in serial8250_init_port()
3229 port->pm = NULL; in serial8250_init_port()
3230 port->ops = &serial8250_pops; in serial8250_init_port()
3231 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE); in serial8250_init_port()
3233 up->cur_iotype = 0xFF; in serial8250_init_port()
3237 void serial8250_set_defaults(struct uart_8250_port *up) in serial8250_set_defaults() argument
3239 struct uart_port *port = &up->port; in serial8250_set_defaults()
3241 if (up->port.flags & UPF_FIXED_TYPE) { in serial8250_set_defaults()
3242 unsigned int type = up->port.type; in serial8250_set_defaults()
3244 if (!up->port.fifosize) in serial8250_set_defaults()
3245 up->port.fifosize = uart_config[type].fifo_size; in serial8250_set_defaults()
3246 if (!up->tx_loadsz) in serial8250_set_defaults()
3247 up->tx_loadsz = uart_config[type].tx_loadsz; in serial8250_set_defaults()
3248 if (!up->capabilities) in serial8250_set_defaults()
3249 up->capabilities = uart_config[type].flags; in serial8250_set_defaults()
3255 if (up->dma) { in serial8250_set_defaults()
3256 if (!up->dma->tx_dma) in serial8250_set_defaults()
3257 up->dma->tx_dma = serial8250_tx_dma; in serial8250_set_defaults()
3258 if (!up->dma->rx_dma) in serial8250_set_defaults()
3259 up->dma->rx_dma = serial8250_rx_dma; in serial8250_set_defaults()
3268 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_console_putchar() local
3270 wait_for_xmitr(up, UART_LSR_THRE); in serial8250_console_putchar()
3275 * Restore serial console when h/w power-off detected
3277 static void serial8250_console_restore(struct uart_8250_port *up) in serial8250_console_restore() argument
3279 struct uart_port *port = &up->port; in serial8250_console_restore()
3283 termios.c_cflag = port->cons->cflag; in serial8250_console_restore()
3284 termios.c_ispeed = port->cons->ispeed; in serial8250_console_restore()
3285 termios.c_ospeed = port->cons->ospeed; in serial8250_console_restore()
3286 if (port->state->port.tty && termios.c_cflag == 0) { in serial8250_console_restore()
3287 termios.c_cflag = port->state->port.tty->termios.c_cflag; in serial8250_console_restore()
3288 termios.c_ispeed = port->state->port.tty->termios.c_ispeed; in serial8250_console_restore()
3289 termios.c_ospeed = port->state->port.tty->termios.c_ospeed; in serial8250_console_restore()
3296 serial_port_out(port, UART_LCR, up->lcr); in serial8250_console_restore()
3297 serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS); in serial8250_console_restore()
3301 * Print a string to the serial port using the device FIFO
3304 * to get empty.
3306 static void serial8250_console_fifo_write(struct uart_8250_port *up, in serial8250_console_fifo_write() argument
3311 unsigned int fifosize = up->tx_loadsz; in serial8250_console_fifo_write()
3315 wait_for_lsr(up, UART_LSR_THRE); in serial8250_console_fifo_write()
3319 serial_out(up, UART_TX, '\r'); in serial8250_console_fifo_write()
3322 serial_out(up, UART_TX, *s++); in serial8250_console_fifo_write()
3330 * Print a string to the serial port trying not to disturb
3336 * Thus, we assume the function is called when device is powered up.
3338 void serial8250_console_write(struct uart_8250_port *up, const char *s, in serial8250_console_write() argument
3341 struct uart_8250_em485 *em485 = up->em485; in serial8250_console_write()
3342 struct uart_port *port = &up->port; in serial8250_console_write()
3358 serial8250_clear_IER(up); in serial8250_console_write()
3360 /* check scratch reg to see if port powered off during system sleep */ in serial8250_console_write()
3361 if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) { in serial8250_console_write()
3362 serial8250_console_restore(up); in serial8250_console_write()
3363 up->canary = 0; in serial8250_console_write()
3367 if (em485->tx_stopped) in serial8250_console_write()
3368 up->rs485_start_tx(up); in serial8250_console_write()
3369 mdelay(port->rs485.delay_rts_before_send); in serial8250_console_write()
3372 use_fifo = (up->capabilities & UART_CAP_FIFO) && in serial8250_console_write()
3374 * BCM283x requires to check the fifo in serial8250_console_write()
3377 !(up->capabilities & UART_CAP_MINI) && in serial8250_console_write()
3381 up->tx_loadsz > 1 && in serial8250_console_write()
3382 (up->fcr & UART_FCR_ENABLE_FIFO) && in serial8250_console_write()
3383 port->state && in serial8250_console_write()
3384 test_bit(TTY_PORT_INITIALIZED, &port->state->port.iflags) && in serial8250_console_write()
3390 !(up->port.flags & UPF_CONS_FLOW); in serial8250_console_write()
3393 serial8250_console_fifo_write(up, s, count); in serial8250_console_write()
3398 * Finally, wait for transmitter to become empty in serial8250_console_write()
3401 wait_for_xmitr(up, UART_LSR_BOTH_EMPTY); in serial8250_console_write()
3404 mdelay(port->rs485.delay_rts_after_send); in serial8250_console_write()
3405 if (em485->tx_stopped) in serial8250_console_write()
3406 up->rs485_stop_tx(up); in serial8250_console_write()
3418 if (up->msr_saved_flags) in serial8250_console_write()
3419 serial8250_modem_status(up); in serial8250_console_write()
3437 return (port->uartclk / 16) / quot; in probe_baud()
3448 if (!port->iobase && !port->membase) in serial8250_console_setup()
3449 return -ENODEV; in serial8250_console_setup()
3456 ret = uart_set_options(port, port->cons, baud, parity, bits, flow); in serial8250_console_setup()
3460 if (port->dev) in serial8250_console_setup()
3461 pm_runtime_get_sync(port->dev); in serial8250_console_setup()
3468 if (port->dev) in serial8250_console_exit()
3469 pm_runtime_put_sync(port->dev); in serial8250_console_exit()
3476 MODULE_DESCRIPTION("Base port operations for 8250/16550-type serial ports");