Lines Matching +full:max +full:- +full:channels +full:- +full:clocked
1 // SPDX-License-Identifier: GPL-2.0
3 * Probe module for 8250/16550-type PCI serial ports.
104 /* Unknown vendors/cards - this should not be in linux/pci_ids.h */
110 * > 0 - number of ports
111 * = 0 - use board->num_ports
112 * < 0 - error
162 "Please send the output of lspci -vv, this\n" in moan_device()
165 "modem board to <linux-serial@vger.kernel.org>.\n", in moan_device()
166 str, dev->vendor, dev->device, in moan_device()
167 dev->subsystem_vendor, dev->subsystem_device); in moan_device()
174 return serial8250_pci_setup_port(priv->dev, port, bar, offset, regshift); in setup_port()
178 * ADDI-DATA GmbH communication cards <info@addi-data.com>
184 unsigned int bar = 0, offset = board->first_offset; in addidata_apci7800_setup()
185 bar = FL_GET_BASE(board->flags); in addidata_apci7800_setup()
188 offset += idx * board->uart_offset; in addidata_apci7800_setup()
191 offset += ((idx - 2) * board->uart_offset); in addidata_apci7800_setup()
194 offset += ((idx - 4) * board->uart_offset); in addidata_apci7800_setup()
197 offset += ((idx - 6) * board->uart_offset); in addidata_apci7800_setup()
200 return setup_port(priv, port, bar, offset, board->reg_shift); in addidata_apci7800_setup()
205 * Not that ugly ;) -- HW
211 unsigned int bar, offset = board->first_offset; in afavlab_setup()
213 bar = FL_GET_BASE(board->flags); in afavlab_setup()
218 offset += (idx - 4) * board->uart_offset; in afavlab_setup()
221 return setup_port(priv, port, bar, offset, board->reg_shift); in afavlab_setup()
226 * different versions. N-class, L2000 and A500 have two Diva chips, each
235 switch (dev->subsystem_device) { in pci_hp_diva_init()
266 unsigned int offset = board->first_offset; in pci_hp_diva_setup()
267 unsigned int bar = FL_GET_BASE(board->flags); in pci_hp_diva_setup()
269 switch (priv->dev->subsystem_device) { in pci_hp_diva_setup()
284 offset += idx * board->uart_offset; in pci_hp_diva_setup()
286 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_hp_diva_setup()
296 if (!(dev->subsystem_device & 0x1000)) in pci_inteli960ni_init()
297 return -ENODEV; in pci_inteli960ni_init()
303 return -ENODEV; in pci_inteli960ni_init()
325 if (dev->vendor == PCI_VENDOR_ID_PANACOM || in pci_plx9050_init()
326 dev->subsystem_vendor == PCI_SUBVENDOR_ID_EXSYS) in pci_plx9050_init()
329 if ((dev->vendor == PCI_VENDOR_ID_PLX) && in pci_plx9050_init()
330 (dev->device == PCI_DEVICE_ID_PLX_ROMULUS)) in pci_plx9050_init()
345 return -ENOMEM; in pci_plx9050_init()
430 /* SBS Technologies Inc. PMC-OCTPRO and P-OCTAL cards */
435 unsigned int bar, offset = board->first_offset; in sbs_setup()
440 /* first four channels map to 0, 0x100, 0x200, 0x300 */ in sbs_setup()
441 offset += idx * board->uart_offset; in sbs_setup()
443 /* last four channels map to 0x1000, 0x1100, 0x1200, 0x1300 */ in sbs_setup()
444 offset += idx * board->uart_offset + 0xC00; in sbs_setup()
445 } else /* we have only 8 ports on PMC-OCTALPRO */ in sbs_setup()
448 return setup_port(priv, port, bar, offset, board->reg_shift); in sbs_setup()
458 /* global control register offset for SBS PMC-OctalPro */
468 return -ENOMEM; in sbs_init()
469 /* Set bit-4 Control Register (UART RESET) in to reset the uarts */ in sbs_init()
474 /* Set bit-2 (INTENABLE) of Control Register */ in sbs_init()
482 * Disables the global interrupt of PMC-OctalPro
498 * the UART clocking frequency. Each UART can be clocked independently
501 * version of serial driver doesn't support differently clocked UART's
511 * - 10x cards have control registers in IO and/or memory space;
512 * - 20x cards have control registers in standard PCI configuration space.
518 * 16954 quad UART PCI chip clocked by 18.432 MHz quartz.
531 switch (dev->device & 0xfff8) { in pci_siig10x_init()
545 return -ENOMEM; in pci_siig10x_init()
565 if (((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S_20x) || in pci_siig20x_init()
566 ((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S1P_20x)) { in pci_siig20x_init()
575 unsigned int type = dev->device & 0xff00; in pci_siig_init()
583 return -ENODEV; in pci_siig_init()
590 unsigned int bar = FL_GET_BASE(board->flags) + idx, offset = 0; in pci_siig_setup()
594 offset = (idx - 4) * 8; in pci_siig_setup()
649 * (0,2,3,5,6: serial only -- 7,8,9: serial + parallel) in pci_timedia_probe()
651 if ((dev->subsystem_device & 0x00f0) >= 0x70) { in pci_timedia_probe()
653 dev->subsystem_device); in pci_timedia_probe()
654 return -ENODEV; in pci_timedia_probe()
668 if (dev->subsystem_device == ids[j]) in pci_timedia_init()
676 * Ugh, this is ugly as all hell --- TYT
683 unsigned int bar = 0, offset = board->first_offset; in pci_timedia_setup()
690 offset = board->uart_offset; in pci_timedia_setup()
697 offset = board->uart_offset; in pci_timedia_setup()
703 bar = idx - 2; in pci_timedia_setup()
706 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_timedia_setup()
717 unsigned int bar, offset = board->first_offset; in titan_400l_800l_setup()
728 offset = (idx - 2) * board->uart_offset; in titan_400l_800l_setup()
731 return setup_port(priv, port, bar, offset, board->reg_shift); in titan_400l_800l_setup()
752 return -ENOMEM; in pci_ni8420_init()
783 return -ENOMEM; in pci_ni8430_init()
790 pcibios_resource_to_bus(dev->bus, ®ion, &dev->resource[bar]); in pci_ni8430_init()
818 struct pci_dev *dev = priv->dev; in pci_ni8430_setup()
820 unsigned int bar, offset = board->first_offset; in pci_ni8430_setup()
822 if (idx >= board->num_ports) in pci_ni8430_setup()
825 bar = FL_GET_BASE(board->flags); in pci_ni8430_setup()
826 offset += idx * board->uart_offset; in pci_ni8430_setup()
830 return -ENOMEM; in pci_ni8430_setup()
838 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_ni8430_setup()
847 if ((priv->dev->device != PCI_DEVICE_ID_NETMOS_9865) && in pci_netmos_9900_setup()
848 (priv->dev->subsystem_device & 0xff00) == 0x3000) { in pci_netmos_9900_setup()
854 return setup_port(priv, port, bar, 0, board->reg_shift); in pci_netmos_9900_setup()
863 * 9900 has varying capabilities and can cascade to sub-controllers
870 unsigned int c = dev->class; in pci_netmos_9900_numports()
879 if ((pi == 0) && (dev->device == PCI_DEVICE_ID_NETMOS_9900)) { in pci_netmos_9900_numports()
886 sub_serports = dev->subsystem_device & 0xf; in pci_netmos_9900_numports()
901 unsigned int num_serial = dev->subsystem_device & 0xf; in pci_netmos_init()
903 if ((dev->device == PCI_DEVICE_ID_NETMOS_9901) || in pci_netmos_init()
904 (dev->device == PCI_DEVICE_ID_NETMOS_9865)) in pci_netmos_init()
907 if (dev->subsystem_vendor == PCI_VENDOR_ID_IBM && in pci_netmos_init()
908 dev->subsystem_device == 0x0299) in pci_netmos_init()
911 switch (dev->device) { /* FALLTHROUGH on all */ in pci_netmos_init()
925 return -ENODEV; in pci_netmos_init()
950 /* I/O space size (bits 26-24; 8 bytes = 011b) */
952 /* I/O space size (bits 26-24; 32 bytes = 101b) */
967 /* search for the base-ioport */ in pci_ite887x_init()
972 /* write POSIO0R - speed | size | ioport */ in pci_ite887x_init()
976 /* write INTCBAR - ioport */ in pci_ite887x_init()
984 release_region(iobase->start, ITE_887x_IOSIZE); in pci_ite887x_init()
990 return -ENODEV; in pci_ite887x_init()
994 type = inb(iobase->start + 0x18) & 0x0f; in pci_ite887x_init()
1012 ret = -ENODEV; in pci_ite887x_init()
1034 miscr &= ~(0xf << (12 - 4 * i)); in pci_ite887x_init()
1036 miscr |= 1 << (23 - i); in pci_ite887x_init()
1043 release_region(iobase->start, ITE_887x_IOSIZE); in pci_ite887x_init()
1052 /* the ioport is bit 0-15 in POSIO0R */ in pci_ite887x_exit()
1068 if (dev->vendor == PCI_VENDOR_ID_OXSEMI && in pci_oxsemi_tornado_p()
1069 (dev->device & 0xf000) != 0xc000) in pci_oxsemi_tornado_p()
1073 if (dev->vendor == PCI_VENDOR_ID_ENDRUN && in pci_oxsemi_tornado_p()
1074 (dev->device & 0xf000) != 0xe000) in pci_oxsemi_tornado_p()
1094 return -ENOMEM; in pci_oxsemi_tornado_init()
1102 dev->vendor == PCI_VENDOR_ID_ENDRUN ? in pci_oxsemi_tornado_init()
1109 /* Tornado-specific constants for the TCR and CPR registers; see below. */
1127 * unsigned 16-bit integer.
1141 * divisor required would be out of its unsigned 16-bit integer range.
1144 * 4-bit value of the oversampling rate and the 9-bit value of the clock
1189 unsigned int sclk = port->uartclk * 2; in pci_oxsemi_tornado_get_divisor()
1199 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) { in pci_oxsemi_tornado_get_divisor()
1200 unsigned int cust_div = port->custom_divisor; in pci_oxsemi_tornado_get_divisor()
1221 srem = spre - srem; in pci_oxsemi_tornado_get_divisor()
1284 * For Tornado devices we force MCR[7] set for the Divide-by-M N/8 baud rate
1292 up->mcr |= UART_MCR_CLKSEL; in pci_oxsemi_tornado_set_mctrl()
1304 struct pci_dev *dev = priv->dev; in pci_oxsemi_tornado_setup()
1307 up->port.flags |= UPF_FULL_PROBE; in pci_oxsemi_tornado_setup()
1308 up->port.get_divisor = pci_oxsemi_tornado_get_divisor; in pci_oxsemi_tornado_setup()
1309 up->port.set_divisor = pci_oxsemi_tornado_set_divisor; in pci_oxsemi_tornado_setup()
1310 up->port.set_mctrl = pci_oxsemi_tornado_set_mctrl; in pci_oxsemi_tornado_setup()
1357 unsigned long base = port->port.iobase; in pci_quatech_rqopr()
1369 unsigned long base = port->port.iobase; in pci_quatech_wqopr()
1381 unsigned long base = port->port.iobase; in pci_quatech_rqmcr()
1397 unsigned long base = port->port.iobase; in pci_quatech_wqmcr()
1411 unsigned long base = port->port.iobase; in pci_quatech_has_qmcr()
1435 return -EINVAL; in pci_quatech_test()
1439 return -EINVAL; in pci_quatech_test()
1443 return -EINVAL; in pci_quatech_test()
1447 return -EINVAL; in pci_quatech_test()
1519 amcc = match->driver_data; in pci_quatech_init()
1521 pci_err(dev, "unknown port type '0x%04X'.\n", dev->device); in pci_quatech_init()
1542 port->port.iobase = pci_resource_start(priv->dev, FL_GET_BASE(board->flags)); in pci_quatech_setup()
1544 port->port.uartclk = pci_quatech_clock(port); in pci_quatech_setup()
1547 pci_warn(priv->dev, "software control of RS422 features not currently supported.\n"); in pci_quatech_setup()
1555 unsigned int bar, offset = board->first_offset, maxnr; in pci_default_setup()
1557 bar = FL_GET_BASE(board->flags); in pci_default_setup()
1558 if (board->flags & FL_BASE_BARS) in pci_default_setup()
1561 offset += idx * board->uart_offset; in pci_default_setup()
1563 maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) >> in pci_default_setup()
1564 (board->reg_shift + 3); in pci_default_setup()
1566 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) in pci_default_setup()
1569 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_default_setup()
1579 ret = setup_port(priv, port, idx, 0, board->reg_shift); in ce4100_serial_setup()
1580 port->port.iotype = UPIO_MEM32; in ce4100_serial_setup()
1581 port->port.type = PORT_XSCALE; in ce4100_serial_setup()
1582 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE); in ce4100_serial_setup()
1583 port->port.regshift = 2; in ce4100_serial_setup()
1603 port->port.type = PORT_BRCM_TRUMANAGE; in pci_brcm_trumanage_setup()
1604 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE); in pci_brcm_trumanage_setup()
1617 struct pci_dev *pci_dev = to_pci_dev(port->dev); in pci_fintek_rs485_config()
1619 u8 *index = (u8 *) port->private_data; in pci_fintek_rs485_config()
1623 if (rs485->flags & SER_RS485_ENABLED) { in pci_fintek_rs485_config()
1627 if (rs485->flags & SER_RS485_RTS_ON_SEND) { in pci_fintek_rs485_config()
1653 struct pci_dev *pdev = priv->dev; in pci_fintek_setup()
1665 port->port.iotype = UPIO_PORT; in pci_fintek_setup()
1666 port->port.iobase = iobase; in pci_fintek_setup()
1667 port->port.rs485_config = pci_fintek_rs485_config; in pci_fintek_setup()
1668 port->port.rs485_supported = pci_fintek_rs485_supported; in pci_fintek_setup()
1670 data = devm_kzalloc(&pdev->dev, sizeof(u8), GFP_KERNEL); in pci_fintek_setup()
1672 return -ENOMEM; in pci_fintek_setup()
1676 port->port.private_data = data; in pci_fintek_setup()
1692 return -ENODEV; in pci_fintek_init()
1694 switch (dev->device) { in pci_fintek_init()
1697 max_port = dev->device & 0xff; in pci_fintek_init()
1703 return -EINVAL; in pci_fintek_init()
1721 /* Select 128-byte FIFO and 8x FIFO threshold */ in pci_fintek_init()
1732 pci_write_config_byte(dev, config_base + 0x06, dev->irq); in pci_fintek_init()
1747 struct f815xxa_data *data = p->private_data; in f815xxa_mem_serial_out()
1750 spin_lock_irqsave(&data->lock, flags); in f815xxa_mem_serial_out()
1751 writeb(value, p->membase + offset); in f815xxa_mem_serial_out()
1752 readb(p->membase + UART_SCR); /* Dummy read for flush pcie tx queue */ in f815xxa_mem_serial_out()
1753 spin_unlock_irqrestore(&data->lock, flags); in f815xxa_mem_serial_out()
1760 struct pci_dev *pdev = priv->dev; in pci_fintek_f815xxa_setup()
1763 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); in pci_fintek_f815xxa_setup()
1765 return -ENOMEM; in pci_fintek_f815xxa_setup()
1767 data->idx = idx; in pci_fintek_f815xxa_setup()
1768 spin_lock_init(&data->lock); in pci_fintek_f815xxa_setup()
1770 port->port.private_data = data; in pci_fintek_f815xxa_setup()
1771 port->port.iotype = UPIO_MEM; in pci_fintek_f815xxa_setup()
1772 port->port.flags |= UPF_IOREMAP; in pci_fintek_f815xxa_setup()
1773 port->port.mapbase = pci_resource_start(pdev, 0) + 8 * idx; in pci_fintek_f815xxa_setup()
1774 port->port.serial_out = f815xxa_mem_serial_out; in pci_fintek_f815xxa_setup()
1785 return -ENODEV; in pci_fintek_f815xxa_init()
1787 switch (dev->device) { in pci_fintek_f815xxa_init()
1790 max_port = dev->device & 0xff; in pci_fintek_f815xxa_init()
1796 return -EINVAL; in pci_fintek_f815xxa_init()
1806 /* Select 128-byte FIFO and 8x FIFO threshold */ in pci_fintek_f815xxa_init()
1820 port->port.quirks |= UPQ_NO_TXEN_TEST; in skip_tx_en_setup()
1821 pci_dbg(priv->dev, in skip_tx_en_setup()
1823 priv->dev->vendor, priv->dev->device, in skip_tx_en_setup()
1824 priv->dev->subsystem_vendor, priv->dev->subsystem_device); in skip_tx_en_setup()
1852 * that instead. up->ier should be the same value as what is in kt_serial_in()
1855 val = inb(p->iobase + offset); in kt_serial_in()
1858 val = up->ier; in kt_serial_in()
1867 port->port.flags |= UPF_BUG_THRE; in kt_serial_setup()
1868 port->port.serial_in = kt_serial_in; in kt_serial_setup()
1869 port->port.handle_break = kt_handle_break; in kt_serial_setup()
1876 return -ENODEV; in pci_eg20t_init()
1887 port->port.flags |= UPF_FIXED_TYPE; in pci_wch_ch353_setup()
1888 port->port.type = PORT_16550A; in pci_wch_ch353_setup()
1897 port->port.flags |= UPF_FIXED_TYPE; in pci_wch_ch355_setup()
1898 port->port.type = PORT_16550A; in pci_wch_ch355_setup()
1907 port->port.flags |= UPF_FIXED_TYPE; in pci_wch_ch38x_setup()
1908 port->port.type = PORT_16850; in pci_wch_ch38x_setup()
1922 switch (dev->device) { in pci_wch_ch38x_init()
1927 return -EINVAL; in pci_wch_ch38x_init()
1953 port->port.flags |= UPF_FIXED_TYPE; in pci_sunix_setup()
1954 port->port.type = PORT_SUNIX; in pci_sunix_setup()
1958 offset = idx * board->uart_offset; in pci_sunix_setup()
1961 idx -= 4; in pci_sunix_setup()
1963 offset = idx * 64 + offset * board->uart_offset; in pci_sunix_setup()
2014 switch (dev->device & 0x0F00) { in pci_moxa_supported_rs()
2050 unsigned short device = dev->device; in pci_moxa_init()
2084 unsigned int bar = FL_GET_BASE(board->flags); in pci_moxa_setup()
2087 if (board->num_ports == 4 && idx == 3) in pci_moxa_setup()
2088 offset = 7 * board->uart_offset; in pci_moxa_setup()
2090 offset = idx * board->uart_offset; in pci_moxa_setup()
2105 * ADDI-DATA GmbH communication cards <info@addi-data.com>
2115 * AFAVLAB cards - these may be called via parport_serial
2385 * SBS Technologies, Inc., PMC-OCTALPRO 232
2397 * SBS Technologies, Inc., PMC-OCTALPRO 422
2409 * SBS Technologies, Inc., P-Octal 232
2421 * SBS Technologies, Inc., P-Octal 422
2433 * SIIG cards - these may be called via parport_serial
2501 * Netmos cards - these may be called via parport_serial
2550 * Brainboxes devices - all Oxsemi based
2769 * Cronyx Omega PCI (PLX-chip based)
2952 if (quirk_id_matches(quirk->vendor, dev->vendor) && in find_quirk()
2953 quirk_id_matches(quirk->device, dev->device) && in find_quirk()
2954 quirk_id_matches(quirk->subvendor, dev->subsystem_vendor) && in find_quirk()
2955 quirk_id_matches(quirk->subdevice, dev->subsystem_device)) in find_quirk()
3074 * Board-specific versions.
3128 * uart_offset - the space between channels
3129 * reg_shift - describes how the UART registers are mapped
3131 * For example IER register on SBS, Inc. PMC-OctPro is located at
3563 * Entries following this are board-specific.
3567 * Panacom - IOMEM
3591 /* I think this entry is broken - the first_offset looks wrong --rmk */
3643 * Max 256 ports.
3663 * Computone - uses IOMEM.
3697 * PA Semi PWRficient PA6T-1682M on-chip UART
3736 * ADDI-DATA GmbH PCI-Express communication cards <info@addi-data.com>
3925 { PCI_VDEVICE(MOTOROLA, 0x3052), }, /* Motorola Si3052-based modem */
3926 { PCI_DEVICE(0x1543, 0x3052), }, /* Si3052-based modem, default IDs */
3928 /* multi-io cards handled by parport_serial */
3977 if ((((dev->class >> 8) != PCI_CLASS_COMMUNICATION_SERIAL) && in serial_pci_is_class_communication()
3978 ((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MULTISERIAL) && in serial_pci_is_class_communication()
3979 ((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MODEM)) || in serial_pci_is_class_communication()
3980 (dev->class & 0xff) > 6) in serial_pci_is_class_communication()
3981 return -ENODEV; in serial_pci_is_class_communication()
3989 * serial specs. Returns 0 on success, -ENODEV on failure.
3994 int num_iomem, num_port, first_port = -1, i; in serial_pci_guess_board()
4004 if ((dev->class >> 8) == PCI_CLASS_COMMUNICATION_MULTISERIAL) in serial_pci_guess_board()
4005 return -ENODEV; in serial_pci_guess_board()
4011 if (first_port == -1) in serial_pci_guess_board()
4024 board->flags = first_port; in serial_pci_guess_board()
4025 board->num_ports = pci_resource_len(dev, first_port) / 8; in serial_pci_guess_board()
4034 first_port = -1; in serial_pci_guess_board()
4039 (first_port == -1 || (first_port + num_port) == i)) { in serial_pci_guess_board()
4041 if (first_port == -1) in serial_pci_guess_board()
4047 board->flags = first_port | FL_BASE_BARS; in serial_pci_guess_board()
4048 board->num_ports = num_port; in serial_pci_guess_board()
4052 return -ENODEV; in serial_pci_guess_board()
4060 board->num_ports == guessed->num_ports && in serial_pci_matches()
4061 board->base_baud == guessed->base_baud && in serial_pci_matches()
4062 board->uart_offset == guessed->uart_offset && in serial_pci_matches()
4063 board->reg_shift == guessed->reg_shift && in serial_pci_matches()
4064 board->first_offset == guessed->first_offset; in serial_pci_matches()
4075 nr_ports = board->num_ports; in pciserial_init_ports()
4083 * Run the new-style initialization function. in pciserial_init_ports()
4085 * <0 - error in pciserial_init_ports()
4086 * 0 - use board->num_ports in pciserial_init_ports()
4087 * >0 - number of ports in pciserial_init_ports()
4089 if (quirk->init) { in pciserial_init_ports()
4090 rc = quirk->init(dev); in pciserial_init_ports()
4101 priv = ERR_PTR(-ENOMEM); in pciserial_init_ports()
4105 priv->dev = dev; in pciserial_init_ports()
4106 priv->quirk = quirk; in pciserial_init_ports()
4110 uart.port.uartclk = board->base_baud * 16; in pciserial_init_ports()
4112 if (board->flags & FL_NOIRQ) { in pciserial_init_ports()
4116 pci_dbg(dev, "Using MSI(-X) interrupts\n"); in pciserial_init_ports()
4133 uart.port.dev = &dev->dev; in pciserial_init_ports()
4136 if (quirk->setup(priv, board, &uart, i)) in pciserial_init_ports()
4142 priv->line[i] = serial8250_register_8250_port(&uart); in pciserial_init_ports()
4143 if (priv->line[i] < 0) { in pciserial_init_ports()
4147 uart.port.iotype, priv->line[i]); in pciserial_init_ports()
4151 priv->nr = i; in pciserial_init_ports()
4152 priv->board = board; in pciserial_init_ports()
4156 if (quirk->exit) in pciserial_init_ports()
4157 quirk->exit(dev); in pciserial_init_ports()
4168 for (i = 0; i < priv->nr; i++) in pciserial_detach_ports()
4169 serial8250_unregister_port(priv->line[i]); in pciserial_detach_ports()
4174 quirk = find_quirk(priv->dev); in pciserial_detach_ports()
4175 if (quirk->exit) in pciserial_detach_ports()
4176 quirk->exit(priv->dev); in pciserial_detach_ports()
4190 for (i = 0; i < priv->nr; i++) in pciserial_suspend_ports()
4191 if (priv->line[i] >= 0) in pciserial_suspend_ports()
4192 serial8250_suspend_port(priv->line[i]); in pciserial_suspend_ports()
4197 if (priv->quirk->exit) in pciserial_suspend_ports()
4198 priv->quirk->exit(priv->dev); in pciserial_suspend_ports()
4209 if (priv->quirk->init) in pciserial_resume_ports()
4210 priv->quirk->init(priv->dev); in pciserial_resume_ports()
4212 for (i = 0; i < priv->nr; i++) in pciserial_resume_ports()
4213 if (priv->line[i] >= 0) in pciserial_resume_ports()
4214 serial8250_resume_port(priv->line[i]); in pciserial_resume_ports()
4233 if (quirk->probe) { in pciserial_init_one()
4234 rc = quirk->probe(dev); in pciserial_init_one()
4239 if (ent->driver_data >= ARRAY_SIZE(pci_boards)) { in pciserial_init_one()
4240 pci_err(dev, "invalid driver_data: %ld\n", ent->driver_data); in pciserial_init_one()
4241 return -EINVAL; in pciserial_init_one()
4244 board = &pci_boards[ent->driver_data]; in pciserial_init_one()
4248 if (exclude->driver_data) in pciserial_init_one()
4250 (const char *)exclude->driver_data); in pciserial_init_one()
4251 return -ENODEV; in pciserial_init_one()
4259 if (ent->driver_data == pbn_default) { in pciserial_init_one()
4322 * The device may have been disabled. Re-enable it. in pciserial_resume_one()
4327 pci_err(pdev, "Unable to re-enable ports, trying to continue.\n"); in pciserial_resume_one()
4464 /* Unknown card - subdevice 0x1584 */
4469 /* Unknown card - subdevice 0x1588 */
4765 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 1 Port V.34 Super-G3 Fax */
4768 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 2 Port V.34 Super-G3 Fax */
4771 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 4 Port V.34 Super-G3 Fax */
4774 { PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 8 Port V.34 Super-G3 Fax */
4779 * Digi/IBM PCIe 2-port Async EIA-232 Adapter utilizing OxSemi Tornado
4793 * SBS Technologies, Inc. P-Octal and PMC-OCTPRO cards,
4810 * Digitan DS560-558, from jimd@esoft.com
5080 * Dell Remote Access Card 4 - Tim_T_Murphy@Dell.com
5087 * Dell Remote Access Card III - Tim_T_Murphy@Dell.com
5114 * Xircom RBM56G cardbus modem - Dirk Arnold (temp entry)
5176 * IntaShield IS-100
5182 * IntaShield IS-200
5188 * IntaShield IS-400
5194 * IntaShield IX-100
5201 * IntaShield IX-200
5208 * IntaShield IX-400
5216 * Brainboxes UC-101
5223 * Brainboxes UC-235/246
5234 * Brainboxes UC-253/UC-734
5241 * Brainboxes UC-260/271/701/756
5252 * Brainboxes UC-268
5259 * Brainboxes UC-275/279
5266 * Brainboxes UC-302
5281 * Brainboxes UC-310
5288 * Brainboxes UC-313
5303 * Brainboxes UC-320/324
5310 * Brainboxes UC-346
5321 * Brainboxes UC-357
5336 * Brainboxes UC-368
5343 * Brainboxes UC-420
5350 * Brainboxes UC-607
5365 * Brainboxes UC-836
5372 * Brainboxes UP-189
5387 * Brainboxes UP-200
5402 * Brainboxes UP-869
5417 * Brainboxes UP-880
5432 * Brainboxes PX-101
5443 * Brainboxes PX-235/246
5454 * Brainboxes PX-203/PX-257
5465 * Brainboxes PX-260/PX-701
5472 * Brainboxes PX-275/279
5479 * Brainboxes PX-310
5486 * Brainboxes PX-313
5493 * Brainboxes PX-320/324/PX-376/PX-387
5500 * Brainboxes PX-335/346
5507 * Brainboxes PX-368
5514 * Brainboxes PX-420
5525 * Brainboxes PX-475
5532 * Brainboxes PX-803/PX-857
5547 * Brainboxes PX-820
5558 * Brainboxes PX-835/PX-846
5570 * Perle PCI-RAS cards
5692 * PA Semi PA6T-1682M on-chip UART
5797 * ADDI-DATA GmbH communication cards <info@addi-data.com>
5997 * AgeStar as-prs2-009
6049 /* MKS Tenta SCOM-080x serial cards */
6114 new = pciserial_init_ports(dev, priv->board); in serial8250_io_resume()