Lines Matching +full:idma +full:- +full:addr
1 // SPDX-License-Identifier: GPL-2.0+
99 struct dw8250_data *d = to_dw8250_data(p->private_data); in dw8250_modify_msr()
103 value |= d->msr_mask_on; in dw8250_modify_msr()
104 value &= ~d->msr_mask_off; in dw8250_modify_msr()
122 if (up->fcr & UART_FCR_ENABLE_FIFO) { in dw8250_force_idle()
123 lsr = p->serial_in(p, UART_LSR); in dw8250_force_idle()
128 (void)p->serial_in(p, UART_RX); in dw8250_force_idle()
133 struct dw8250_data *d = to_dw8250_data(p->private_data); in dw8250_check_lcr()
134 void __iomem *addr = p->membase + (offset << p->regshift); in dw8250_check_lcr() local
137 if (offset != UART_LCR || d->uart_16550_compatible) in dw8250_check_lcr()
141 while (tries--) { in dw8250_check_lcr()
142 unsigned int lcr = p->serial_in(p, offset); in dw8250_check_lcr()
150 if (p->type == PORT_OCTEON) in dw8250_check_lcr()
151 __raw_writeq(value & 0xff, addr); in dw8250_check_lcr()
154 if (p->iotype == UPIO_MEM32) in dw8250_check_lcr()
155 writel(value, addr); in dw8250_check_lcr()
156 else if (p->iotype == UPIO_MEM32BE) in dw8250_check_lcr()
157 iowrite32be(value, addr); in dw8250_check_lcr()
159 writeb(value, addr); in dw8250_check_lcr()
162 * FIXME: this deadlocks if port->lock is already held in dw8250_check_lcr()
163 * dev_err(p->dev, "Couldn't set LCR to %d\n", value); in dw8250_check_lcr()
172 unsigned int delay_threshold = tries - 1000; in dw8250_tx_wait_empty()
175 while (tries--) { in dw8250_tx_wait_empty()
176 lsr = readb (p->membase + (UART_LSR << p->regshift)); in dw8250_tx_wait_empty()
177 up->lsr_saved_flags |= lsr & up->lsr_save_mask; in dw8250_tx_wait_empty()
184 * the buffer has still not emptied, allow more time for low- in dw8250_tx_wait_empty()
193 writeb(value, p->membase + (offset << p->regshift)); in dw8250_serial_out()
208 unsigned int value = readb(p->membase + (offset << p->regshift)); in dw8250_serial_in()
216 u8 value = __raw_readq(p->membase + (offset << p->regshift)); in dw8250_serial_inq()
224 __raw_writeq(value, p->membase + (offset << p->regshift)); in dw8250_serial_outq()
226 __raw_readq(p->membase + (UART_LCR << p->regshift)); in dw8250_serial_outq()
234 writel(value, p->membase + (offset << p->regshift)); in dw8250_serial_out32()
240 unsigned int value = readl(p->membase + (offset << p->regshift)); in dw8250_serial_in32()
247 iowrite32be(value, p->membase + (offset << p->regshift)); in dw8250_serial_out32be()
253 unsigned int value = ioread32be(p->membase + (offset << p->regshift)); in dw8250_serial_in32be()
262 struct dw8250_data *d = to_dw8250_data(p->private_data); in dw8250_handle_irq()
263 unsigned int iir = p->serial_in(p, UART_IIR); in dw8250_handle_irq()
265 unsigned int quirks = d->pdata->quirks; in dw8250_handle_irq()
270 * There are ways to get Designware-based UARTs into a state where in dw8250_handle_irq()
277 * so we limit the workaround only to non-DMA mode. in dw8250_handle_irq()
279 if (!up->dma && rx_timeout) { in dw8250_handle_irq()
284 (void) p->serial_in(p, UART_RX); in dw8250_handle_irq()
290 if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) { in dw8250_handle_irq()
306 (void)p->serial_in(p, d->pdata->usr_reg); in dw8250_handle_irq()
320 rate = clk_get_rate(d->clk); in dw8250_clk_work_cb()
324 up = serial8250_get_port(d->data.line); in dw8250_clk_work_cb()
326 serial8250_update_uartclk(&up->port, rate); in dw8250_clk_work_cb()
339 * the clk and tty-port mutexes lock. It happens if clock rate change in dw8250_clk_notifier_cb()
341 * tty-port mutex lock and clk_set_rate() function invocation and in dw8250_clk_notifier_cb()
342 * vise-versa. Anyway if we didn't have the reference clock alteration in dw8250_clk_notifier_cb()
347 queue_work(system_unbound_wq, &d->clk_work); in dw8250_clk_notifier_cb()
358 pm_runtime_get_sync(port->dev); in dw8250_do_pm()
363 pm_runtime_put_sync_suspend(port->dev); in dw8250_do_pm()
370 struct dw8250_data *d = to_dw8250_data(p->private_data); in dw8250_set_termios()
374 clk_disable_unprepare(d->clk); in dw8250_set_termios()
375 rate = clk_round_rate(d->clk, newrate); in dw8250_set_termios()
378 * Note that any clock-notifer worker will block in in dw8250_set_termios()
381 ret = clk_set_rate(d->clk, newrate); in dw8250_set_termios()
383 p->uartclk = rate; in dw8250_set_termios()
385 clk_prepare_enable(d->clk); in dw8250_set_termios()
393 unsigned int mcr = p->serial_in(p, UART_MCR); in dw8250_set_ldisc()
395 if (up->capabilities & UART_CAP_IRDA) { in dw8250_set_ldisc()
396 if (termios->c_line == N_IRDA) in dw8250_set_ldisc()
401 p->serial_out(p, UART_MCR, mcr); in dw8250_set_ldisc()
421 return param == chan->device->dev; in dw8250_idma_filter()
436 struct uart_port *up = &p->port; in dw8250_prepare_tx_dma()
437 struct uart_8250_dma *dma = p->dma; in dw8250_prepare_tx_dma()
441 val = dw8250_rzn1_get_dmacr_burst(dma->txconf.dst_maxburst) | in dw8250_prepare_tx_dma()
442 RZN1_UART_xDMACR_BLK_SZ(dma->tx_size) | in dw8250_prepare_tx_dma()
449 struct uart_port *up = &p->port; in dw8250_prepare_rx_dma()
450 struct uart_8250_dma *dma = p->dma; in dw8250_prepare_rx_dma()
454 val = dw8250_rzn1_get_dmacr_burst(dma->rxconf.src_maxburst) | in dw8250_prepare_rx_dma()
455 RZN1_UART_xDMACR_BLK_SZ(dma->rx_size) | in dw8250_prepare_rx_dma()
462 unsigned int quirks = data->pdata ? data->pdata->quirks : 0; in dw8250_quirks()
463 u32 cpr_value = data->pdata ? data->pdata->cpr_value : 0; in dw8250_quirks()
466 data->data.cpr_value = cpr_value; in dw8250_quirks()
470 p->serial_in = dw8250_serial_inq; in dw8250_quirks()
471 p->serial_out = dw8250_serial_outq; in dw8250_quirks()
472 p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; in dw8250_quirks()
473 p->type = PORT_OCTEON; in dw8250_quirks()
474 data->skip_autocfg = true; in dw8250_quirks()
479 p->serial_out = dw8250_serial_out38x; in dw8250_quirks()
481 p->set_termios = dw8250_do_set_termios; in dw8250_quirks()
483 data->data.dma.txconf.device_fc = 1; in dw8250_quirks()
484 data->data.dma.rxconf.device_fc = 1; in dw8250_quirks()
485 data->data.dma.prepare_tx_dma = dw8250_prepare_tx_dma; in dw8250_quirks()
486 data->data.dma.prepare_rx_dma = dw8250_prepare_rx_dma; in dw8250_quirks()
489 p->iotype = UPIO_MEM32; in dw8250_quirks()
490 p->regshift = 2; in dw8250_quirks()
491 p->serial_in = dw8250_serial_in32; in dw8250_quirks()
492 data->uart_16550_compatible = true; in dw8250_quirks()
495 /* Platforms with iDMA 64-bit */ in dw8250_quirks()
496 if (platform_get_resource_byname(to_platform_device(p->dev), in dw8250_quirks()
498 data->data.dma.rx_param = p->dev->parent; in dw8250_quirks()
499 data->data.dma.tx_param = p->dev->parent; in dw8250_quirks()
500 data->data.dma.fn = dw8250_idma_filter; in dw8250_quirks()
512 struct uart_port *p = &up->port; in dw8250_probe()
513 struct device *dev = &pdev->dev; in dw8250_probe()
520 return dev_err_probe(dev, -EINVAL, "no registers defined\n"); in dw8250_probe()
522 spin_lock_init(&p->lock); in dw8250_probe()
523 p->handle_irq = dw8250_handle_irq; in dw8250_probe()
524 p->pm = dw8250_do_pm; in dw8250_probe()
525 p->type = PORT_8250; in dw8250_probe()
526 p->flags = UPF_FIXED_PORT; in dw8250_probe()
527 p->dev = dev; in dw8250_probe()
528 p->set_ldisc = dw8250_set_ldisc; in dw8250_probe()
529 p->set_termios = dw8250_set_termios; in dw8250_probe()
533 return -ENOMEM; in dw8250_probe()
535 data->data.dma.fn = dw8250_fallback_dma_filter; in dw8250_probe()
536 data->pdata = device_get_match_data(p->dev); in dw8250_probe()
537 p->private_data = &data->data; in dw8250_probe()
539 data->uart_16550_compatible = device_property_read_bool(dev, in dw8250_probe()
540 "snps,uart-16550-compatible"); in dw8250_probe()
542 p->mapbase = regs->start; in dw8250_probe()
543 p->mapsize = resource_size(regs); in dw8250_probe()
545 p->membase = devm_ioremap(dev, p->mapbase, p->mapsize); in dw8250_probe()
546 if (!p->membase) in dw8250_probe()
547 return -ENOMEM; in dw8250_probe()
550 /* no interrupt -> fall back to polling */ in dw8250_probe()
551 if (err == -ENXIO) in dw8250_probe()
556 switch (p->iotype) { in dw8250_probe()
558 p->serial_in = dw8250_serial_in; in dw8250_probe()
559 p->serial_out = dw8250_serial_out; in dw8250_probe()
562 p->serial_in = dw8250_serial_in32; in dw8250_probe()
563 p->serial_out = dw8250_serial_out32; in dw8250_probe()
566 p->serial_in = dw8250_serial_in32be; in dw8250_probe()
567 p->serial_out = dw8250_serial_out32be; in dw8250_probe()
570 return -ENODEV; in dw8250_probe()
573 if (device_property_read_bool(dev, "dcd-override")) { in dw8250_probe()
575 data->msr_mask_on |= UART_MSR_DCD; in dw8250_probe()
576 data->msr_mask_off |= UART_MSR_DDCD; in dw8250_probe()
579 if (device_property_read_bool(dev, "dsr-override")) { in dw8250_probe()
581 data->msr_mask_on |= UART_MSR_DSR; in dw8250_probe()
582 data->msr_mask_off |= UART_MSR_DDSR; in dw8250_probe()
585 if (device_property_read_bool(dev, "cts-override")) { in dw8250_probe()
587 data->msr_mask_on |= UART_MSR_CTS; in dw8250_probe()
588 data->msr_mask_off |= UART_MSR_DCTS; in dw8250_probe()
591 if (device_property_read_bool(dev, "ri-override")) { in dw8250_probe()
593 data->msr_mask_off |= UART_MSR_RI; in dw8250_probe()
594 data->msr_mask_off |= UART_MSR_TERI; in dw8250_probe()
598 data->clk = devm_clk_get_optional_enabled(dev, "baudclk"); in dw8250_probe()
599 if (data->clk == NULL) in dw8250_probe()
600 data->clk = devm_clk_get_optional_enabled(dev, NULL); in dw8250_probe()
601 if (IS_ERR(data->clk)) in dw8250_probe()
602 return dev_err_probe(dev, PTR_ERR(data->clk), in dw8250_probe()
605 INIT_WORK(&data->clk_work, dw8250_clk_work_cb); in dw8250_probe()
606 data->clk_notifier.notifier_call = dw8250_clk_notifier_cb; in dw8250_probe()
608 if (data->clk) in dw8250_probe()
609 p->uartclk = clk_get_rate(data->clk); in dw8250_probe()
612 if (!p->uartclk) in dw8250_probe()
613 return dev_err_probe(dev, -EINVAL, "clock rate not defined\n"); in dw8250_probe()
615 data->pclk = devm_clk_get_optional_enabled(dev, "apb_pclk"); in dw8250_probe()
616 if (IS_ERR(data->pclk)) in dw8250_probe()
617 return PTR_ERR(data->pclk); in dw8250_probe()
619 data->rst = devm_reset_control_array_get_optional_exclusive(dev); in dw8250_probe()
620 if (IS_ERR(data->rst)) in dw8250_probe()
621 return PTR_ERR(data->rst); in dw8250_probe()
623 reset_control_deassert(data->rst); in dw8250_probe()
625 err = devm_add_action_or_reset(dev, dw8250_reset_control_assert, data->rst); in dw8250_probe()
632 if (data->uart_16550_compatible) in dw8250_probe()
633 p->handle_irq = NULL; in dw8250_probe()
635 if (!data->skip_autocfg) in dw8250_probe()
639 if (p->fifosize) { in dw8250_probe()
640 data->data.dma.rxconf.src_maxburst = p->fifosize / 4; in dw8250_probe()
641 data->data.dma.txconf.dst_maxburst = p->fifosize / 4; in dw8250_probe()
642 up->dma = &data->data.dma; in dw8250_probe()
645 data->data.line = serial8250_register_8250_port(up); in dw8250_probe()
646 if (data->data.line < 0) in dw8250_probe()
647 return data->data.line; in dw8250_probe()
654 if (data->clk) { in dw8250_probe()
655 err = clk_notifier_register(data->clk, &data->clk_notifier); in dw8250_probe()
658 queue_work(system_unbound_wq, &data->clk_work); in dw8250_probe()
672 struct device *dev = &pdev->dev; in dw8250_remove()
676 if (data->clk) { in dw8250_remove()
677 clk_notifier_unregister(data->clk, &data->clk_notifier); in dw8250_remove()
679 flush_work(&data->clk_work); in dw8250_remove()
682 serial8250_unregister_port(data->data.line); in dw8250_remove()
692 serial8250_suspend_port(data->data.line); in dw8250_suspend()
701 serial8250_resume_port(data->data.line); in dw8250_resume()
710 clk_disable_unprepare(data->clk); in dw8250_runtime_suspend()
712 clk_disable_unprepare(data->pclk); in dw8250_runtime_suspend()
721 clk_prepare_enable(data->pclk); in dw8250_runtime_resume()
723 clk_prepare_enable(data->clk); in dw8250_runtime_resume()
759 { .compatible = "snps,dw-apb-uart", .data = &dw8250_dw_apb },
760 { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data },
761 { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data },
762 { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data },
763 { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data },
793 .name = "dw-apb-uart",
807 MODULE_ALIAS("platform:dw-apb-uart");