Lines Matching refs:REGS_DMA_RX
182 #define REGS_DMA_RX 1 macro
325 udma_writel(priv, REGS_DMA_RX, UDMA_RX_BUFFER_SIZE, RX_BUF_SIZE); in brcmuart_init_dma_hardware()
331 udma_writel(priv, REGS_DMA_RX, UDMA_RX_BUFFER_CLOSE, 16*10*32); in brcmuart_init_dma_hardware()
335 udma_writel(priv, REGS_DMA_RX, UDMA_RX_CTRL, value); in brcmuart_init_dma_hardware()
337 udma_writel(priv, REGS_DMA_RX, UDMA_RX_BLOCKOUT_COUNTER, 0); in brcmuart_init_dma_hardware()
342 udma_writel(priv, REGS_DMA_RX, UDMA_RX_TRANSFER_LEN, 0); in brcmuart_init_dma_hardware()
344 udma_writel(priv, REGS_DMA_RX, UDMA_RX_BUFx_PTR_LO(x), in brcmuart_init_dma_hardware()
346 udma_writel(priv, REGS_DMA_RX, UDMA_RX_BUFx_PTR_HI(x), in brcmuart_init_dma_hardware()
371 udma_unset(priv, REGS_DMA_RX, UDMA_RX_CTRL, UDMA_RX_CTRL_ENA); in start_rx_dma()
375 udma_unset(priv, REGS_DMA_RX, UDMA_RX_BUFx_STATUS(x), in start_rx_dma()
379 udma_unset(priv, REGS_DMA_RX, UDMA_RX_STATUS, in start_rx_dma()
383 udma_set(priv, REGS_DMA_RX, UDMA_RX_CTRL, UDMA_RX_CTRL_ENA); in start_rx_dma()
393 udma_set(priv, REGS_DMA_RX, UDMA_RX_CTRL, UDMA_RX_CTRL_ABORT); in stop_rx_dma()
448 status = udma_readl(priv, REGS_DMA_RX, UDMA_RX_BUFx_STATUS(index)); in brcmuart_rx_buf_done_isr()
449 length = udma_readl(priv, REGS_DMA_RX, UDMA_RX_BUFx_DATA_LEN(index)); in brcmuart_rx_buf_done_isr()
526 udma_unset(priv, REGS_DMA_RX, in brcmuart_rx_isr()
1002 if (x > REGS_DMA_RX) { in brcmuart_probe()
1007 txrev = udma_readl(priv, REGS_DMA_RX, UDMA_RX_REVISION); in brcmuart_probe()