1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * exynos_tmu.c - Samsung Exynos TMU (Thermal Management Unit)
25 #include <dt-bindings/thermal/thermal_exynos.h>
50 /* Exynos5250, Exynos4412, Exynos3250 specific registers */
79 /* Exynos4412 specific */
139  * struct exynos_tmu_data : A structure to hold the private data of the TMU
141  * @base: base address of the single instance of the TMU controller.
142  * @base_second: base address of the common registers of the TMU controller.
143  * @irq: irq number of the TMU controller.
148  * @sclk: pointer to the clock structure for accessing the tmu special clk.
155  * @gain: gain of amplifier in the positive-TC generator block
158  *	in the positive-TC generator block
161  * @enabled: current status of TMU device
167  * @tmu_initialize: SoC specific TMU initialization method
168  * @tmu_control: SoC specific TMU control method
169  * @tmu_read: SoC specific TMU temperature read method
170  * @tmu_set_emulation: SoC specific TMU emulation setting method
171  * @tmu_clear_irqs: SoC specific TMU interrupts clearing method
203  * TMU treats temperature as a mapped temperature code.
208 	if (data->cal_type == TYPE_ONE_POINT_TRIMMING)  in temp_to_code()
209 		return temp + data->temp_error1 - EXYNOS_FIRST_POINT_TRIM;  in temp_to_code()
211 	return (temp - EXYNOS_FIRST_POINT_TRIM) *  in temp_to_code()
212 		(data->temp_error2 - data->temp_error1) /  in temp_to_code()
213 		(EXYNOS_SECOND_POINT_TRIM - EXYNOS_FIRST_POINT_TRIM) +  in temp_to_code()
214 		data->temp_error1;  in temp_to_code()
223 	if (data->cal_type == TYPE_ONE_POINT_TRIMMING)  in code_to_temp()
224 		return temp_code - data->temp_error1 + EXYNOS_FIRST_POINT_TRIM;  in code_to_temp()
226 	return (temp_code - data->temp_error1) *  in code_to_temp()
227 		(EXYNOS_SECOND_POINT_TRIM - EXYNOS_FIRST_POINT_TRIM) /  in code_to_temp()
228 		(data->temp_error2 - data->temp_error1) +  in code_to_temp()
235 		(data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK  in sanitize_temp_error()
238 	data->temp_error1 = trim_info & tmu_temp_mask;  in sanitize_temp_error()
239 	data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) &  in sanitize_temp_error()
242 	if (!data->temp_error1 ||  in sanitize_temp_error()
243 	    (data->min_efuse_value > data->temp_error1) ||  in sanitize_temp_error()
244 	    (data->temp_error1 > data->max_efuse_value))  in sanitize_temp_error()
245 		data->temp_error1 = data->efuse_value & EXYNOS_TMU_TEMP_MASK;  in sanitize_temp_error()
247 	if (!data->temp_error2)  in sanitize_temp_error()
248 		data->temp_error2 =  in sanitize_temp_error()
249 			(data->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) &  in sanitize_temp_error()
259 	mutex_lock(&data->lock);  in exynos_tmu_initialize()
260 	clk_enable(data->clk);  in exynos_tmu_initialize()
261 	if (!IS_ERR(data->clk_sec))  in exynos_tmu_initialize()
262 		clk_enable(data->clk_sec);  in exynos_tmu_initialize()
264 	status = readb(data->base + EXYNOS_TMU_REG_STATUS);  in exynos_tmu_initialize()
266 		ret = -EBUSY;  in exynos_tmu_initialize()
268 		data->tmu_initialize(pdev);  in exynos_tmu_initialize()
269 		data->tmu_clear_irqs(data);  in exynos_tmu_initialize()
272 	if (!IS_ERR(data->clk_sec))  in exynos_tmu_initialize()
273 		clk_disable(data->clk_sec);  in exynos_tmu_initialize()
274 	clk_disable(data->clk);  in exynos_tmu_initialize()
275 	mutex_unlock(&data->lock);  in exynos_tmu_initialize()
283 	struct thermal_zone_device *tzd = data->tzd;  in exynos_thermal_zone_configure()
289 		if (data->soc == SOC_ARCH_EXYNOS5433)  in exynos_thermal_zone_configure()
292 		dev_err(&pdev->dev,  in exynos_thermal_zone_configure()
297 	mutex_lock(&data->lock);  in exynos_thermal_zone_configure()
298 	clk_enable(data->clk);  in exynos_thermal_zone_configure()
300 	data->tmu_set_crit_temp(data, temp / MCELSIUS);  in exynos_thermal_zone_configure()
302 	clk_disable(data->clk);  in exynos_thermal_zone_configure()
303 	mutex_unlock(&data->lock);  in exynos_thermal_zone_configure()
310 	if (data->soc == SOC_ARCH_EXYNOS4412 ||  in get_con_reg()
311 	    data->soc == SOC_ARCH_EXYNOS3250)  in get_con_reg()
315 	con |= data->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT;  in get_con_reg()
318 	con |= (data->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT);  in get_con_reg()
330 	mutex_lock(&data->lock);  in exynos_tmu_control()
331 	clk_enable(data->clk);  in exynos_tmu_control()
332 	data->tmu_control(pdev, on);  in exynos_tmu_control()
333 	data->enabled = on;  in exynos_tmu_control()
334 	clk_disable(data->clk);  in exynos_tmu_control()
335 	mutex_unlock(&data->lock);  in exynos_tmu_control()
343 	interrupt_en = readl(data->base + reg_off);  in exynos_tmu_update_bit()
348 	writel(interrupt_en, data->base + reg_off);  in exynos_tmu_update_bit()
358 		(data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK  in exynos_tmu_update_temp()
361 	th = readl(data->base + reg_off);  in exynos_tmu_update_temp()
364 	writel(th, data->base + reg_off);  in exynos_tmu_update_temp()
378 	writeb(temp, data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + 4);  in exynos4210_tmu_set_high_temp()
403 	writeb(temp, data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + 12);  in exynos4210_tmu_set_crit_temp()
412 	sanitize_temp_error(data, readl(data->base + EXYNOS_TMU_REG_TRIMINFO));  in exynos4210_tmu_initialize()
414 	writeb(0, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);  in exynos4210_tmu_initialize()
449 	if (data->soc == SOC_ARCH_EXYNOS3250 ||  in exynos4412_tmu_initialize()
450 	    data->soc == SOC_ARCH_EXYNOS4412 ||  in exynos4412_tmu_initialize()
451 	    data->soc == SOC_ARCH_EXYNOS5250) {  in exynos4412_tmu_initialize()
452 		if (data->soc == SOC_ARCH_EXYNOS3250) {  in exynos4412_tmu_initialize()
453 			ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON1);  in exynos4412_tmu_initialize()
455 			writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON1);  in exynos4412_tmu_initialize()
457 		ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON2);  in exynos4412_tmu_initialize()
459 		writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON2);  in exynos4412_tmu_initialize()
463 	if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)  in exynos4412_tmu_initialize()
464 		trim_info = readl(data->base_second + EXYNOS_TMU_REG_TRIMINFO);  in exynos4412_tmu_initialize()
466 		trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);  in exynos4412_tmu_initialize()
512 	trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);  in exynos5433_tmu_initialize()
518 	dev_info(&pdev->dev, "Temperature sensor ID: 0x%x\n", sensor_id);  in exynos5433_tmu_initialize()
521 	writel(trim_info, data->base + EXYNOS_TMU_REG_TRIMINFO);  in exynos5433_tmu_initialize()
527 		data->cal_type = TYPE_TWO_POINT_TRIMMING;  in exynos5433_tmu_initialize()
531 		data->cal_type = TYPE_ONE_POINT_TRIMMING;  in exynos5433_tmu_initialize()
535 	dev_info(&pdev->dev, "Calibration type is %d-point calibration\n",  in exynos5433_tmu_initialize()
581 	trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);  in exynos7_tmu_initialize()
590 	con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));  in exynos4210_tmu_control()
597 	writel(con, data->base + EXYNOS_TMU_REG_CONTROL);  in exynos4210_tmu_control()
605 	con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));  in exynos5433_tmu_control()
614 	writel(pd_det_en, data->base + EXYNOS5433_TMU_PD_DET_EN);  in exynos5433_tmu_control()
615 	writel(con, data->base + EXYNOS_TMU_REG_CONTROL);  in exynos5433_tmu_control()
623 	con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));  in exynos7_tmu_control()
633 	writel(con, data->base + EXYNOS_TMU_REG_CONTROL);  in exynos7_tmu_control()
641 	if (!data || !data->tmu_read)  in exynos_get_temp()
642 		return -EINVAL;  in exynos_get_temp()
643 	else if (!data->enabled)  in exynos_get_temp()
648 		return -EAGAIN;  in exynos_get_temp()
650 	mutex_lock(&data->lock);  in exynos_get_temp()
651 	clk_enable(data->clk);  in exynos_get_temp()
653 	value = data->tmu_read(data);  in exynos_get_temp()
659 	clk_disable(data->clk);  in exynos_get_temp()
660 	mutex_unlock(&data->lock);  in exynos_get_temp()
674 		if (data->soc == SOC_ARCH_EXYNOS7) {  in get_emul_con_reg()
700 	if (data->soc == SOC_ARCH_EXYNOS5260)  in exynos4412_tmu_set_emulation()
702 	else if (data->soc == SOC_ARCH_EXYNOS5433)  in exynos4412_tmu_set_emulation()
704 	else if (data->soc == SOC_ARCH_EXYNOS7)  in exynos4412_tmu_set_emulation()
709 	val = readl(data->base + emul_con);  in exynos4412_tmu_set_emulation()
711 	writel(val, data->base + emul_con);  in exynos4412_tmu_set_emulation()
717 	int ret = -EINVAL;  in exynos_tmu_set_emulation()
719 	if (data->soc == SOC_ARCH_EXYNOS4210)  in exynos_tmu_set_emulation()
725 	mutex_lock(&data->lock);  in exynos_tmu_set_emulation()
726 	clk_enable(data->clk);  in exynos_tmu_set_emulation()
727 	data->tmu_set_emulation(data, temp);  in exynos_tmu_set_emulation()
728 	clk_disable(data->clk);  in exynos_tmu_set_emulation()
729 	mutex_unlock(&data->lock);  in exynos_tmu_set_emulation()
737 	{ return -EINVAL; }  in exynos_tmu_set_emulation()
742 	int ret = readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);  in exynos4210_tmu_read()
745 	return (ret < 75 || ret > 175) ? -ENODATA : ret;  in exynos4210_tmu_read()
750 	return readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);  in exynos4412_tmu_read()
755 	return readw(data->base + EXYNOS_TMU_REG_CURRENT_TEMP) &  in exynos7_tmu_read()
763 	thermal_zone_device_update(data->tzd, THERMAL_EVENT_UNSPECIFIED);  in exynos_tmu_threaded_irq()
765 	mutex_lock(&data->lock);  in exynos_tmu_threaded_irq()
766 	clk_enable(data->clk);  in exynos_tmu_threaded_irq()
769 	data->tmu_clear_irqs(data);  in exynos_tmu_threaded_irq()
771 	clk_disable(data->clk);  in exynos_tmu_threaded_irq()
772 	mutex_unlock(&data->lock);  in exynos_tmu_threaded_irq()
782 	if (data->soc == SOC_ARCH_EXYNOS5260) {  in exynos4210_tmu_clear_irqs()
785 	} else if (data->soc == SOC_ARCH_EXYNOS7) {  in exynos4210_tmu_clear_irqs()
788 	} else if (data->soc == SOC_ARCH_EXYNOS5433) {  in exynos4210_tmu_clear_irqs()
796 	val_irq = readl(data->base + tmu_intstat);  in exynos4210_tmu_clear_irqs()
799 	 * Exynos3250, Exynos4412, Exynos5250 and Exynos5260 incorrectly  in exynos4210_tmu_clear_irqs()
805 	writel(val_irq, data->base + tmu_intclear);  in exynos4210_tmu_clear_irqs()
810 		.compatible = "samsung,exynos3250-tmu",
813 		.compatible = "samsung,exynos4210-tmu",
816 		.compatible = "samsung,exynos4412-tmu",
819 		.compatible = "samsung,exynos5250-tmu",
822 		.compatible = "samsung,exynos5260-tmu",
825 		.compatible = "samsung,exynos5420-tmu",
828 		.compatible = "samsung,exynos5420-tmu-ext-triminfo",
831 		.compatible = "samsung,exynos5433-tmu",
834 		.compatible = "samsung,exynos7-tmu",
846 	if (!data || !pdev->dev.of_node)  in exynos_map_dt_data()
847 		return -ENODEV;  in exynos_map_dt_data()
849 	data->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);  in exynos_map_dt_data()
850 	if (data->irq <= 0) {  in exynos_map_dt_data()
851 		dev_err(&pdev->dev, "failed to get IRQ\n");  in exynos_map_dt_data()
852 		return -ENODEV;  in exynos_map_dt_data()
855 	if (of_address_to_resource(pdev->dev.of_node, 0, &res)) {  in exynos_map_dt_data()
856 		dev_err(&pdev->dev, "failed to get Resource 0\n");  in exynos_map_dt_data()
857 		return -ENODEV;  in exynos_map_dt_data()
860 	data->base = devm_ioremap(&pdev->dev, res.start, resource_size(&res));  in exynos_map_dt_data()
861 	if (!data->base) {  in exynos_map_dt_data()
862 		dev_err(&pdev->dev, "Failed to ioremap memory\n");  in exynos_map_dt_data()
863 		return -EADDRNOTAVAIL;  in exynos_map_dt_data()
866 	data->soc = (uintptr_t)of_device_get_match_data(&pdev->dev);  in exynos_map_dt_data()
868 	switch (data->soc) {  in exynos_map_dt_data()
870 		data->tmu_set_low_temp = exynos4210_tmu_set_low_temp;  in exynos_map_dt_data()
871 		data->tmu_set_high_temp = exynos4210_tmu_set_high_temp;  in exynos_map_dt_data()
872 		data->tmu_disable_low = exynos4210_tmu_disable_low;  in exynos_map_dt_data()
873 		data->tmu_disable_high = exynos4210_tmu_disable_high;  in exynos_map_dt_data()
874 		data->tmu_set_crit_temp = exynos4210_tmu_set_crit_temp;  in exynos_map_dt_data()
875 		data->tmu_initialize = exynos4210_tmu_initialize;  in exynos_map_dt_data()
876 		data->tmu_control = exynos4210_tmu_control;  in exynos_map_dt_data()
877 		data->tmu_read = exynos4210_tmu_read;  in exynos_map_dt_data()
878 		data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;  in exynos_map_dt_data()
879 		data->gain = 15;  in exynos_map_dt_data()
880 		data->reference_voltage = 7;  in exynos_map_dt_data()
881 		data->efuse_value = 55;  in exynos_map_dt_data()
882 		data->min_efuse_value = 40;  in exynos_map_dt_data()
883 		data->max_efuse_value = 100;  in exynos_map_dt_data()
891 		data->tmu_set_low_temp = exynos4412_tmu_set_low_temp;  in exynos_map_dt_data()
892 		data->tmu_set_high_temp = exynos4412_tmu_set_high_temp;  in exynos_map_dt_data()
893 		data->tmu_disable_low = exynos4412_tmu_disable_low;  in exynos_map_dt_data()
894 		data->tmu_disable_high = exynos4210_tmu_disable_high;  in exynos_map_dt_data()
895 		data->tmu_set_crit_temp = exynos4412_tmu_set_crit_temp;  in exynos_map_dt_data()
896 		data->tmu_initialize = exynos4412_tmu_initialize;  in exynos_map_dt_data()
897 		data->tmu_control = exynos4210_tmu_control;  in exynos_map_dt_data()
898 		data->tmu_read = exynos4412_tmu_read;  in exynos_map_dt_data()
899 		data->tmu_set_emulation = exynos4412_tmu_set_emulation;  in exynos_map_dt_data()
900 		data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;  in exynos_map_dt_data()
901 		data->gain = 8;  in exynos_map_dt_data()
902 		data->reference_voltage = 16;  in exynos_map_dt_data()
903 		data->efuse_value = 55;  in exynos_map_dt_data()
904 		if (data->soc != SOC_ARCH_EXYNOS5420 &&  in exynos_map_dt_data()
905 		    data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO)  in exynos_map_dt_data()
906 			data->min_efuse_value = 40;  in exynos_map_dt_data()
908 			data->min_efuse_value = 0;  in exynos_map_dt_data()
909 		data->max_efuse_value = 100;  in exynos_map_dt_data()
912 		data->tmu_set_low_temp = exynos5433_tmu_set_low_temp;  in exynos_map_dt_data()
913 		data->tmu_set_high_temp = exynos5433_tmu_set_high_temp;  in exynos_map_dt_data()
914 		data->tmu_disable_low = exynos5433_tmu_disable_low;  in exynos_map_dt_data()
915 		data->tmu_disable_high = exynos5433_tmu_disable_high;  in exynos_map_dt_data()
916 		data->tmu_set_crit_temp = exynos5433_tmu_set_crit_temp;  in exynos_map_dt_data()
917 		data->tmu_initialize = exynos5433_tmu_initialize;  in exynos_map_dt_data()
918 		data->tmu_control = exynos5433_tmu_control;  in exynos_map_dt_data()
919 		data->tmu_read = exynos4412_tmu_read;  in exynos_map_dt_data()
920 		data->tmu_set_emulation = exynos4412_tmu_set_emulation;  in exynos_map_dt_data()
921 		data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;  in exynos_map_dt_data()
922 		data->gain = 8;  in exynos_map_dt_data()
924 			data->reference_voltage = 23;  in exynos_map_dt_data()
926 			data->reference_voltage = 16;  in exynos_map_dt_data()
927 		data->efuse_value = 75;  in exynos_map_dt_data()
928 		data->min_efuse_value = 40;  in exynos_map_dt_data()
929 		data->max_efuse_value = 150;  in exynos_map_dt_data()
932 		data->tmu_set_low_temp = exynos7_tmu_set_low_temp;  in exynos_map_dt_data()
933 		data->tmu_set_high_temp = exynos7_tmu_set_high_temp;  in exynos_map_dt_data()
934 		data->tmu_disable_low = exynos7_tmu_disable_low;  in exynos_map_dt_data()
935 		data->tmu_disable_high = exynos7_tmu_disable_high;  in exynos_map_dt_data()
936 		data->tmu_set_crit_temp = exynos7_tmu_set_crit_temp;  in exynos_map_dt_data()
937 		data->tmu_initialize = exynos7_tmu_initialize;  in exynos_map_dt_data()
938 		data->tmu_control = exynos7_tmu_control;  in exynos_map_dt_data()
939 		data->tmu_read = exynos7_tmu_read;  in exynos_map_dt_data()
940 		data->tmu_set_emulation = exynos4412_tmu_set_emulation;  in exynos_map_dt_data()
941 		data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;  in exynos_map_dt_data()
942 		data->gain = 9;  in exynos_map_dt_data()
943 		data->reference_voltage = 17;  in exynos_map_dt_data()
944 		data->efuse_value = 75;  in exynos_map_dt_data()
945 		data->min_efuse_value = 15;  in exynos_map_dt_data()
946 		data->max_efuse_value = 100;  in exynos_map_dt_data()
949 		dev_err(&pdev->dev, "Platform not supported\n");  in exynos_map_dt_data()
950 		return -EINVAL;  in exynos_map_dt_data()
953 	data->cal_type = TYPE_ONE_POINT_TRIMMING;  in exynos_map_dt_data()
956 	 * Check if the TMU shares some registers and then try to map the  in exynos_map_dt_data()
959 	if (data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO)  in exynos_map_dt_data()
962 	if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {  in exynos_map_dt_data()
963 		dev_err(&pdev->dev, "failed to get Resource 1\n");  in exynos_map_dt_data()
964 		return -ENODEV;  in exynos_map_dt_data()
967 	data->base_second = devm_ioremap(&pdev->dev, res.start,  in exynos_map_dt_data()
969 	if (!data->base_second) {  in exynos_map_dt_data()
970 		dev_err(&pdev->dev, "Failed to ioremap memory\n");  in exynos_map_dt_data()
971 		return -ENOMEM;  in exynos_map_dt_data()
981 	mutex_lock(&data->lock);  in exynos_set_trips()
982 	clk_enable(data->clk);  in exynos_set_trips()
985 		data->tmu_set_low_temp(data, low / MCELSIUS);  in exynos_set_trips()
987 		data->tmu_disable_low(data);  in exynos_set_trips()
989 		data->tmu_set_high_temp(data, high / MCELSIUS);  in exynos_set_trips()
991 		data->tmu_disable_high(data);  in exynos_set_trips()
993 	clk_disable(data->clk);  in exynos_set_trips()
994 	mutex_unlock(&data->lock);  in exynos_set_trips()
1007 	struct device *dev = &pdev->dev;  in exynos_tmu_probe()
1013 		return -ENOMEM;  in exynos_tmu_probe()
1016 	mutex_init(&data->lock);  in exynos_tmu_probe()
1026 	case -ENODEV:  in exynos_tmu_probe()
1028 	case -EPROBE_DEFER:  in exynos_tmu_probe()
1029 		return -EPROBE_DEFER;  in exynos_tmu_probe()
1039 	data->clk = devm_clk_get(dev, "tmu_apbif");  in exynos_tmu_probe()
1040 	if (IS_ERR(data->clk))  in exynos_tmu_probe()
1041 		return dev_err_probe(dev, PTR_ERR(data->clk), "Failed to get clock\n");  in exynos_tmu_probe()
1043 	data->clk_sec = devm_clk_get(dev, "tmu_triminfo_apbif");  in exynos_tmu_probe()
1044 	if (IS_ERR(data->clk_sec)) {  in exynos_tmu_probe()
1045 		if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)  in exynos_tmu_probe()
1046 			return dev_err_probe(dev, PTR_ERR(data->clk_sec),  in exynos_tmu_probe()
1049 		ret = clk_prepare(data->clk_sec);  in exynos_tmu_probe()
1056 	ret = clk_prepare(data->clk);  in exynos_tmu_probe()
1062 	switch (data->soc) {  in exynos_tmu_probe()
1065 		data->sclk = devm_clk_get(dev, "tmu_sclk");  in exynos_tmu_probe()
1066 		if (IS_ERR(data->sclk)) {  in exynos_tmu_probe()
1067 			ret = dev_err_probe(dev, PTR_ERR(data->sclk), "Failed to get sclk\n");  in exynos_tmu_probe()
1070 			ret = clk_prepare_enable(data->sclk);  in exynos_tmu_probe()
1083 		dev_err(dev, "Failed to initialize TMU\n");  in exynos_tmu_probe()
1087 	data->tzd = devm_thermal_of_zone_register(dev, 0, data,  in exynos_tmu_probe()
1089 	if (IS_ERR(data->tzd)) {  in exynos_tmu_probe()
1090 		ret = dev_err_probe(dev, PTR_ERR(data->tzd), "Failed to register sensor\n");  in exynos_tmu_probe()
1100 	ret = devm_request_threaded_irq(dev, data->irq, NULL,  in exynos_tmu_probe()
1106 		dev_err(dev, "Failed to request irq: %d\n", data->irq);  in exynos_tmu_probe()
1114 	clk_disable_unprepare(data->sclk);  in exynos_tmu_probe()
1116 	clk_unprepare(data->clk);  in exynos_tmu_probe()
1118 	if (!IS_ERR(data->clk_sec))  in exynos_tmu_probe()
1119 		clk_unprepare(data->clk_sec);  in exynos_tmu_probe()
1129 	clk_disable_unprepare(data->sclk);  in exynos_tmu_remove()
1130 	clk_unprepare(data->clk);  in exynos_tmu_remove()
1131 	if (!IS_ERR(data->clk_sec))  in exynos_tmu_remove()
1132 		clk_unprepare(data->clk_sec);  in exynos_tmu_remove()
1162 		.name   = "exynos-tmu",
1172 MODULE_DESCRIPTION("Exynos TMU Driver");
1175 MODULE_ALIAS("platform:exynos-tmu");