19 #define TMR_DISABLE		0x0
20 #define TMR_ME			0x80000000
21 #define TMR_ALPF		0x0c000000
22 #define TMR_ALPF_V2		0x03000000
23 #define TMTMIR_DEFAULT	0x0000000f
24 #define TIER_DISABLE	0x0
25 #define TEUMR0_V2		0x51009c00
26 #define TMSARA_V2		0xe
27 #define TMU_VER1		0x1
28 #define TMU_VER2		0x2
30 #define REGS_TMR	0x000	/* Mode Register */
31 #define TMR_DISABLE	0x0
32 #define TMR_ME		0x80000000
33 #define TMR_ALPF	0x0c000000
35 #define REGS_TMTMIR	0x008	/* Temperature measurement interval Register */
36 #define TMTMIR_DEFAULT	0x0000000f
38 #define REGS_V2_TMSR	0x008	/* monitor site register */
40 #define REGS_V2_TMTMIR	0x00c	/* Temperature measurement interval Register */
42 #define REGS_TIER	0x020	/* Interrupt Enable Register */
43 #define TIER_DISABLE	0x0
46 #define REGS_TTCFGR	0x080	/* Temperature Configuration Register */
47 #define REGS_TSCFGR	0x084	/* Sensor Configuration Register */
49 #define REGS_TRITSR(n)	(0x100 + 16 * (n)) /* Immediate Temperature
54 #define REGS_V2_TMSAR(n)	(0x304 + 16 * (n))	/* TMU monitoring
57 #define REGS_TTRnCR(n)	(0xf10 + 4 * (n)) /* Temperature Range n
63 #define REGS_IPBRR(n)		(0xbf8 + 4 * (n)) /* IP Block Revision
66 #define REGS_V2_TEUMR(n)	(0xf00 + 4 * (n))
97 	 * 31  ... 7 6 5 4 3 2 1 0  in tmu_get_temp()
105 	 * 31  ... 8 7 6 5 4 3 2 1 0  in tmu_get_temp()
126 		*temp = (val & GENMASK(7, 0)) * MILLIDEGREE_PER_DEGREE;  in tmu_get_temp()
129 			*temp = milli_kelvin_to_millicelsius((val & GENMASK(8, 0)) *  in tmu_get_temp()
132 			*temp = kelvin_to_millicelsius(val & GENMASK(8, 0));  in tmu_get_temp()
135 	return 0;  in tmu_get_temp()
145 	int id, sites = 0;  in qoriq_tmu_register_tmu_zone()
147 	for (id = 0; id < SITES_MAX; id++) {  in qoriq_tmu_register_tmu_zone()
166 			sites |= 0x1 << (15 - id);  in qoriq_tmu_register_tmu_zone()
168 			sites |= 0x1 << id;  in qoriq_tmu_register_tmu_zone()
182 	return 0;  in qoriq_tmu_register_tmu_zone()
193 	if (len < 0 || (data->ver == TMU_VER1 && len > NUM_TTRCR_V1) ||  in qoriq_tmu_calibration()
200 	if (val != 0) {  in qoriq_tmu_calibration()
206 	for (i = 0; i < len; i++)  in qoriq_tmu_calibration()
215 	for (i = 0; i < len; i += 8, calibration += 2) {  in qoriq_tmu_calibration()
222 	return 0;  in qoriq_tmu_calibration()
236 		regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);  in qoriq_tmu_init_device()
245 	regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(15)),
246 	regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
247 	regmap_reg_range(REGS_V2_TMSAR(0), REGS_V2_TMSAR(15)),
248 	regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)),
250 	regmap_reg_range(REGS_TRITSR(0), REGS_TRITSR(15)),
297 	base = devm_platform_ioremap_resource(pdev, 0);  in qoriq_tmu_probe()
325 	/* version register offset at: 0xbf8 on both v1 and v2 */  in qoriq_tmu_probe()
326 	ret = regmap_read(data->regmap, REGS_IPBRR(0), &ver);  in qoriq_tmu_probe()
331 	data->ver = (ver >> 8) & 0xff;  in qoriq_tmu_probe()
336 	if (ret < 0)  in qoriq_tmu_probe()
340 	if (ret < 0) {  in qoriq_tmu_probe()
347 	return 0;  in qoriq_tmu_probe()
355 	ret = regmap_update_bits(data->regmap, REGS_TMR, TMR_ME, 0);  in qoriq_tmu_suspend()
361 	return 0;  in qoriq_tmu_suspend()