339 	ret = regmap_field_read(priv->rf[field], &temp);  in tsens_hw_to_mC()
394 	regmap_field_write(priv->rf[index], enable ? 0 : 1);  in tsens_set_interrupt_v1()
425 		regmap_field_write(priv->rf[index_mask], 0);  in tsens_set_interrupt_v2()
427 		regmap_field_write(priv->rf[index_mask],  1);  in tsens_set_interrupt_v2()
428 		regmap_field_write(priv->rf[index_clear], 1);  in tsens_set_interrupt_v2()
429 		regmap_field_write(priv->rf[index_clear], 0);  in tsens_set_interrupt_v2()
470 	ret = regmap_field_read(priv->rf[UPPER_STATUS_0 + hw_id], &d->up_viol);  in tsens_threshold_violated()
473 	ret = regmap_field_read(priv->rf[LOWER_STATUS_0 + hw_id], &d->low_viol);  in tsens_threshold_violated()
478 		ret = regmap_field_read(priv->rf[CRITICAL_STATUS_0 + hw_id],  in tsens_threshold_violated()
496 	ret = regmap_field_read(priv->rf[UP_INT_CLEAR_0 + hw_id], &d->up_irq_clear);  in tsens_read_irq_state()
499 	ret = regmap_field_read(priv->rf[LOW_INT_CLEAR_0 + hw_id], &d->low_irq_clear);  in tsens_read_irq_state()
503 		ret = regmap_field_read(priv->rf[UP_INT_MASK_0 + hw_id], &d->up_irq_mask);  in tsens_read_irq_state()
506 		ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask);  in tsens_read_irq_state()
509 		ret = regmap_field_read(priv->rf[CRIT_INT_CLEAR_0 + hw_id],  in tsens_read_irq_state()
513 		ret = regmap_field_read(priv->rf[CRIT_INT_MASK_0 + hw_id],  in tsens_read_irq_state()
576 		ret = regmap_field_read(priv->rf[WDOG_BARK_STATUS],  in tsens_critical_irq_thread()
583 			regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1);  in tsens_critical_irq_thread()
584 			regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0);  in tsens_critical_irq_thread()
585 			ret = regmap_field_read(priv->rf[WDOG_BARK_COUNT],  in tsens_critical_irq_thread()
720 	regmap_field_write(priv->rf[LOW_THRESH_0 + hw_id], low_val);  in tsens_set_trips()
721 	regmap_field_write(priv->rf[UP_THRESH_0 + hw_id], high_val);  in tsens_set_trips()
738 	ret = regmap_field_write(priv->rf[INT_EN], val);  in tsens_enable_irq()
748 	regmap_field_write(priv->rf[INT_EN], 0);  in tsens_disable_irq()
770 	ret = regmap_field_read_poll_timeout(priv->rf[valid_idx], valid,  in get_temp_tsens_valid()
792 			ret = regmap_field_read(priv->rf[TRDY], &trdy);  in get_temp_common()
799 		ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);  in get_temp_common()
838 		ret = regmap_field_read(priv->rf[VER_MAJOR], &maj_ver);  in dbg_version_show()
841 		ret = regmap_field_read(priv->rf[VER_MINOR], &min_ver);  in dbg_version_show()
844 		ret = regmap_field_read(priv->rf[VER_STEP], &step_ver);  in dbg_version_show()
953 			priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,  in init_common()
955 			if (IS_ERR(priv->rf[i])) {  in init_common()
956 				ret = PTR_ERR(priv->rf[i]);  in init_common()
960 		ret = regmap_field_read(priv->rf[VER_MINOR], &ver_minor);  in init_common()
965 	priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map,  in init_common()
967 	if (IS_ERR(priv->rf[TSENS_EN])) {  in init_common()
968 		ret = PTR_ERR(priv->rf[TSENS_EN]);  in init_common()
973 		regmap_field_write(priv->rf[TSENS_EN], 1);  in init_common()
975 	ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);  in init_common()
984 	priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map,  in init_common()
986 	if (IS_ERR(priv->rf[SENSOR_EN])) {  in init_common()
987 		ret = PTR_ERR(priv->rf[SENSOR_EN]);  in init_common()
990 	priv->rf[INT_EN] = devm_regmap_field_alloc(dev, priv->tm_map,  in init_common()
992 	if (IS_ERR(priv->rf[INT_EN])) {  in init_common()
993 		ret = PTR_ERR(priv->rf[INT_EN]);  in init_common()
997 	priv->rf[TSENS_SW_RST] =  in init_common()
999 	if (IS_ERR(priv->rf[TSENS_SW_RST])) {  in init_common()
1000 		ret = PTR_ERR(priv->rf[TSENS_SW_RST]);  in init_common()
1004 	priv->rf[TRDY] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[TRDY]);  in init_common()
1005 	if (IS_ERR(priv->rf[TRDY])) {  in init_common()
1006 		ret = PTR_ERR(priv->rf[TRDY]);  in init_common()
1015 			priv->rf[idx] = devm_regmap_field_alloc(dev,  in init_common()
1018 			if (IS_ERR(priv->rf[idx])) {  in init_common()
1019 				ret = PTR_ERR(priv->rf[idx]);  in init_common()
1031 				priv->rf[idx] =  in init_common()
1035 				if (IS_ERR(priv->rf[idx])) {  in init_common()
1036 					ret = PTR_ERR(priv->rf[idx]);  in init_common()
1047 			priv->rf[i] = devm_regmap_field_alloc(dev, priv->tm_map,  in init_common()
1049 			if (IS_ERR(priv->rf[i])) {  in init_common()
1050 				ret = PTR_ERR(priv->rf[i]);  in init_common()
1058 		regmap_field_write(priv->rf[WDOG_BARK_MASK], 0);  in init_common()
1059 		regmap_field_write(priv->rf[CC_MON_MASK], 1);  in init_common()
1206 			regmap_field_write(priv->rf[WDOG_BARK_MASK], 0);  in tsens_reinit()
1207 			regmap_field_write(priv->rf[CC_MON_MASK], 1);  in tsens_reinit()
1252 		regmap_field_write(priv->rf[CRIT_THRESH_0],  in tsens_register()
1255 		regmap_field_write(priv->rf[CRIT_THRESH_1],  in tsens_register()