1 // SPDX-License-Identifier: GPL-2.0-only
3  * intel_tcc.c - Library for Intel TCC (thermal control circuitry) MSR access
10 #include <asm/intel-family.h>
14  * struct temp_masks - Bitmasks for temperature readings
19  * Bitmasks to extract the fields of the MSR_TEMPERATURE and IA32_[PACKAGE]_
129 		memcpy(&intel_tcc_temp_masks, (const void *)id->driver_data,  in intel_tcc_init()
135  * Use subsys_initcall to ensure temperature bitmasks are initialized before
141  * intel_tcc_get_offset_mask() - Returns the bitmask to read TCC offset
143  * Get the model-specific bitmask to extract TCC_OFFSET from the MSR
147  * Return: The model-specific bitmask for TCC offset.
156  * get_temp_mask() - Returns the model-specific bitmask for temperature
160  * Get the model-specific bitmask to extract the temperature reading from the
165  * Return: The model-specific bitmask for temperature reading
174  * intel_tcc_get_tjmax() - returns the default TCC activation Temperature
184 	u32 low, high;  in intel_tcc_get_tjmax()  local
188 		err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high);  in intel_tcc_get_tjmax()
190 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high);  in intel_tcc_get_tjmax()
194 	val = (low >> 16) & 0xff;  in intel_tcc_get_tjmax()
196 	return val ? val : -ENODATA;  in intel_tcc_get_tjmax()
201  * intel_tcc_get_offset() - returns the TCC Offset value to Tjmax
204  * Get the TCC offset value to Tjmax. The effective thermal throttling or TCC
205  * activation temperature equals "Tjmax" - "TCC Offset", in degrees C.
211 	u32 low, high;  in intel_tcc_get_offset()  local
215 		err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high);  in intel_tcc_get_offset()
217 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high);  in intel_tcc_get_offset()
221 	return (low >> 24) & intel_tcc_temp_masks.tcc_offset;  in intel_tcc_get_offset()
226  * intel_tcc_set_offset() - set the TCC offset value to Tjmax
230  * Set the TCC Offset value to Tjmax. The effective thermal throttling or TCC
231  * activation temperature equals "Tjmax" - "TCC Offset", in degree C.
238 	u32 low, high;  in intel_tcc_set_offset()  local
242 		return -ENODEV;  in intel_tcc_set_offset()
245 		return -EINVAL;  in intel_tcc_set_offset()
248 		err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high);  in intel_tcc_set_offset()
250 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high);  in intel_tcc_set_offset()
255 	if (low & BIT(31))  in intel_tcc_set_offset()
256 		return -EPERM;  in intel_tcc_set_offset()
258 	low &= ~(intel_tcc_temp_masks.tcc_offset << 24);  in intel_tcc_set_offset()
259 	low |= offset << 24;  in intel_tcc_set_offset()
262 		return wrmsr_safe(MSR_IA32_TEMPERATURE_TARGET, low, high);  in intel_tcc_set_offset()
264 		return wrmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, low, high);  in intel_tcc_set_offset()
269  * intel_tcc_get_temp() - returns the current temperature
271  * @temp: pointer to the memory for saving cpu temperature.
282 	u32 low, high, mask;  in intel_tcc_get_temp()  local
290 		err = rdmsr_safe(msr, &low, &high);  in intel_tcc_get_temp()
292 		err = rdmsr_safe_on_cpu(cpu, msr, &low, &high);  in intel_tcc_get_temp()
297 	if (!(low & BIT(31)))  in intel_tcc_get_temp()
298 		return -ENODATA;  in intel_tcc_get_temp()
302 	*temp = tjmax - ((low >> 16) & mask);  in intel_tcc_get_temp()